CN100418073C - High-speed printing control device and control method with two independent buffer memories - Google Patents

Abstract

The present invention belongs to the field of printer control technology, and is one printer control device with two independent buffer memories and its control method. The printer control device has two independent buffer memories for storing printed data, one input buffer selector for controlling the storage of the printed data in different buffer memories, one output buffer selector for controlling the data output circuit to obtain printed data from different buffer memories, one control signal generator for controlling the input buffer selector and the output buffer selector, one data receiving circuit for receiving printed data, and one data output circuit for outputting printed data. The high speed printer control device of the present invention has relaxed bandwidth requirement on each of the buffer memories, simplified circuit board design, reduced mutual interference between high speed devices and raised printer control device quality.

Description

High-speed printing control device and control method with two independent buffer memories

technical field

The invention belongs to the technical field of printer control, and in particular relates to a high-speed printing control device and a control method with two independent buffer memories.

Background technique

The printing control device is a control device that sends the received printing data to the printer imaging component (laser printer core or inkjet nozzle) according to the specified printing requirements to form a printed document. In order to ensure the continuity of the action of the imaging component and make up for the difference between the data receiving speed of the printing control device and the data output speed of the imaging component, the usual printing control device (see Figure 1) has a buffer for buffering printing data. memory. Before starting the imaging unit to output the print data, the usual print control device needs to receive the print data and save them in the buffer memory, and wait until the print data stored in the buffer memory reaches a certain capacity (such as the amount of data required to print one page). The control device activates the imaging unit, reads the print data in the buffer memory from the buffer memory according to the output speed of the imaging unit, and sends it to the imaging unit through the data output circuit. During the process of reading the print data from the buffer memory, in order to increase the printing speed, a common print control device will continue to receive print data from the outside and store it in the same buffer memory.

In the above-mentioned common printing control device, the same buffer memory is used for receiving print data and outputting print data. In the case of high throughput rate of print data such as wide-format printing or high-speed printing, the print control device adopting this buffer memory structure can The data interface bandwidth of the buffer memory used places extremely high demands. For example, for a color printer with a printing resolution of 600dpi, 2-bit grayscale, and a printing speed of 300ppm, the printing control device can receive and output printing data at a speed of 320M Bytes per second. If the printing data is output in parallel to ensure continuous printing, since the data input circuit and the data output circuit use the same buffer memory at the same time, the buffer memory is also used as the current input buffer memory and the current output buffer memory, so the data in the buffer memory The bandwidth of the interface must reach more than 640M Bytes per second. Under the existing technical conditions, to make the bandwidth of the data interface of the buffer memory reach such a high speed will be restricted by factors such as the difficulty of board design, the difficulty of manufacturing the buffer memory, the complexity of the control circuit of the buffer memory, and the serious mutual interference of high-speed devices. As a result, the yield of the printing control device is reduced, and the cost of the printing control device is increased.

Fig. 1 is the structural block diagram of the receiving, buffering and outputting part of print data in the printing control device that generally adopts a single buffer memory, wherein the buffer memory interface control circuit 53 realizes to the buffer memory through the control signal 54 and the input/output data bus 55 51 read/write operations. When this printing control device receives and outputs print data in parallel, the data receiving circuit 50 saves the received print data into the buffer memory 51 through the buffer memory interface control circuit 53, and at the same time, the data output circuit 52 passes through the buffer memory The interface control circuit 53 reads valid print data from the buffer memory 51 and outputs it to the imaging component.

This buffer memory is used as the buffer memory control structure of the input buffer memory and the output buffer memory at the same time, so that the buffer memory interface control circuit 53 must frequently switch between the read operation to the buffer memory 51 and the write operation to the buffer memory 51, thereby causing buffering. The operating frequency of the control signal 54 between the memory interface control circuit 53 and the buffer memory and the I/O data bus 55 must be more than twice the operating frequency of a single buffer memory write operation (or read operation). In the case of high-speed printing, this will cause the buffer memory interface control circuit 53, the buffer memory 51, and the control signal 54 and the data bus 55 between the two must work at a very high operating frequency, facing difficulties in designing high-frequency control circuits, The actual board design constraints are too high and high-frequency devices interfere with each other, which leads to a decrease in the yield of the actual printing control device, thereby increasing the cost of the printing control device.

Contents of the invention

The object of the present invention is to provide a printing control device and a control method that can effectively increase the printing speed and have a lower cost in view of the defects of the above-mentioned printing control device using a buffer memory.

The purpose of the present invention is achieved like this:

A high-speed print control device with two independent buffer memories, the print control device has two completely independent buffer memories, and the two buffer memories are respectively used to control the storage of input print data into different buffer memories The input buffer selector is connected with the output buffer selector used to control the printing data obtained from different buffer memories, and the control signal generator used to generate two control signals used to separately control the independent buffer selector is connected with the input buffer respectively. The selector is connected to the output buffer selector, the input buffer selector is connected to the data receiving circuit for receiving printing data, and the output buffer selector is connected to the data output circuit for outputting printing data.

Further, in the above device, the input buffer selector includes a single-input dual-output selection circuit connected to the output end of the input data interface circuit, and the output end of the single-input dual-output selection circuit is connected to the Two independent buffer memory control circuits are connected.

The output buffer selector includes a dual-input single-output selection circuit connected to the input end of the movement interface control circuit, and the input end of the dual-input single-output selection circuit is connected to two independent buffer memories. circuit connection.

The input terminals of the two completely independent buffer memories are respectively connected to the two independent buffer memory control circuits of the input buffer selector.

The output terminals of the two completely independent buffer memories are respectively connected to the two independent buffer memory control circuits of the output buffer selector.

In the printing control device of the present invention, the two buffer memories perform data transmission with the input buffer selector and the output buffer selector completely independently, without any control signal or data bus connection between the two buffer memories.

In order to achieve the purpose of reducing the bandwidth requirements of the buffer memory under the premise of ensuring the printing speed, the control method of the printing control device according to the present invention includes the following control process:

First use the buffer memory A (12) as the current input buffer memory, store the print data of the first page in the buffer memory A (12), after receiving the printing dot matrix data of the first page, select the buffer memory A (12 ) as the current output buffer memory, read the print data of the first page from the buffer memory A (12) and output to the imaging component to start printing; while starting to output the print data of the first page, use the buffer memory B (15) as The current input buffer memory stores the print data of the second page in the buffer memory B (15); ) as the current output buffer memory, and buffer memory A (12) as the current input buffer memory, read the print data of the second page from the buffer memory B (15) and continue to output and receive the print data of the third page into In the buffer memory A (12), such circulation makes the buffer memory A (12) and the buffer memory B (15) take turns as the current input buffer memory and the current output buffer memory until the printing is finished.

As mentioned above, in the whole printing process, through the control of the input buffer selector and the output buffer selector by the control signal generator, buffer memory A (12) and buffer memory B (15) will take turns as the current input buffer memory and buffer memory The current output buffer memory, and the current input buffer memory does not need to support the output of print data at the same time during the process of receiving a page of print data input, and the current output buffer memory does not need to support the output of print data at the same time during the process of outputting a page of print data enter.

The effect of the present invention is that: due to the adoption of the above-mentioned control structure and control flow, the printing control device described in the present invention can not only fully meet the requirements of non-stop high-speed printing of printers that accept print data and output print data in parallel, but more importantly, because Two completely independent buffer memories and the attached control mechanism are adopted, each buffer memory does not need to support the output of print data at the same time when it is used as the current input buffer memory to receive a page of print data input, but when it is used as the current output buffer memory In the process of outputting one page of print data, there is no need to support the input of print data at the same time. In this way, the bandwidth requirements for each buffer memory will be reduced to half of that of a single buffer memory, which greatly reduces the difficulty of board design, reduces the mutual interference between high-speed devices, and thus greatly improves printing control. device yield.

Description of drawings

Fig. 1 is a structural block diagram of a printing control device that usually adopts a single buffer memory;

Fig. 2 is a structural block diagram of the printing control device of the present invention;

Fig. 3 is a structural block diagram of an embodiment of the present invention;

Fig. 4 is the block diagram of the circuit composition structure of the input buffer selector (11) of the embodiment of the present invention;

Fig. 5 is the block diagram of the circuit composition structure of the output buffer selector (13) of the embodiment of the present invention;

Fig. 6 is a single-channel input dual-channel output selection circuit diagram;

Fig. 7 is a circuit diagram of dual input and single output selection.

Detailed ways

The specific implementation manners of the present invention will be further described below in conjunction with the drawings and examples.

Fig. 2 is a structural block diagram of the printing control device described in the present invention. Wherein the input buffer selector 11 controls the data input to the buffer memory A12 through the control signal 61 and the output data bus 60, the input buffer selector 11 controls the data input to the buffer memory B15 through the control signal 62 and the output data bus 63, and the output buffer selector The output buffer selector 13 controls the data reading from the buffer memory A12 through the control signal 65 and the input data bus 64, and the output buffer selector 13 controls the data reading from the buffer memory B15 through the control signal 66 and the input data bus 67. There is no connection between the control signals and data buses between the buffer memory A12 and the buffer memory B15, and they are two completely independent buffer memories.

3, 4 and 5 describe specific embodiments of the present invention. The CPU control system 22 in the specific embodiment can generate a control signal 16 to control the input buffer selector 11 to select different buffer memory A12 or buffer memory B15 as the current input buffer according to the collected printout information and data input information. memory, while generating a control signal 17 to control the output buffer selector 13 to select a different buffer memory A12 or buffer memory B15 as the current output buffer memory. As the main control system of the printing control device, the CPU control system 22 can control the buffer memory A12 and the buffer memory B15 to take turns as the current input buffer memory and the current output buffer memory according to the operation process described in the present invention, and can ensure that at any specific moment One of the two buffers is the current input buffer and the other is the current output buffer.

The printing control device receives printing data at high speed through the high-speed data input interface 20 . The input buffer selector 11 controls the received print data to be stored in the buffer memory A12 through the control signal 71 and the output data bus 70, and the input buffer selector 11 controls to store the received print data into the buffer memory A12 through the control signal 72 and the output data bus 73. Buffer memory B15. The output buffer selector 13 controls the reading of print data from the buffer memory A12 through the control signal 75 and the input data bus 74 , and the output buffer selector 13 controls the reading of the print data from the buffer memory B15 through the control signal 76 and the input data bus 77 . The CPU control system 22 generates a control signal 16 to control the input buffer selector 11 to select a different buffer memory as the current input buffer memory according to the output of the print data and the reception of the print data, and generates a control signal 17 to control the output buffer selector 13 to select a different buffer memory. The buffer memory is used as the current output buffer memory. There is no connection between the control signals and data buses between the buffer memory A12 and the buffer memory B15, and they are two completely independent buffer memories.

FIG. 4 is a block diagram of a key circuit in this embodiment—the circuit composition and structure of the input buffer selector 11 . The core part of the selector is a single-input dual-output selection circuit 31 capable of sending the data received by the input data interface circuit 30 to the buffer memory control circuit A32 or the buffer memory control circuit B33 according to the input control signal 16 . When the input control signal 16 is at a high (low) level, the single input dual output selection circuit 31 sends the data to the buffer memory control circuit A32, and then the buffer memory control circuit A32 passes the control signal according to the interface timing requirements of the buffer memory 71 and output data bus 70 to send data to buffer memory A12. When the input control signal 16 is low (high) level, the single input dual output selection circuit 31 sends the data to the buffer memory control circuit B33, and then the buffer memory control circuit B33 passes the control signal according to the interface timing requirements of the buffer memory 72 and output data bus 73 to send data to buffer memory B15. According to the circuit structure shown in Figure 4, when the control signal 16 is high level, the input buffer selector 11 uses the buffer memory A12 as the current input buffer memory, and when the control signal 16 is low level, the input buffer selector 11 uses the buffer memory B15 as the current input buffer memory. Current input buffer memory; Or, when control signal 16 is low level, input buffer selector 11 uses buffer memory A12 as current input buffer memory, and when control signal 16 is high level, input buffer selector 11 uses buffer memory B15 as Current input buffer memory. Through the above method, the function of selecting two buffer memories is realized.

FIG. 5 is a structural block diagram of another key circuit in this embodiment—the output buffer selector 13 . The core part of the selector is a dual-input single-channel that can read print data from the buffer memory control circuit C42 or buffer memory control circuit D43 according to the input control signal 17 and send it to the core interface control circuit 45 for output. Output selection circuit 44 . The buffer memory control circuit C42 reads data from the buffer memory A12 through the control signal 75 and the input data bus 74 according to the received data read request of the dual input single output selection circuit 44 and sends it to the dual input single output selection circuit 44. The buffer memory control circuit D43 reads data from the buffer memory B15 through the control signal 76 and the input data bus 77 according to the received data read request of the dual input single output selection circuit 44 and sends them to the dual input single output Select circuit 44 . When the input control signal 17 is a high (low) level, the read data request of the dual input single output selection circuit 44 will be sent to the buffer memory control circuit C42, when the input control signal 17 is a low (high) level , the read data request of the dual-input single-output selection circuit 44 will be sent to the buffer memory control circuit D43. According to the block diagram of the circuit structure shown in Figure 5, when the control signal 17 is a high level, the output buffer selector 13 uses the buffer memory A12 as the current output buffer memory, and when the control signal 17 is a low level, the output buffer selector 13 uses the buffer memory B15 As the current output buffer memory, or, when the control signal 17 is a low level, the output buffer selector 13 uses the buffer memory A12 as the current output buffer memory, and when the control signal 17 is a high level, the output buffer selector 13 uses the buffer memory B15 as the current output buffer memory. Through the above method, the function of selecting two buffer memories is realized.

Fig. 6 is a circuit diagram of a single input dual output selection circuit of the present invention. This circuit uses the control signal 16 to control the switch driver 71, and uses the control signal to control the switch driver 72 through the inverter 70, so that when the control signal 16 is high, the driver 71 is turned on and the driver 72 is turned off. When low, driver 71 is off and driver 72 is on. This enables dual output selection to a single input.

Fig. 7 is a circuit diagram of dual-input single-output selection in the present invention. This circuit uses the control signal 17 to control the switch driver 80, and uses the control signal to control the switch driver 82 through the inverter 81, so that the driver 81 is turned on and the driver 82 is turned off when the control signal 17 is high. When low, driver 81 is off and driver 82 is on. This enables the selection of a single output to a dual input.

Claims (8)

1. A high-speed printing control device with two independent buffer memories, characterized in that: two completely independent buffer memories (12, 15) are respectively used for controlling the print data input to be stored in different buffer memories The input buffer selector (11) is connected with the output buffer selector (13) used to control obtaining print data from different buffer memories, and is used to generate two control signals (16, 17) used to respectively control the independent buffer selector ) control signal generator (18) is respectively connected with the input buffer selector (11) and the output buffer selector (13), the input buffer selector (11) is connected with the data receiving circuit (10) for receiving the print data, output The buffer selector (13) is connected to a data output circuit (14) for outputting print data; Described input buffer selector (11) comprises a single-way input double-way output selection circuit (31) connected with the output end of input data interface circuit (30), and this single-way input double-way output selection circuit (31) The output end of two independent buffer memory control circuits (32,33) is connected; The output buffer selector (13) includes a dual-input single-output selection circuit (44) connected to the input of the movement interface control circuit (45), and the dual-input single-output selection circuit (44 ) is connected to two independent buffer memory control circuits (42, 43). 2. The high-speed printing control device with two independent buffer memories according to claim 1, characterized in that: the input terminals of the two completely independent buffer memories (12, 15) are respectively connected to the input buffer selector (11) Two independent buffer memory control circuits (32, 33) are connected. 3. The high-speed printing control device with two independent buffer memories according to claim 1 or 2, characterized in that: the output terminals of the two completely independent buffer memories (12, 15) are respectively connected to the output buffer selector ( 13) two independent buffer memory control circuits (42, 43) are connected. 4. A control method of a high-speed printing control device as claimed in claim 1, comprising the following control process: first using the buffer memory A (12) as the current input buffer memory, storing the print data of the first page into the buffer memory A ( In 12), after receiving the print dot matrix data of the first page, select the buffer memory A (12) as the current output buffer memory, read the print data of the first page from the buffer memory A (12) and output it to the imaging component Start printing; when starting to output the print data of the first page, the buffer memory B (15) is used as the current input buffer memory, and the print data of the second page is stored in the buffer memory B (15); after completing the first After the output of the print data of one page and the input of the print data of the second page, the buffer memory B (15) is set as the current output buffer memory, and the buffer memory A (12) is set as the current input buffer memory, so that from the buffer memory B ( In 15), read the print data of the second page and continue to output and receive the print data of the third page and store it in the buffer memory A (12), so that the buffer memory A (12) and buffer memory B (15) are used as The current input buffer and the current output buffer until the end of printing. 5. The control method according to claim 4, characterized in that: the input buffer selector (11) is controlled by the control signal (71) and the output data bus (70) to store the received print data into the buffer memory A (12 ); the input buffer selector (11) controls the received print data into the buffer memory B (15) through the control signal (72) and the output data bus (73). 6. The control method according to claim 4 or 5, characterized in that: the output buffer selector (13) controls the reading and printing from the buffer memory A (12) through the control signal (75) and the input data bus (74) Data, the output buffer selector (13) controls the reading of print data from the buffer memory B (15) through the control signal (76) and the input data bus (77). 7. The control method according to claim 5, characterized in that: when the control signal (16) is high level, the input buffer selector (11) uses the buffer memory A (12) as the current input buffer memory, when the control signal When (16) is low level, input buffer selector (11) uses buffer memory B (15) as current input buffer memory; Or, when control signal (16) is low level, input buffer selector (11) will buffer The memory A (12) is used as the current input buffer memory, and when the control signal (16) is at a high level, the input buffer selector (11) uses the buffer memory B (15) as the current input buffer memory. 8. The control method according to claim 6, characterized in that: when the control signal (17) is high level, the output buffer selector (13) uses the buffer memory A (12) as the current output buffer memory, when the control signal When (17) is low level, output buffer selector (13) uses buffer memory B (15) as current output buffer memory; Or, when control signal (17) is low level, output buffer selector (13) will buffer The memory A (12) is used as the current output buffer memory, and when the control signal (17) is at a high level, the output buffer selector (13) uses the buffer memory B (15) as the current output buffer memory.

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