CN100416797C - Symmetrical inductance element - Google Patents
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Abstract
Description
技术领域 technical field
本发明涉及一种半导体装置,特别是涉及一种对称电感元件适用于差动型(differential)操作。The present invention relates to a semiconductor device, and more particularly to a symmetrical inductance element suitable for differential operation.
背景技术 Background technique
许多数字和模拟部件及电路已成功地运用于半导体集成电路。上述部件包括无源元件,例如电阻、电容或电感等。典型的半导体集成电路包括硅基底。一层以上的介电层设置在基底上,且一层以上的金属层设置在介电层中。这些金属层可通过现行的半导体工艺技术而形成芯片内建部件,例如芯片内建电感元件(on-chip inductor)。Many digital and analog components and circuits have been successfully used in semiconductor integrated circuits. The above components include passive components such as resistors, capacitors or inductors. A typical semiconductor integrated circuit includes a silicon substrate. More than one dielectric layer is disposed on the substrate, and more than one metal layer is disposed in the dielectric layer. These metal layers can be used to form on-chip components, such as on-chip inductors, through current semiconductor process technology.
传统上,芯片内建电感形成在基底上且运用于射频频带(radio frequencyband)集成电路设计。请参照图1,其展示出现有二匝对称型电感元件平面示意图。此电感元件形成在基底100上方的绝缘层110中,包括:对称设置在虚线2两侧的绝缘层110中的第一和第二绕线部。第一绕线部包括第一和第二半圈型导线层101、103,而第二绕线部包括第三和第四半圈型导线层102、104。第二半圈型导线层103平行第一半圈型导线层101并位于其外侧。第四半圈型导线层104平行第三半圈型导线层102并位于其外侧。每一半圈型导线层具有第一和第二端10和20,其中第一半圈型导线层101的第一端10延伸并连接至第三半圈型导线层102的第一端10。Traditionally, on-chip inductors are formed on a substrate and used in radio frequency band IC designs. Please refer to FIG. 1 , which shows a schematic plan view of a conventional two-turn symmetrical inductance element. The inductance element is formed in the
为了维持电感元件几何对称性,第二半圈型导线层103的第二端20通过下跨接(underpass)层111与第三半圈型导线层102的第二端20电连接。另外,第四半圈型导线层104的第二端20通过上跨接(cross)层113而与第一半圈型导线层(underpass)101的第二端20电连接。第二和第四半圈型导线层103和104的第一端10具有侧向延伸部30和40,用以作为输入/输出端。In order to maintain the geometric symmetry of the inductance element, the
为了进一步改善电感元件的品质因素(Q值),有人提出增加每一半圈型导线层的线宽,如图2所示。在图2中,就与图1图号相同的元件,该元件的相关叙述可参阅前段。In order to further improve the quality factor (Q value) of the inductance element, it is proposed to increase the line width of each half-circle wire layer, as shown in FIG. 2 . In FIG. 2 , for the elements with the same numbers as those in FIG. 1 , for the related descriptions of these elements, please refer to the preceding paragraph.
近来,越来越多的无线通讯设计使用差动电路以降低共模(commonmode)噪声,而运用于上述差动电路的电感需为对称式来防止共模噪声产生。在图1和2的电感元件中,与上跨接层113相比,下跨接层111较接近基底100。因此,由第二和第三半圈型导线层102和103及下跨接层111所构成的第一线圈(primary coil),其与基底100之间的寄生电容大于由第一和第四半圈型导线层101和104及上跨接层113所构成的第二线圈(secondarycoil)与基底100之间的寄生电容。再者,由于下跨接层111的厚度小于上跨接层113,因此第一线圈的导体损失也大于第二线圈。如此一来,在差动操作中,上述对称电感元件并无法有效降低共模噪声。Recently, more and more wireless communication designs use differential circuits to reduce common mode noise, and the inductors used in the above differential circuits need to be symmetrical to prevent common mode noise. In the inductor elements of FIGS. 1 and 2 , the
因此,有必要寻求新的对称电感元件设计,以有效降低共模噪声。Therefore, it is necessary to seek a new design of symmetrical inductance components to effectively reduce common-mode noise.
发明内容 Contents of the invention
鉴此,本发明提供一种对称电感元件,包括:绝缘层、第一与第二绕线部和耦接部。绝缘层设置在基底上。第一和第二绕线部相互对称设置在绝缘层内,每一绕线部包括依次同心排列的第一、第二、第三和第四半圈型导线层,且每一半圈型导线层具有第一端和第二端,其中每一绕线部的第一和第三半圈型导线层的第一端相互耦接、第一和第二绕线部的第二半圈型导线层的第一端相互耦接、并且第一和第二绕线部的第四半圈型导线层的第一端相互耦接。耦接部设置在第一与第二绕线部之间的绝缘层内,包括:第一对和第二对连接层,其中一对连接层为上跨接层而另一对连接层为下跨接层。第一绕线部的第一和第四半圈型导线层的第二端通过第一对连接层而分别与第二绕线部的第二和第三半圈型导线层的第二端连接,而第二绕线部的第一和第四半圈型导线层通过第二对连接层而分别与第一绕线部的第二和第三半圈型导线层的第二端连接。In view of this, the present invention provides a symmetrical inductance element, comprising: an insulating layer, a first and a second winding portion, and a coupling portion. The insulating layer is disposed on the substrate. The first and second winding parts are symmetrically arranged in the insulating layer, and each winding part includes first, second, third and fourth semi-circular wire layers arranged concentrically in sequence, and each half-circular conductive layer It has a first end and a second end, wherein the first ends of the first and third half-coil wire layers of each winding part are coupled to each other, and the second half-coil wire layers of the first and second winding parts The first ends of the first and second winding parts are coupled to each other, and the first ends of the fourth half-coil wire layers of the first and second winding parts are coupled to each other. The coupling part is arranged in the insulating layer between the first and second winding parts, including: a first pair and a second pair of connecting layers, wherein one pair of connecting layers is an upper bridging layer and the other pair of connecting layers is a lower pair bridging layer. The second ends of the first and fourth semi-circular wire layers of the first winding part are respectively connected to the second ends of the second and third semi-circular conductive layers of the second winding part through the first pair of connecting layers , and the first and fourth semi-circular wire layers of the second winding part are respectively connected to the second ends of the second and third semi-circular conductive layers of the first winding part through the second pair of connecting layers.
本发明也提供一种对称电感元件,其包括设置在基底上的绝缘层、设置在该绝缘层内的至少二组第一导线组、其中每个第一导线组有二个第一导线;设置在该绝缘层内的至少二组第二导线组、其中每个第二导线组有二个第二导线;被该第一导线组和该第二导线组所包围的中心区域,且第一导线组和第二导线组分别相对于该中心区域对称位置;及至少一组跨接层。其中,跨接层用于连接互相对应的第一导线组与第二导线组,而每组跨接层有第一跨接层和第二跨接层。此外,每个第一导线组有二个第一导线,而每个第二导线组有二个第二导线。进一步,针对由中心区域往外数的奇数组第一导线组和第二导线组,位于内侧的第一导线通过第一跨接层而和位于外侧的第二导线电连接,而位于外侧的第一导线通过第二跨接层而和位于内侧的第二导线电连接。另针对由中心区域往外数的偶数组第一导线组和第二导线组,位于内侧的第一导线通过第二跨接层而和位于外侧的第二导线电连接,而位于外侧的第一导线通过第一跨接层而和位于内侧的第二导线电连接。The present invention also provides a symmetrical inductance element, which includes an insulating layer arranged on a base, at least two first wire groups arranged in the insulating layer, wherein each first wire group has two first wires; At least two sets of second wire groups in the insulating layer, wherein each second wire group has two second wires; a central area surrounded by the first wire group and the second wire group, and the first wires The first group and the second group of wires are located symmetrically with respect to the central area; and at least one set of bridging layers. Wherein, the jumper layer is used to connect the corresponding first wire group and the second wire group, and each group of jumper layers has a first jumper layer and a second jumper layer. In addition, each first wire group has two first wires, and each second wire group has two second wires. Further, for the odd groups of first wire groups and second wire groups counted outward from the central area, the first wires located inside are electrically connected to the second wires located outside through the first bridging layer, and the first wires located outside are electrically connected to the second wires located outside. The wire is electrically connected to the second wire located inside through the second jumper layer. In addition, for the even groups of first wire groups and second wire groups counted outward from the central area, the first wires located inside are electrically connected to the second wires located outside through the second bridging layer, and the first wires located outside are electrically connected to the second wires located outside. It is electrically connected with the second wire located inside through the first jumper layer.
本发明又提供一种对称电感元件,其包括设置在基底上的绝缘层、设置在该绝缘层内的至少一个第一导线组、设置在该绝缘层内的至少一个第二导线组及至少一组跨接层。其中,该组跨接层用于连接互相对应的第一导线组与第二导线组,而每组跨接层有第一跨接层和第二跨接层。除此,每个第一导线组有四个第一导线,而每个第二导线组有四个第二导线,其中该第一导线组和第二导线组轴对称的设置。进一步,在第一导线组中位于外侧的二个第一导线通过二个第一跨接层电连接于相对应的第二导线组中位于内侧的二个第二导线。在第一导线组中位于内侧的二个第一导线通过二个第二跨接层电连接于相对应的第二导线组中位于外侧的二个第二导线。The present invention further provides a symmetrical inductance element, which includes an insulating layer disposed on a substrate, at least one first wire group disposed in the insulating layer, at least one second wire group disposed in the insulating layer, and at least one Group spanning layers. Wherein, the set of bridging layers is used to connect the corresponding first wire group and the second wire group, and each set of bridging layers has a first bridging layer and a second bridging layer. Besides, each first wire group has four first wires, and each second wire group has four second wires, wherein the first wire group and the second wire group are arranged axially symmetrically. Further, the two first wires on the outside of the first wire group are electrically connected to the two second wires on the inside of the corresponding second wire group through the two first bridging layers. The two inner first wires in the first wire group are electrically connected to the two outer second wires in the corresponding second wire group through the two second jumper layers.
附图说明 Description of drawings
图1是展示现有二匝对称型电感元件的平面示意图。FIG. 1 is a schematic plan view showing a conventional two-turn symmetrical inductance element.
图2是展示现有二匝对称型电感元件的平面示意图。FIG. 2 is a schematic plan view showing a conventional two-turn symmetrical inductance element.
图3是展示根据本发明实施例的二匝对称型电感元件的平面示意图。FIG. 3 is a schematic plan view showing a two-turn symmetrical inductance element according to an embodiment of the present invention.
图4是展示根据本发明另一实施例的二匝对称型电感元件的平面示意图。FIG. 4 is a schematic plan view showing a two-turn symmetrical inductance element according to another embodiment of the present invention.
简单符号说明simple notation
在现有技术的部分附图中In some drawings of the prior art
2~虚线;10~第一端;20~第二端;30、40~侧向延伸部;100~基底;101~第一半圈型导线层;103~第二半圈型导线层;102~第三半圈型导线层;104~第四半圈型导线层;110~绝缘层;111~下跨接层;113~上跨接层。2~dotted line; 10~first end; 20~second end; 30, 40~lateral extension; 100~base; 101~first semicircle-shaped conductor layer; 103~second semicircular conductor layer; 102 ~Third half-circle wire layer; 104~Fourth half-circle wire layer; 110~Insulation layer; 111~Lower jumper layer; 113~Upper jumper layer.
在本发明技术的部分附图中In some drawings of the technology of the present invention
4~虚线;50~第一端;60~第二端;70、80~侧向延伸部;300~基底;301、302、309、310~第一半圈型导线层;303、304、311、312~第二半圈型导线层;305、306、313、314~第三半圈型导线层;307、308、315、316~第四半圈型导线层;410~绝缘层;320、322~第一对连接层;321、323~第二对连接层;324、326~第三对连接层;325、327~第四对连接层;S~线距;W~线宽;601~中心区域;701、801~下连接层。4~dotted line; 50~first end; 60~second end; 70, 80~lateral extension; 300~base; 301, 302, 309, 310~first half-circle wire layer; , 312~the second half-circle conductor layer; 305, 306, 313, 314~the third semicircle conductor layer; 307, 308, 315, 316~the fourth semicircle conductor layer; 410~insulation layer; 320, 322~the first pair of connection layers; 321, 323~the second pair of connection layers; 324, 326~the third pair of connection layers; 325, 327~the fourth pair of connection layers; S~line spacing; W~line width; 601~ Central area; 701, 801~lower connection floor.
具体实施方式 Detailed ways
以下结合图3说明本发明实施例的二匝对称电感元件的平面示意图。对称电感元件包括:绝缘层410、第一和第二绕线部以及耦接部。绝缘层410设置在基底300上。A schematic plan view of a two-turn symmetrical inductance element according to an embodiment of the present invention will be described below with reference to FIG. 3 . The symmetrical inductance element includes: an
基底300包括硅基底或其它现有的半导体基底。基底300中可包括各种不同的元件,例如晶体管、电阻及其它常用的半导体元件。再者,基底300也可包括其它导电层(例如,铜、铝、钨、或其合金)和绝缘层(例如,氧化硅层、氮化硅层或低介电材料层)。此处为了简化附图,仅以平整基底表示。The
另外,绝缘层410可为单层低介电材料层或是多层介电结构。在本实施例中,绝缘层410可包括氧化硅层、氮化硅层或低介电材料层。In addition, the
第一绕线部设置在绝缘层410内,且位于虚线4的第一侧。第一绕线部包括依次同心排列的第一、第二、第三和第四半圈型导线层301、303、305和307。第二绕线部设置在绝缘层410内,且位于虚线4的第二侧,而此第二侧相对于第一侧。第二绕线部包括依次同心排列的第一、第二、第三和第四半圈型导线层302、304、306和308。第二绕线部以虚线4为对称轴而对称于第一绕线部。第一和第二绕线部可构成大体为圆型、矩型、六边型、八边型或多边型的外型。此处,为简化附图,以八边型作为范例说明。再者,第一和第二绕线部的材料可由金属所构成,例如:铜、铝或其合金。The first winding portion is disposed in the insulating
在一些实施例中,第一绕线部的第一、第二、第三和第四半圈型导线层301、303、305和307与第二绕线部的第一、第二、第三和第四半圈型导线层302、304、306和308可具有相同的线宽W与线距S。In some embodiments, the first, second, third and fourth semi-circular wire layers 301, 303, 305 and 307 of the first winding part are connected with the first, second, third The line width W and the line spacing S may be the same as those of the fourth semi-circular wire layers 302 , 304 , 306 and 308 .
再者,每一半圈型导线层具有第一端50和第二端60。在本实施例中,第一绕线部的第一和第三半圈型导线层301和305的第一端50相互耦接,且第二绕线部的第一和第三半圈型导线层302和306的第一端50相互耦接。举例而言,通过下连接层701以连接第一绕线部的第一和第三半圈型导线层301和305,而第二绕线部的第一和第三半圈型导线层302和306也通过另一个下连接层801以互相连接。Furthermore, each semi-circular wire layer has a
第一和第二绕线部的第一半圈型导线层301和302具有侧向延伸部70和80,用以作为信号输入或输出端。再者,第一绕线部的第二半圈型导线层303的第一端50延伸至第二绕线部的第二半圈型导线层304的第一端50以与其相互耦接。第一绕线部的第四半圈型导线层307的第一端50延伸至第二绕线部的第四半圈型导线层308的第一端50以与其相互耦接。The first semi-circular wire layers 301 and 302 of the first and second winding parts have
耦接部设置在第一与第二绕线部之间的绝缘层410内设置耦接部。该耦接部包括第一对连接层320和322和第二对连接层321和323,以连接第一和第二绕线部的第二端60。The coupling portion is disposed in the insulating
在本发明的实施例中,为了维持电感元件几何对称性,第一对连接层320和322连接第一绕线部的第一半圈型导线层301的第二端60与第二绕线部的第二半圈型导线层304的第二端60。并且,连接层322连接第一绕线部的第四半圈型导线层307的第二端60与第二绕线部的第三半圈型导线层306的第二端60。再者,第二对连接层321和323连接第二绕线部的第一半圈型导线层302的第二端60与第一绕线部的第二半圈型导线层303的第二端60。连接层323连接第二绕线部的第四半圈型导线层308的第二端60与第一绕线部的第三半圈型导线层305的第二端60。In an embodiment of the present invention, in order to maintain the geometric symmetry of the inductance element, the first pair of connection layers 320 and 322 connect the
在第一对连接层(320和322)和第二对连接层(321和323)之中,一对为上跨接层而另一对为下跨接层。在本实施例中,第一对连接层320和322为上跨接层,而第二对连接层321和323为下跨接层。在其它实施例中,第一对连接层320和322可为下跨接层,而第二对连接层321和323为上跨接层。Among the first pair of connection layers (320 and 322) and the second pair of connection layers (321 and 323), one pair is an upper bridging layer and the other pair is a lower bridging layer. In this embodiment, the first pair of connection layers 320 and 322 are upper bridging layers, and the second pair of connection layers 321 and 323 are lower bridging layers. In other embodiments, the first pair of connecting
在图3中,第一绕线部的第一和第三半圈型导线层301和305与第二绕线部的第二和第四半圈型导线层304和308可构成第一线圈,而此第一线圈可具有上跨接层和下跨接层以作为电连接层。除此,第二绕线部的第一和第三半圈型导线层302和306与第一绕线部的第二和第四半圈型导线层303和307可构成第二线圈,而此第二线圈可具有上跨接层和下跨接层以作为电连接层。也就是,第一线圈中上跨接层和下跨接层的数量相同于第二线圈中上跨接层和下跨接层的数量。In FIG. 3, the first and third semi-circular wire layers 301 and 305 of the first winding part and the second and fourth semi-circular
因此,第一线圈与基底300之间的寄生电容可大体相同于第二线圈与基底300之间的寄生电容,且第一线圈的导体损失也大体相同于第二线圈。在差动操作中,根据本发明的对称电感元件可因第一线圈与第二线圈具有大体相同的寄生电容和导体损失,而有效降低共模噪声。Therefore, the parasitic capacitance between the first coil and the
以下结合图4说明本发明其它实施例的对称电感元件,其中相同于图3中对称电感元件的部件使用相同的标号并省略相关的说明。在本实施例中,对称电感元件还包括:第三绕线部、第四绕线部和第二耦接部。第三绕线部设置在第一绕线部外侧的绝缘层410内,且平行第一绕线部。第三绕线部包括依次排列的第一、第二、第三和第四半圈型导线层309、311、313和315。第四绕线部设置在第二绕线部外侧的绝缘层410内,且平行第二绕线部。第二绕线部包括依次排列的第一、第二、第三和第四半圈型导线层310、312、314和316。第三和第四绕线部可构成大体为圆型、矩型、六边型、八边型或多边型的外型。此处,为简化附图,以八边型作为范例说明。再者,第三和第四绕线部的材料可由金属所构成,例如:铜、铝或其合金。The symmetrical inductance element of other embodiments of the present invention will be described below with reference to FIG. 4 , wherein the components that are the same as those of the symmetrical inductive element in FIG. 3 use the same reference numerals and related descriptions will be omitted. In this embodiment, the symmetrical inductance element further includes: a third winding part, a fourth winding part and a second coupling part. The third winding part is disposed in the insulating
在关于图4的实施例中,第三绕线部的第一、第二、第三和第四半圈型导线层309、311、313和315与第四绕线部的第一、第二、第三和第四半圈型导线层310、312、314和316可具有相同的线宽W与线距S。In the embodiment of FIG. 4, the first, second, third and fourth semi-circular wire layers 309, 311, 313 and 315 of the third winding part are connected with the first and second winding layers of the fourth winding part. , the third and fourth semi-circular wire layers 310 , 312 , 314 and 316 may have the same line width W and line spacing S.
在本实施例中,第三绕线部的第一和第三半圈型导线层309和313的第一端50相互耦接,并耦接至第一绕线部的第一圈型导线层301。第二绕线部的第一和第三半圈型导线层310和314的第一端50相互耦接,并耦接至第二绕线部的第一圈型导线层302。举例而言,通过下连接层701以连接第三绕线部的第一和第三半圈型导线层309和313,而第四绕线部的第一和第三半圈型导线层310和314也通过另一个下连接层801以互相连接。In this embodiment, the first ends 50 of the first and third semi-circular wire layers 309 and 313 of the third winding part are coupled to each other and coupled to the first coil-shaped wire layer of the first winding
第三和第四绕线部的第一半圈型导线层309和310分别具有侧向延伸部70和80,用以作为信号输入或输出端。再者,第三绕线部的第二半圈型导线层311的第一端50延伸至第四绕线部的第二半圈型导线层312的第一端50以与其相互耦接。第三绕线部的第四半圈型导线层315的第一端50延伸至第四绕线部的第四半圈型导线层316的第一端50以与其相互耦接。The first semi-circular wire layers 309 and 310 of the third and fourth winding parts respectively have
在第三与第四绕线部之间的绝缘层410内设置耦接部,而此耦接部包括第三对连接层324和326、第四对连接层325和327,以连接第三和第四绕线部的第二端60。连接层324连接第三绕线部的第一半圈型导线层309的第二端60与第四绕线部的第二半圈型导线层312的第二端60,而连接层326连接第三绕线部的第四半圈型导线层315的第二端60与第四绕线部的第三半圈型导线层314的第二端60。再者,连接层325连接第四绕线部的第一半圈型导线层310的第二端60与第三绕线部的第二半圈型导线层311的第二端60,而连接层327连接第四绕线部的第四半圈型导线层316的第二端60与第三绕线部的第三半圈型导线层313的第二端60。A coupling part is provided in the insulating
在第三对连接层(324和326)和第四对连接层(325和327)之中,一对为上跨接层而另一对为下跨接层。在本实施例中,见图4,第三对连接层324和326为上跨接层,而第四对连接层325和327为下跨接层。在其它实施例中,第三对连接层324和326可为下跨接层,而第四对连接层325和327为上跨接层。Of the third pair of connection layers (324 and 326) and the fourth pair of connection layers (325 and 327), one pair is an upper bridging layer and the other pair is a lower bridging layer. In this embodiment, as shown in FIG. 4 , the third pair of connection layers 324 and 326 is an upper bridge layer, and the fourth pair of connection layers 325 and 327 is a lower bridge layer. In other embodiments, the third pair of connecting
在关于图4的实施例中,第一绕线部的第一和第三半圈型导线层301和305、第三绕线部的第一和第三半圈型导线层309和313、第二绕线部的第二和第四半圈型导线层304和308及第四绕线部的第二和第四半圈型导线层312和316可构成第一线圈;而第二绕线部的第一和第三半圈型导线层302和306、第四绕线部的第一和第三半圈型导线层310和314、第一绕线部的第二和第四半圈型导线层303和307及第三绕线部的第二和第四半圈型导线层311和315可构成第二线圈。此第一线圈和第二线圈可具有相同数量的上跨接层和下跨接层。因此,在差动操作中,此对称电感元件可有效降低共模噪声。In the embodiment of FIG. 4, the first and third semi-circular wire layers 301 and 305 of the first winding part, the first and third semi-circular
在本发明的实施例中,下跨接层和第一端或第二端的连接方式为,跨接层的二端分别连接一个孔洞(via),此孔洞内有导体物质(例如:铜、铝或其合金等金属类物质),而孔洞的一端和导线层的第一端或第二端电连接。除此,下连接层(701或801)和第一端的连接方式为,导线层的第一端连接一个孔洞,此孔洞内有导体物质(例如:铜、铝或其合金等金属类物质),而孔洞的一端和下连接层电连接。In an embodiment of the present invention, the connection mode between the lower bridging layer and the first end or the second end is that the two ends of the bridging layer are respectively connected to a hole (via), and there is a conductive material (such as copper, aluminum, etc.) in the hole. or its alloy and other metal substances), and one end of the hole is electrically connected to the first end or the second end of the wire layer. In addition, the connection method between the lower connection layer (701 or 801) and the first end is that the first end of the wire layer is connected to a hole, and there is a conductive substance (such as copper, aluminum or its alloys and other metal substances) in the hole. , and one end of the hole is electrically connected to the lower connection layer.
综合上述关于图3和图4的实施例的描述,我们可以对本发明的实施例中电感元件的设计做进一步阐述。Based on the above descriptions about the embodiments of FIG. 3 and FIG. 4 , we can further elaborate on the design of the inductance element in the embodiment of the present invention.
在图3和图4中,被导线层(或称导线)307和308等所包围的区域可视为中心区域601。由中心区域601往外,导线层307、303、308、304、315、311、316和312等可视为第奇数个导线,而导线层305、301、306、302、313、309、314和310等可视为第偶数个导线。各导线都具有第一端50和第二端60。而对中心区域601最远的二个导线(在图3中的导线301和302,或在图4中的导线309和310),各导线的第一端50分别连接延伸部70和延伸部80。In FIG. 3 and FIG. 4 , the area surrounded by wire layers (or called wires) 307 and 308 can be regarded as a
关于导线的第一端50的连接方式有二类。一是,在虚线4同一侧的第偶数个导线的第一端是互相电连接的。二是,对于虚线4两侧的相对应的第奇数个导线,这些导线的第一端是互相电连接的。There are two types of connection methods for the
关于第一类方式,举例而言,在图3中,在虚线4一侧的导线301和305,其属于第偶数个导线,而通过下连接层701电连接。在虚线4另一侧的导线302和306,其也属于第偶数个导线,而通过下连接层801电连接。另在图4中,在虚线4一侧的导线301、305、313和309,其属于第偶数个导线,而通过下连接层701电连接。在虚线4另一侧的导线306、302、314和310,其也属于第偶数个导线,而通过下连接层801电连接。应注意的是在图4的下连接层,其可是单一的连接层以连接所有的第偶数个导线,或者其可由多个连接层所构成,而此连接层仅电连接相邻两个第偶数个导线。Regarding the first method, for example, in FIG. 3 , the
关于第二类方式,举例而言,在图3和图4中,在虚线4一侧的导线307、303、315和311等,其属于第奇数个导线,而这些导线分别和在虚线4另一侧的、互相对应的导线308、304、316和312等电连接。Regarding the second type of mode, for example, in Fig. 3 and Fig. 4, the
关于导线的第二端60的连接方式,若以相邻的二导线(例如:导线307和305、导线308和306、导线303和301、导线304和302)为一导线组,每一导线组的内侧导线的第二端会电连接至相对应的导线组的外侧导线的第二端,而此连接是通过跨接层。也就是,以虚线4为中心而互相对应的导线组需要二个跨接层来相互电连接。而这二个跨接层可为上下交错的。举例而言,在图3与图4中,虚线4的一侧有第1组第一导线组(导线307和305)和第2组第一导线组(导线303和301),而虚线4的另一侧有第1组第二导线组(导线308和306)和第2组第二导线组(导线304和302)。第1组第一导线组和第1组第二导线组间有二个跨接层322和323,而第2组第一导线组和第2组第二导线组间有二个跨接层320和321。Regarding the connection mode of the
在图3和图4中,由中心区域601往外数的第奇数组导线组可具有相同的跨接层上下交错的结构,而此结构不同于第偶数组导线组的跨接层上下交错的结构。举例而言,当连接第1组第一导线组的内侧导线307和第1组第二导线组的外侧导线306的跨接层是与导线设置在同一层时,第2组第一导线组的内侧导线305和第2组第二导线组的外侧导线302的跨接层将置于导线层的下方。此时,连接第1组第一导线组的外侧导线305和第1组第二导线组的内侧导线308的跨接层是置于导线层下方,而第2组第一导线组的外侧导线301和第2组第二导线组的外内导线304的跨接层是与导线设置于同一层。In Fig. 3 and Fig. 4, the odd-th wire groups counted outward from the
关于导线的第二端60的连接方式,也可以相邻的四个导线(例如:导线307、305、303和301,导线308、306、304和302)为一导线组而阐述。Regarding the connection manner of the
举例而言,在图3和图4中,导线307、305、303和301等构成第一导线组,而导线308、306、304和302等构成第二导线组。第一导线组的外侧导线301和307的第二端通过第一跨接层(320和322)而电连接至第二导线组的内侧导线304和306的第二端。而第一导线组的内侧导线303和305的第二端也通过第二跨接层(321和323)而电连接至第二导线组的外侧导线302和308的第二端。For example, in FIG. 3 and FIG. 4 , the
除此,第一跨接层(320和322)和第二跨接层(321和323)是上下交错的。而此上下交错的原则包括:Besides, the first bridging layers (320 and 322) and the second bridging layers (321 and 323) are staggered up and down. The principles of this staggered up and down include:
(1)在第一跨接层(320和322)和第二跨接层(321和323)中,一跨接层会和导线层同一层,而另一跨接层会置于导线层的下方。(1) In the first jumper layer (320 and 322) and the second jumper layer (321 and 323), one jumper layer will be on the same layer as the wire layer, and the other jumper layer will be placed on the wire layer below.
(2)靠近中心区域601的二个跨接层(322和323)会上下交错,而远离中心区域601的二个跨接层(320和321)会上下交错。(2) The two bridging layers ( 322 and 323 ) close to the
值得注意的是,在本发明的实施例中,关于导线层第二端的电连接方式,其未在第一端处实行的原因是,可避免由基底产生的寄生电容所造成的电感对称性破坏的问题。It is worth noting that, in the embodiment of the present invention, the reason why the electrical connection mode of the second end of the wire layer is not implemented at the first end is that the inductance symmetry breaking caused by the parasitic capacitance generated by the substrate can be avoided The problem.
虽然本发明已以优选实施例揭示如上,然而其并非用以限定本发明,任何所属技术领域中的普通技术人员,在不脱离本发明的精神和范围内,当可作更动与修改,因此本发明的保护范围当以所附权利要求所界定者为准。Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make changes and modifications without departing from the spirit and scope of the present invention. Therefore The protection scope of the present invention should be defined by the appended claims.
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CN1649087A (en) * | 2004-01-29 | 2005-08-03 | 国际商业机器公司 | Method of forming inductor and semiconductor structure |
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CN1241794A (en) * | 1998-07-06 | 2000-01-19 | Tdk株式会社 | Inductor device and process of production thereof |
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