CN100416344C - Active element array substrate, liquid crystal display panel and detection method of active element array substrate and liquid crystal display panel - Google Patents

Abstract

An active device array substrate. The pixel units are arranged in the display area of the substrate, and the scanning lines and the data lines control the pixel units. The inner anti-static ring comprises a first line segment, a second line segment and a connecting line segment connecting the first line segment and the second line segment. The gate and source of the first active device and the gate and source of the second active device are connected to the first and second line segments, respectively, and the drain is connected to the connecting line segment. The grid and the source of part of the third active elements are connected with the first line segment, and the drain is connected with the odd-numbered scanning lines, while the grid and the source of the other part of the third active elements are connected with the second line segment, and the drain is connected with the even-numbered scanning lines. The grid electrode of the fourth active element is connected with the connecting line segment, the source electrode of the fourth active element is connected with the data test line, and the drain electrode of the fourth active element is respectively connected with the odd number data line and the even number data line.

Description

Active element array substrate, liquid crystal display panel and detection method for both

technical field

The present invention relates to an active element array substrate, a display panel, and a detection method thereof, and in particular to an active element array substrate with an inner short ring, a liquid crystal display panel, and a detection method thereof.

Background technique

Due to the increasing demand for displays, the industry is fully committed to the development of related displays. Among them, the cathode ray tube (cathode ray tube, CRT) has been monopolizing the display market for many years due to its excellent display quality and technological maturity. However, due to the rise of the concept of green environmental protection, the characteristics of large energy consumption and large radiation, and the limited space for product flattening, it cannot meet the market demand for light, thin, short, small, beautiful and low power consumption. market trends. Therefore, thin film transistor liquid crystal display (TFT-LCD) with superior characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation has gradually become the mainstream of the market.

For a TFT-LCD module, it is mainly composed of a liquid crystal display panel and a backlight module. Among them, the liquid crystal display panel is usually composed of a thin film transistor array substrate (thin film transistor array substrate), a color filter substrate (color filter substrate) and a liquid crystal layer arranged between the two substrates, and the backlight module is used to provide the liquid crystal display The surface light source required by the panel, so that the liquid crystal display module can achieve the display effect.

The thin film transistor array substrate can be divided into a display region and a peripheral circuit region, where a plurality of pixel units arranged in an array are arranged on the display region, and each pixel unit includes a thin film transistor and a thin film The pixel electrode to which the transistor is connected. In addition, a plurality of scan lines and data lines are arranged in the peripheral circuit area and the display area, wherein the thin film transistor of each pixel unit is controlled by the corresponding scan lines and data lines .

After the process of the thin film transistor array substrate is completed, the pixel units on the thin film transistor array substrate are usually electrically tested to determine whether the pixel units can operate normally. When the pixel unit fails to operate normally, defective elements (such as thin film transistors or pixel electrodes, etc.) or circuits can be repaired. However, in order to inspect the pixel units, an examining circuit (examining circuit) needs to be fabricated on the peripheral circuit area of the thin film transistor array substrate. It should be noted that these test circuits are not only complicated, but also reduce the area that can be used as layout on the panel. In addition, after the inspection is completed, these test lines must be disabled by using laser cutting technology, so as not to affect the display quality of the liquid crystal display panel.

In addition, liquid crystal display panels usually have static electricity accumulated in the panel due to external factors, such as human handling or environmental changes. In this way, when the charges accumulate to a certain amount, the lines on the thin film transistor array substrate or the thin film transistors may be damaged due to electrostatic discharge. In order to avoid the problem of electrostatic damage, an electrostatic discharge (ESD) protection circuit is usually provided on the peripheral circuit area of the thin film transistor array substrate.

However, it is known that if the above detection and electrostatic protection functions are to be achieved, the detection circuit and the electrostatic discharge protection circuit must be fabricated simultaneously on the peripheral circuit area of the thin film transistor array substrate. In this way, not only the layout of the peripheral circuits is more complicated, but also the problem of insufficient wiring space may occur, which is relatively unfavorable for the simplification of the process and the improvement of the production efficiency.

Contents of the invention

In view of the above circumstances, the purpose of the present invention is to provide an active device array substrate, the wiring of which is relatively simple.

In addition, another object of the present invention is to provide a liquid crystal display panel whose detection circuit can be simplified.

In addition, another object of the present invention is to provide a detection method to detect whether there is a short circuit between the wirings of the active device array substrate.

Moreover, another object of the present invention is to provide a detection method to detect whether the display of the liquid crystal display panel is normal.

Based on the above purpose and other purposes, the present invention proposes an active element array substrate, including a substrate, a plurality of pixel units, a plurality of scanning lines, a plurality of data lines, two data test lines, an internal antistatic ring, a first active element , a second active element, a plurality of third active elements and a plurality of fourth active elements. The substrate has an adjacent display area and a peripheral circuit area. The pixel unit is arranged in the display area. The scan line and the data line are arranged on the substrate and control the pixel unit. The data test line is set in the peripheral circuit area. The inner antistatic ring is arranged in the surrounding circuit area, and includes a first line segment, a second line segment and a connecting line segment electrically connecting the first line segment and the second line segment. The first active device, the second active device, each third active device and each fourth active device have a gate, a source and a drain. The gate and source of the first active element are connected to the first line segment, and the drain is connected to the connecting line segment. The gate and source of the second active element are connected to the second line segment, and the drain is connected to the connection line segment. The third active element is arranged in the peripheral line area, and the gate and source of some of the third active elements are connected to the first line segment, and the corresponding drain is connected to an odd number of scanning lines, while the other part of the third active element The gate and source of the element are connected to the second line segment, and the corresponding drain is connected to the even scanning lines. The fourth active element is arranged in the peripheral circuit area, wherein the gate of the fourth active element is connected to the connection line segment, and part of the sources are respectively connected to one of the data test lines, and the corresponding drains are connected to an odd number of data lines , the source electrodes of the other parts are respectively connected to the other one of the data test lines, and the corresponding drain electrodes are connected to the even-numbered data lines.

According to an embodiment of the present invention, the inner antistatic ring is located outside the data test line.

According to an embodiment of the present invention, each pixel unit includes a fifth active device and a pixel electrode. The fifth active element is electrically connected to the corresponding scan line and data line, and the pixel electrode is electrically connected to the fifth active element.

According to an embodiment of the present invention, the active device array substrate further includes a plurality of detection pads, which are arranged in the peripheral circuit area on the substrate, and the ends of the first line segment and the second line segment of the internal antistatic ring are respectively connected to the detection pads. One connection, and one end of each data test line is respectively connected to one of these detection pads.

According to an embodiment of the present invention, the active device array substrate further includes a plurality of common wires and a detection wire connected to one end of these common wires, wherein the common wire is arranged on the substrate and extends from the display area to the peripheral circuit area, The detection wiring is arranged in the peripheral circuit area on the substrate.

According to an embodiment of the present invention, the data test line is a dummy data line, and the data test line is located on both sides of the data line.

According to an embodiment of the present invention, the data test line is another internal antistatic ring.

The present invention also proposes a liquid crystal display panel, including the above-mentioned active element array substrate, color filter substrate and liquid crystal layer. Wherein, the liquid crystal layer is arranged between the color filter substrate and the active element array substrate.

The present invention further proposes a detection method for an active device array substrate, which is suitable for the above-mentioned active device array substrate. The detection method for the active device array substrate includes the following steps. The first scanning signal is input to the first line segment of the inner antistatic ring to turn on the first active element and the fourth active element, and the first scanning signal is input to the odd scanning lines through a part of the third active element. The second scanning signal is input to the second line segment of the inner antistatic ring to turn off the second active element and part of the third active element connected to the even scanning lines. Wherein, the first scan signal is a high gate voltage signal (Vgh), and the second scan signal is a low gate voltage signal (Vgl). The first data signal is input to one of the data test lines, and the first data signal is input to the corresponding data line through a part of the fourth active element. Measure the voltage of another data test line.

The present invention proposes a detection method for an active device array substrate, which is suitable for the above-mentioned active device array substrate. The detection method for the active device array substrate includes the following steps. Input the first scan signal to the first segment of the inner antistatic ring. The second scanning signal is input to the second line segment of the inner antistatic ring, at least one of the first scanning signal and the second scanning signal is a high gate voltage signal. Measure the voltage of the data test line.

According to an embodiment of the present invention, the first scan signal is a high gate voltage signal, and the second scan signal is a low gate voltage signal. Alternatively, both the first scan signal and the second scan signal are high gate voltage signals.

The present invention proposes a detection method for an active device array substrate, which is suitable for the above-mentioned active device array substrate. The detection method for the active device array substrate includes the following steps. Input the first scan signal to the first segment of the inner antistatic ring. The second scanning signal is input to the second line segment of the inner antistatic ring, at least one of the first scanning signal and the second scanning signal is a high gate voltage signal. Measure the voltage of the detection trace.

According to an embodiment of the present invention, the first scan signal is a high gate voltage signal, and the second scan signal is a low gate voltage signal. Alternatively, both the first scan signal and the second scan signal are high gate voltage signals.

The present invention proposes a detection method for an active device array substrate, which is suitable for the above-mentioned active device array substrate. The detection method for the active device array substrate includes the following steps. Input the first scan signal to the first segment of the inner antistatic ring. Input the second scan signal to the second segment of the inner antistatic ring. Wherein, at least one of the first scan signal and the second scan signal is a high gate voltage signal. The first data signal is input to one of the data test lines, and the first data signal is input to the corresponding data line through a part of the fourth active element. Measure the voltage of the detection trace.

The present invention proposes a detection method for a liquid crystal display panel, which is suitable for the above-mentioned liquid crystal display panel. The detection method includes the following steps. A light source is provided, and the liquid crystal display panel is placed above the light source. Input the first scan signal to the first segment of the inner antistatic ring. The second scanning signal is input to the second line segment of the inner antistatic ring, at least one of the first scanning signal and the second scanning signal is a high gate voltage signal. Input the first data signal to one of the data test lines. Input the second data signal to another data test line.

According to an embodiment of the present invention, when the first scan signal, the second scan signal, the first data signal and the second data signal are input to one of the first line segment, the second line segment, the data test line and the other data test line After that, the LCD panel displays a black screen, a white screen or a gray screen.

According to an embodiment of the present invention, when the first scan signal, the second scan signal, the first data signal and the second data signal are input to one of the first line segment, the second line segment, the data test line and the other data test line Afterwards, the liquid crystal display panel presents a straight or horizontal bright line picture.

According to an embodiment of the present invention, when the first scan signal, the second scan signal, the first data signal and the second data signal are input to one of the first line segment, the second line segment, the data test line and the other data test line Afterwards, the liquid crystal display panel presents an image of an array of bright spots.

In summary, the present invention uses the internal antistatic ring, the first active element and the second active element as the detection circuit, so the detection circuit and the electrostatic discharge protection circuit can be integrated together. Therefore, the wiring is relatively simple, the number of detection pads is small, and the layout space is relatively large. In addition, the display picture of the liquid crystal display panel will not be affected by the detection circuit through the third active element and the fourth active element. Therefore, it is not necessary to cut off the detection circuit by laser cutting process, and it is not necessary to purchase additional laser cutting machines. Furthermore, the present invention uses a single detection circuit to detect odd or even scanning lines, so that the input odd and even signals will not affect each other.

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments of the present invention will be described in detail below together with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic structural view of an active device array substrate according to a preferred embodiment of the present invention.

FIG. 2 is a partially enlarged view of the area S10 in FIG. 1 .

FIG. 3 is a top view of a liquid crystal display panel assembled using the active device array substrate of FIG. 1 .

Description of main component marking

100: active element array substrate

110: Substrate

112: display area

114: Peripheral line area

120: pixel unit

122: The fifth active component

124: pixel electrode

130: scan line

140: data line

150: data test line

160: Internal antistatic ring

162: first line segment

162a, 164a, 150a: detection pads

164: second line segment

166: Connecting Line Segments

172: The first active component

172d, 174d, 180d, 190d: drains

172g, 174g, 180g, 190g: grid

172s, 174s, 180s, 190s: source

174: The second active component

180: The third active component

190: The fourth active component

200: color filter substrate

300: LCD display panel

Cs: Common wiring

L: Detect wiring

S10: Area

Detailed ways

FIG. 1 is a schematic structural view of an active device array substrate according to a preferred embodiment of the present invention. Please refer to FIG. 1 , the active element array substrate 100 includes a substrate 110, a plurality of pixel units 120, a plurality of scanning lines 130, a plurality of data lines 140, two data test lines 150, an internal antistatic ring 160, and a first active element 172. , a second active element 174 , a plurality of third active elements 180 and a plurality of fourth active elements 190 .

Wherein, the substrate 110 is, for example, a glass substrate, a quartz substrate, or a substrate of other suitable materials, and the substrate 110 has an adjacent display area 112 and a peripheral circuit area 114 . The pixel unit 120 is disposed in the display area 112 . The scan lines 130 are, for example, aluminum alloy wires or wires formed of other suitable conductive materials, and the data lines 140 are, for example, chromium metal wires, aluminum alloy wires, or wires formed of other suitable conductive materials. Both the scan lines 130 and the data lines 140 are disposed on the substrate 110 for controlling the pixel units 120 . The data test line 150 is, for example, a chromium metal wire, an aluminum alloy wire, or a wire formed of other suitable conductive materials, and the data test line 150 is disposed in the peripheral circuit area 114 . The inner antistatic ring 160 is, for example, an aluminum alloy wire, a double metal layer wire, or a wire formed of other suitable conductive materials. The inner antistatic ring 160 is disposed in the peripheral circuit area 114 and includes a first line segment 162 , a second line segment 164 and a connecting line segment 166 electrically connecting the first line segment 162 and the second line segment 164 .

The first active element 172, the second active element 174, the third active element 180, and the fourth active element 190 are, for example, thin film transistors, low temperature polysilicon thin film transistors (low temperaturepoly silicon thin film transistor, LTPS-TFT) or other devices with three terminals the switching element. The first active device 172 , the second active device 174 , the third active device 180 and the fourth active device 190 are all disposed on the substrate 110 . The first active device 172 has a gate 172g, a source 172s and a drain 174d. The second active device 174 has a gate 174g, a source 174s and a drain 174d. Each third active device 180 has a gate 180g, a source 180s and a drain 180d. Each fourth active device 190 has a gate 190g, a source 190s and a drain 190d.

The gate 172g and the source 172s of the first active device 172 are connected to the first line segment 162 , and the drain 172d is connected to the connecting line segment 166 . The gate 174g and the source 174s of the second active device 174 are connected to the second line segment 164 , and the drain 174d is connected to the connecting line segment 166 . In other words, the connecting line segment 166 electrically connects the first line segment 162 and the second line segment 164 through the first active element 172 and the second active element 174 .

The third active element 180 is disposed in the peripheral circuit area 114 , and the gate 180g and the source 180s of some of the third active elements 180 are connected to the first line segment 162 , and the corresponding drain 180d is connected to an odd number of scan lines 130 connected. The gate 180g and the source 180s of the other part of the third active device 180 are connected to the second line segment 164 , and the corresponding drain 180d is connected to the even scanning lines 130 .

The fourth active device 190 is disposed in the peripheral circuit area 114 , wherein the gate 190 g of the fourth active device 190 is connected to the connection line segment 166 , and part of the sources 190 s are respectively connected to one of the data test lines 150 . The corresponding drains 190d are connected to the odd data lines 140 , the other part of the sources 190s are respectively connected to the other one of the data test lines 150 , and the corresponding drains 190d are connected to the even data lines 140 .

It should be noted that, in this embodiment, the active device array substrate 100 further includes a plurality of detection pads 162 a , 164 a , 150 a disposed in the peripheral circuit region 114 on the substrate 110 . Ends of the first line segment 162 and the second line segment 164 of the inner antistatic ring 160 are respectively connected to the test pads 162a, 164a, and one end of each data test line 150 is respectively connected to one of the test pads 150a. The detection pads 162a, 164a, 150a can be pressed by the probes of the testing machine to input or read voltage signals. The detection pads 162a, 164a, 150a can be arranged at appropriate positions on the substrate 110 to cooperate with the probe pressing of the detection machine.

In addition, the data test line 150 is a dummy data line, and the data test line 150 is located on both sides of the data line 140 , and the internal antistatic ring 160 is located outside the data test line 150 . However, it should be noted that in other embodiments, the data test line 150 can be another internal antistatic ring 160 , and the internal antistatic ring 160 is not limited to be located outside the data test line 150 .

The active device array substrate 100 of this embodiment also includes a plurality of common wiring Cs and detection wiring L connecting one end of these common wiring Cs, wherein the common wiring Cs is arranged on the substrate and extends from the display area 112 to the periphery The wiring area 114 , and the detection wiring L is disposed in the peripheral wiring area 114 on the substrate 110 . Generally speaking, the common wiring Cs and the detection wiring L are not necessary components, so the active device array substrate of other embodiments does not necessarily include the common wiring Cs and the detection wiring L.

FIG. 2 is a partially enlarged view of the area S10 in FIG. 1 . Referring to FIG. 2 , in the active device array substrate 100 , the pixel unit 120 includes a fifth active device 122 and a pixel electrode 124 . The fifth active element 122 is, for example, a thin film transistor, a low temperature polysilicon thin film transistor or other switching elements with three terminals, and is electrically connected to the corresponding scan line 130 and data line 140 . The pixel electrode 124 is electrically connected to the fifth active device 122, and the pixel electrode 124 is, for example, a transparent electrode, a reflective electrode, or a transflective electrode. Based on the above, the material of the pixel electrode 124 can be ITO, IZO (Indium Zinc Oxide, IZO), metal or other conductive materials.

In the active device array substrate 100 , the inner antistatic ring 160 and the third active device 180 can be used to prevent electrostatic damage, and the data test line 150 and the fourth active device 190 also have the same function. For example, when the static electricity is conducted to the first line segment 162 , the plurality of third active devices 180 connected to the first line segment 162 must be turned on before the static electricity can be conducted to the scan line 130 . However, only when the voltage of the gate 180g of the third active element 180 reaches a certain threshold voltage, the source 180s and the drain 180d will be turned on, so part of the static electricity will be accumulated in the gate 180d of the third active element 180, The remaining part will be conducted to the scan line 130 . Since the first line segment 162 of the inner antistatic ring 160 is electrically connected to the scanning line 130 through a plurality of third active elements 180 , it means that static electricity will form a shunt through a plurality of conduction paths. By turning on a plurality of third active elements 180 and shunting current through multiple paths, the static current conducted to each scan line 130 will be greatly reduced. In other words, the inner antistatic ring 160 and the third active element 180 can prevent static electricity from causing damage to local circuits. Therefore, the first active device 172 , the second active device 174 and the inner antistatic ring 160 can also be collectively referred to as an ESD protection circuit of the active device array substrate 100 . In addition, the first active element 172 and the second active element 174 can also be referred to as electrostatic discharge protection elements. In addition, the mechanism for preventing the electrostatic damage of the data test line 150 and the fourth active device 190 is similar to the above, so it will not be repeated here. It should be noted that the first active device 172 , the second active device 174 and the inner antistatic ring 160 can not only serve as ESD protection circuits, but also serve as detection circuits of the active device array substrate 100 . Since the internal antistatic ring 160, the first active element 172, and the second active element 174 are used as the detection circuit, the detection circuit is integrated with the electrostatic discharge protection circuit, so the wiring is relatively simple, the number of detection pads is small, and the layout space is limited. larger. The data testing line 150 and the fourth active element 190 can also be used as an electrostatic discharge protection line, and can also be used as a detection line of the active element array substrate 100 . The four detection methods of the active device array 100 will be described in detail below.

The first detection method of the active device array substrate 100 includes the following steps. Firstly, input the first scanning signal to the first line segment 162 of the internal antistatic ring 160 to turn on the first active element 172 and the fourth active element 190, and input the first scanning signal to the odd-numbered lines through part of the third active element 180 within scan line 130 . Then, input the second scanning signal to the second line segment 164 of the inner antistatic ring 160 to turn off the second active device 174 and a part of the third active device 180 connected to the even number of scanning lines 130 . It should be noted that the above-mentioned first scanning signal is a high gate voltage signal (high gate voltage, Vgh), and the second scanning signal is a low gate voltage signal (low gate voltage, Vgl). Then, the first data signal is input to one of the data test lines 150 , and the first data signal is input to the corresponding data line 130 through a part of the fourth active element 190 . Then, measure the voltage of another data test line 150 . If a voltage signal similar to the first data signal can be measured when another data test line 150 is measured, then a short circuit occurs between the odd data lines 140 and the even data lines 140 .

The second detection method of the active device array substrate 100 includes the following steps. Firstly, input the first scan signal to the first line segment 162 of the inner antistatic ring 160 . Then, input the second scanning signal to the second line segment 164 of the inner antistatic ring 160 . Then, measure the voltage of the data test line 150 . When the above-mentioned first scan signal is a high gate voltage signal and the second scan signal is a low gate voltage signal, the first active element 172 and the fourth active element 190 will be turned on, and part of the third active element 180 will also be enabled. In this embodiment, the turned-on third active devices 180 are connected to odd scan lines 130 . When measuring the data test lines 150, it can be measured that one of the data test lines 150 has a voltage signal similar to the first scan signal, which means that the odd number of data lines 140 or between the even number of data lines 140 and the odd number of scan lines 130 A short circuit has occurred.

As mentioned above, if the measurement results under the above conditions are normal, both the first scan signal and the second scan signal can be changed to high gate voltage signals. At this time, by measuring whether one of the data test lines 150 has a voltage signal similar to the second scan signal, it can be determined whether a short circuit occurs between the odd data lines 140 or the even data lines 140 and the even scan lines 130 . It is worth mentioning that if the first scan signal is directly changed to a low gate voltage signal and the second scan signal is changed to a high gate voltage signal, it can be measured whether one of the data test lines 150 is similar to the first scan signal In this way, it can also be determined whether there is a short circuit between the odd number of data lines 140 or between the even number of data lines 140 and the even number of scan lines 130 .

The third detection method of the active device array substrate 100 includes the following steps. Firstly, input the first scan signal to the first line segment 162 of the inner antistatic ring 160 . Then, input the second scanning signal to the second line segment 164 of the inner antistatic ring 160 . Then, measure the voltage of the detection line L. If the first scan signal is a high gate voltage signal and the second scan signal is a low gate voltage signal, the first active element 172 and the fourth active element 190 will be turned on, and part of the third active element 180 will also be turned on. is turned on. In this embodiment, the turned-on third active devices 180 are connected to odd scan lines 130 . If the detection wire L has a voltage signal similar to the first scan signal when measuring the detection wire L, it means that a short circuit occurs between the common wire Cs and the odd number of scan lines 130 .

As mentioned above, if the measurement results under the above conditions are normal, both the first scan signal and the second scan signal can be changed to high gate voltage signals. At this time, by measuring whether there is a voltage signal similar to the second scanning signal on the detecting wire L, it can be determined whether a short circuit occurs between the common wire Cs and the even number of scanning lines 130 . Similarly, if the first scan signal is directly changed to a low gate voltage signal and the second scan signal is changed to a high gate voltage signal, it can be measured whether there is a voltage signal similar to the first scan signal on the detection line L, so It may also be determined whether or not a short circuit occurs between the common wiring Cs and an even number of scanning lines 130 .

The fourth inspection method of the active element array substrate includes the following steps. Firstly, input the first scan signal to the first line segment 162 of the inner antistatic ring 160 . Then, input the second scanning signal to the second line segment 164 of the inner antistatic ring 160 . The first data signal is input to one of the data test lines 150 , and the first data signal is input to the corresponding data line 140 through a part of the fourth active element 190 . Then, measure the voltage of the detection line L. Wherein, at least one of the first scan signal and the second scan signal is a high gate voltage signal. In this way, the fourth active element 190 will be turned on. If the detection trace L has a voltage signal similar to the first data signal when measuring the detection trace L, it means that there is a short circuit between the common wire Cs and the odd data lines 140 or the even data lines 140 .

From the detection method of the above-mentioned active element array substrate 100, it can be known that in this embodiment, the internal antistatic ring, the first active element and the second active element are used as a single detection line for detecting odd or even scanning lines, and the input parity Signals do not affect each other. The internal antistatic ring 160 can not only prevent electrostatic damage, but also serve as a detection circuit for the array test of the active device array substrate 100 . Using these detection methods for the active device array substrate 100 , the circuit of the active device array substrate 100 can be quickly detected. Therefore, the inspection time can be reduced and the throughput of the inspection process can be increased.

The active device array substrate 100 can be used to assemble a liquid crystal display panel. FIG. 3 is a top view of a liquid crystal display panel assembled using the active device array substrate of FIG. 1 . Referring to FIG. 3 , the liquid crystal display panel 300 includes the above-mentioned active device array substrate 100 , a liquid crystal layer (not shown in the figure) and a color filter substrate 200 . The color filter substrate 200 is disposed above the active device array substrate 100 , and the liquid crystal layer is disposed between the active device array substrate 100 and the color filter substrate 200 . Since the liquid crystal display panel 300 includes the active device array substrate 100 , the test lines on the active device array substrate 100 can be used as test lines for panel testing. The detection method of the liquid crystal display panel 300 will be described in detail below with reference to FIG. 1 and FIG. 3 .

The detection method of the liquid crystal display panel 300 includes the following steps. First, a light source is provided, and the liquid crystal display panel 300 is placed above the light source. The light source is, for example, a backlight module. Then, input the first scan signal to the first line segment 162 of the inner antistatic ring 160 . Then, input the second scan signal to the second line segment 162 of the inner antistatic ring 160 . Input the first data signal to one of the data test lines 150 . Then, input the second data signal to another data test line 150 .

After inputting the first scanning signal, the second scanning signal, the first data signal and the second data signal to the first line segment, the second line segment, one of these data test lines and the other data test line, the liquid crystal display panel 300 Various display screens can be presented, such as black screen, white screen or gray screen. The black picture can be used to check whether there are bright points or bright lines on the liquid crystal display panel 300; the white picture can be used to check whether there are dark points or dark lines on the liquid crystal display panel 300. Generated; the gray screen is usually used to check whether the display screen of the liquid crystal display panel 300 has display unevenness (mura).

In addition to the above-mentioned display screens, the liquid crystal display panel 300 can also present a straight or horizontal bright line screen. Under such a display screen, it is easier to check whether the data line 140 or the scanning line 130 has a defect of disconnection or short circuit. In addition, the liquid crystal display panel 300 also presents an image of an array of bright spots, and it is easier to check out bright spots, micro-bright spots or flash points under this picture.

By using the detection method of the liquid crystal display panel 300 described above, the display screen of the liquid crystal display panel 300 can be quickly detected, so as to reduce the detection time and improve the productivity of the detection process.

To sum up, the active element array substrate, the liquid crystal display panel, and the detection method for both of the present invention have at least the following advantages:

1. The present invention uses the internal antistatic ring, the first active element and the second active element as the detection circuit, so that the detection circuit and the electrostatic discharge protection circuit can be integrated together, so the wiring is relatively simple, the number of detection pads is small, and the planning space larger.

2. The present invention integrates the detection circuit and the electrostatic discharge protection circuit together. Through the third active element and the fourth active element, the charge and discharge of the pixel unit will not be affected by the detection circuit, that is, the display screen of the liquid crystal display panel will not be affected. Check for line effects. Therefore, it is not necessary to cut off the detection circuit by laser cutting process, and it is not necessary to purchase additional laser cutting machines.

3. The present invention uses the internal antistatic ring, the first active element and the second active element as a single detection circuit for detecting odd or even scanning lines, so that the input odd and even signals will not affect each other.

4. Using the detection method of the active device array substrate and the liquid crystal display panel of the present invention, the circuit of the active device array substrate and the display screen of the liquid crystal display panel can be quickly detected. Therefore, the inspection time can be reduced and the throughput of the inspection process can be increased.

5. The detection method of the present invention can be used in existing array detection machines without the need to purchase additional detection equipment.

6. The active element array substrate, the liquid crystal display and the detection method of the two of the present invention can be used for small-sized display products, which is helpful for the transformation of small-sized factories and mass production of products.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.

Claims (26)

1. A kind of active element array substrate, it is characterized in that comprising: a substrate having an adjacent display area and a peripheral circuit area; A plurality of pixel units are arranged in the display area; A plurality of scanning lines are arranged on the substrate; A plurality of data lines are arranged on the substrate, and the above-mentioned scanning lines and the above-mentioned data lines control the above-mentioned pixel units; Two data test lines are set in the peripheral circuit area; An internal antistatic ring is arranged in the peripheral circuit area, and the internal antistatic ring includes a first line segment, a second line segment, and a connecting line segment electrically connecting the first line segment and the second line segment; The first active element has a gate, a source, and a drain, wherein the gate and the source are connected to the first line segment, and the drain is connected to the connecting line segment; The second active element has a gate, a source and a drain, wherein the gate and the source are connected to the second line segment, and the drain is connected to the connecting line segment; A plurality of third active elements are arranged in the peripheral circuit area, and each of the third active elements has a gate, a source, and a drain, and the above-mentioned gates and the above-mentioned sources and drains of some of the above-mentioned third active elements are The first line segment is connected, and the corresponding drains are connected to the odd-numbered scanning lines, and the gates of the other parts of the third active elements are connected to the source and the second line segment , and the corresponding drains are connected to the even-numbered scan lines; and A plurality of fourth active elements are arranged in the peripheral circuit area, and each of the fourth active elements has a gate, a source, and a drain, wherein the gates of the fourth active elements are connected to the connecting line segment, Some of the above-mentioned sources are connected to one of the above-mentioned data test lines, and the corresponding above-mentioned drains are connected to the above-mentioned odd-numbered data lines, and the other parts of the above-mentioned sources are respectively connected to one of the above-mentioned data test lines. The other ones are connected, and the above-mentioned drains are connected with the above-mentioned even-numbered data lines. 2. The active device array substrate according to claim 1, wherein the internal antistatic ring is located outside the above-mentioned data test lines. 3. The active device array substrate according to claim 1, wherein each pixel unit comprises: The fifth active element is electrically connected to the corresponding scan line and the data line; and The pixel electrode is electrically connected with the fifth active element. 4. The active device array substrate according to claim 1, further comprising a plurality of detection pads arranged in the peripheral circuit area on the substrate, and the first line segment and the second line segment of the internal antistatic ring The ends of the two line segments are respectively connected to one of the above-mentioned detection pads, and one end of each data test line is respectively connected to one of the above-mentioned detection pads. 5. The active device array substrate according to claim 1, further comprising a plurality of common wirings and a detection wiring connected to one end of the common wirings, wherein the common wirings are arranged on the substrate, And it extends from the display area to the peripheral circuit area, and the detection wiring is arranged in the peripheral circuit area on the substrate. 6. The active device array substrate according to claim 1, wherein the data test lines are dummy data lines, and the data test lines are located on both sides of the data lines. 7. The active element array substrate according to claim 1, wherein the above-mentioned data test lines are another internal antistatic ring. 8. A liquid crystal display panel, characterized in that it comprises: Active element array substrates, including: a substrate having an adjacent display area and a peripheral circuit area; A plurality of pixel units are arranged in the display area; A plurality of scanning lines are arranged on the substrate; A plurality of data lines are arranged on the substrate, and the above-mentioned scanning lines and the above-mentioned data lines These pixel units are controlled by data lines; Two data test lines are set in the peripheral circuit area; An internal antistatic ring is arranged in the peripheral circuit area, and the internal antistatic ring includes a first line segment, a second line segment, and a connecting line segment electrically connecting the first line segment and the second line segment; The first active element has a gate, a source, and a drain, wherein the gate and the source are connected to the first line segment, and the drain is connected to the connecting line segment; The second active element has a gate, a source and a drain, wherein the gate and the source are connected to the second line segment, and the drain is connected to the connecting line segment; A plurality of third active elements are arranged in the peripheral circuit area, and each of the third active elements has a gate, a source, and a drain, and the above-mentioned gates and the above-mentioned sources and drains of some of the above-mentioned third active elements are The first line segment is connected, and the corresponding drains are connected to the odd-numbered scanning lines, and the gates of the other parts of the third active elements are connected to the source and the second line segment , and the corresponding drains are connected to the even-numbered scanning lines; A plurality of fourth active elements are arranged in the peripheral circuit area, and each of the fourth active elements has a gate, a source, and a drain, wherein the gates of the fourth active elements are connected to the connecting line segment, Some of the above-mentioned sources are connected to one of the above-mentioned data test lines, and the corresponding above-mentioned drains are connected to the above-mentioned odd-numbered data lines, and the other parts of the above-mentioned sources are respectively connected to one of the above-mentioned data test lines. The other one is connected, and the above-mentioned drains are connected to the above-mentioned even-numbered data lines; color filter substrates; and The liquid crystal layer is arranged between the color filter substrate and the active element array substrate. 9. The liquid crystal display panel according to claim 8, wherein the internal antistatic ring of the active element array substrate is located outside the above-mentioned data test lines. 10. The liquid crystal display panel according to claim 8, wherein each pixel unit of the active element array substrate comprises: The fifth active element is electrically connected to the corresponding scan line and the data line; and The pixel electrode is electrically connected with the fifth active element. 11. The liquid crystal display panel according to claim 8, wherein the active element array substrate further comprises a plurality of detection pads arranged in the peripheral circuit area on the substrate, and the first line of the internal antistatic ring The ends of the segment and the second line segment are respectively connected to one of the above-mentioned detection pads, and one end of each data test line is respectively connected to one of the above-mentioned detection pads. 12. The liquid crystal display panel according to claim 8, wherein the active element array substrate further comprises a plurality of common wirings and a detection wiring connected to one end of the common wirings, wherein the common wirings are arranged on on the substrate and extend from the display area to the peripheral circuit area, and the detection wiring is arranged in the peripheral circuit area on the substrate. 13. The liquid crystal display panel according to claim 8, wherein the data test lines of the active element array substrate are dummy data lines, and the data test lines are located on both sides of the data lines. 14. The liquid crystal display panel according to claim 8, wherein the above-mentioned data test lines of the active element array substrate are another internal antistatic ring. 15. A detection method for an active element array substrate, suitable for the active element array substrate according to claim 1, characterized in that the detection method for the active element array substrate comprises: Input the first scanning signal to the first line segment of the internal antistatic ring to turn on the first active element and the above-mentioned fourth active elements, and the first scanning signal is input to the above-mentioned through part of the above-mentioned third active elements In these odd scan lines; Inputting a second scanning signal to the second line segment of the internal antistatic ring to turn off the second active element and the third active elements connected to the above-mentioned even-numbered scanning lines, wherein the first scanning signal is high a gate voltage signal, the second scanning signal is a low gate voltage signal; inputting a first data signal to one of the above-mentioned data test lines, and the first data signal is input to the corresponding above-mentioned data lines through some of the above-mentioned fourth active elements; and Measure the voltage of another data test line. 16. A detection method for an active element array substrate, suitable for the active element array substrate according to claim 1, characterized in that the detection method for the active element array substrate comprises: inputting a first scan signal to the first segment of the internal antistatic ring; inputting a second scan signal to the second line segment of the inner antistatic ring, at least one of the first scan signal and the second scan signal is a high gate voltage signal; and Measure the voltage of these data test lines. 17. The detection method of an active device array substrate according to claim 16, wherein the first scanning signal is a high gate voltage signal, and the second scanning signal is a low gate voltage signal. 18. The detection method of an active device array substrate according to claim 16, wherein the first scanning signal and the second scanning signal are high gate voltage signals. 19. A detection method for an active element array substrate, suitable for the active element array substrate according to claim 5, characterized in that the detection method for the active element array substrate comprises: inputting a first scan signal to the first segment of the internal antistatic ring; inputting a second scan signal to the second line segment of the inner antistatic ring, at least one of the first scan signal and the second scan signal is a high gate voltage signal; and Measure the voltage of the sense trace. 20. The detection method of an active device array substrate according to claim 19, wherein the first scanning signal is a high gate voltage signal, and the second scanning signal is a low gate voltage signal. 21. The detection method of an active device array substrate according to claim 19, wherein the first scanning signal and the second scanning signal are high gate voltage signals. 22. A detection method for an active device array substrate, suitable for the active device array substrate according to claim 5, characterized in that the detection method for the active device array substrate comprises: inputting a first scan signal to the first segment of the internal antistatic ring; inputting a second scanning signal to the second line segment of the internal antistatic ring, at least one of the first scanning signal and the second scanning signal is a high gate voltage signal; inputting a first data signal to one of the above-mentioned data test lines, and the first data signal is input to the corresponding above-mentioned data lines through some of the above-mentioned fourth active elements; and Measure the voltage of the sense trace. 23. A detection method for a liquid crystal display panel, suitable for the liquid crystal display panel as claimed in claim 8, characterized in that the detection method comprises: providing a light source, and placing the liquid crystal display panel above the light source; inputting a first scan signal to the first segment of the internal antistatic ring; inputting a second scanning signal to the second line segment of the internal antistatic ring, at least one of the first scanning signal and the second scanning signal is a high gate voltage signal; inputting the first data signal to one of the above-mentioned data test lines; and Input the second data signal to another data test line. 24. The detection method according to claim 23, characterized in that the first scanning signal, the second scanning signal, the first data signal and the second data signal are input to the first line segment, the second line segment, the above-mentioned After one of the data test lines and the other data test line, the liquid crystal display panel presents a black picture, a white picture or a gray picture. 25. The detection method according to claim 23, characterized in that the first scanning signal, the second scanning signal, the first data signal and the second data signal are input to the first line segment, the second line segment, the above-mentioned After one of the data test lines and the other data test line, the liquid crystal display panel presents a straight or horizontal bright line picture. 26. The detection method according to claim 23, characterized in that the first scanning signal, the second scanning signal, the first data signal and the second data signal are input to the first line segment, the second line segment, the above-mentioned After one of the data test lines and the other data test line, the liquid crystal display panel presents an image of a bright spot array.

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