CN100414415C - Liquid crystal display panel, pixel structure and color filter substrate - Google Patents

Abstract

A liquid crystal display panel comprises a first substrate, a second substrate and a liquid crystal layer. The first substrate comprises an active element array, a pixel electrode layer and a plurality of first alignment patterns, wherein each first alignment pattern comprises at least one first reduced area, and the width of the first alignment pattern at the first reduced area is smaller than that of the other parts of the first alignment pattern. The second substrate is located above the first substrate, the second substrate includes an electrode layer and a plurality of second alignment patterns, and the second alignment patterns and the first alignment patterns are arranged in an interlaced manner. The liquid crystal layer is arranged between the first substrate and the second substrate. The present invention can provide a better dynamic display screen.

Description

Liquid crystal display panel, pixel structure and color filter substrate

technical field

The present invention relates to a liquid crystal display panel (Liquid Crystal Display Panel), and in particular to a multi-domain vertical alignment (Multi-Domain Vertical Alignment, MVA) liquid crystal display panel.

Background technique

Thin Film Transistor Liquid Crystal Display (TFT LCD) has gradually become the mainstream of the market with superior characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation. At present, the performance requirements for liquid crystal displays are towards high contrast ratio (High Contrast Ratio), fast response and wide viewing angle. Among them, technologies capable of meeting the requirement of a wide viewing angle, such as a multi-domain vertically aligned (MVA) liquid crystal display panel, will be described below.

FIG. 1 is a schematic top view of a known multi-area vertical alignment liquid crystal display panel, which only shows a pixel structure. Fig. 1A is a schematic cross-sectional view along line A-A' in Fig. 1 . Please refer to FIG. 1 and FIG. 1A at the same time. The multi-area vertical alignment liquid crystal display panel 100 includes at least one active element array substrate 110, a color filter substrate 120, and a liquid crystal layer 130, wherein the active element array substrate 110 includes at least a substrate 111, scanning lines 112 , a signal line 113 , a common electrode 114 , a thin film transistor 115 and a pixel electrode layer 116 , wherein a slit 118 is formed in the pixel electrode layer 116 .

The scanning lines 112 and the signal lines 113 define a pixel area 110 a on the substrate 111 , and the thin film transistor 115 is disposed in the pixel area 110 a, and the thin film transistor 115 is electrically connected to the corresponding signal line 113 and the scanning line 112 . The pixel electrode layer 116 is correspondingly disposed in the pixel region 110 a and is electrically connected to the corresponding thin film transistor 115 . The common electrode 114 and the pixel electrode layer 116 serve as two poles of the storage capacitor.

Please continue to refer to FIG. 1 and FIG. 1A , the color filter substrate 120 is disposed above the active device array substrate 110 , wherein the color filter substrate 120 at least includes a substrate 121 , a color photoresist layer 122 , an electrode layer 123 and alignment protrusions 124 . The color photoresist layer 122 is located on the substrate 121 . The electrode layer 123 is disposed on the color photoresist layer 122 , and the protrusion 124 is located on the electrode layer 123 . In addition, the liquid crystal layer 130 is disposed between the active device array substrate 110 and the color filter substrate 120 , wherein the liquid crystal layer 130 has a plurality of liquid crystal molecules 132 .

As mentioned above, when a driving voltage is applied between the two substrates 110, 120, the lines of electric force near the slit 118 on the active element array substrate 110 and the protrusion 124 on the color filter substrate 120 will be twisted, and The alignment of the liquid crystal molecules there is changed. Therefore, different liquid crystal alignment regions can be formed to form a liquid crystal display panel with wide viewing angle characteristics. However, the above-mentioned pixel structure design method has problems in displaying dynamic images as follows.

2A and FIG. 2B are schematic diagrams of taste inspection of a known multi-area vertical alignment type liquid crystal display panel by using a moving inspection screen. FIG. 3 is a schematic top view of an alignment state of liquid crystal molecules. Please refer to FIG. 2A, FIG. 2B and FIG. 3 at the same time. First, as shown in FIG. 2A , a black square 210 is displayed on a white background frame 220 . Next, as shown in FIG. 2B , move the black square 210 on the white background image 220 . Since the electric force lines near the slit 118 and the protrusion 124 will be twisted (as shown in FIG. 3 ), the liquid crystal molecules 132 there will show a different tilting direction from that of the liquid crystal molecules 132 in other regions. Therefore, when the electric field changes or the picture changes (that is, when the black square 210 moves as shown in FIG. 2B ), the liquid crystal molecules there cannot be deflected quickly to reach a stable state, thus resulting in inconsistencies in tone (dynamic crosstalk). This also results in the smearing and whitening area 230 as shown in FIG. 2B .

Contents of the invention

In view of this, the object of the present invention is to provide a liquid crystal display panel, which can provide better dynamic display images.

Another object of the present invention is to provide a pixel structure which is arranged on an active element array substrate. Through the design of the pixel structure, a liquid crystal display panel having the active element array substrate can provide better dynamic display images.

Another object of the present invention is to provide a pixel structure, which is arranged on a color filter substrate. Through the design of the pixel structure, a liquid crystal display panel with the color filter substrate can provide better dynamic display images.

Based on the above and other objectives, the present invention provides a liquid crystal display panel, including a first substrate, a second substrate and a liquid crystal layer. The first substrate includes an array of active elements, a pixel electrode layer, and a plurality of first alignment patterns, wherein each first alignment pattern includes at least one first narrowed area, and the first alignment pattern at its first narrowed area The width will be smaller than the width of other parts of the first alignment pattern. The second substrate is located above the first substrate, and the second substrate includes an electrode layer and a plurality of second alignment patterns, and the second alignment patterns and the first alignment patterns are alternately arranged. The liquid crystal layer is disposed between the first substrate and the second substrate.

In a preferred embodiment of the present invention, each of the above-mentioned second alignment patterns includes at least one second narrowed area, and the width of the second alignment pattern at the second narrowed area is smaller than other parts of the second alignment pattern. width.

In a preferred embodiment of the present invention, the above-mentioned first alignment pattern is formed by a plurality of protrusions formed on the pixel electrode layer.

In a preferred embodiment of the present invention, the above-mentioned first alignment pattern is formed by a plurality of slits formed in the pixel electrode layer. For example, a plurality of holes are formed in the pixel electrode layer between two adjacent slits.

In a preferred embodiment of the present invention, the above-mentioned second alignment pattern is formed by a plurality of protrusions formed on the electrode layer.

In a preferred embodiment of the present invention, the above-mentioned second alignment pattern is formed by a plurality of slits formed in the electrode layer. For example, a plurality of holes are formed in the pixel electrode layer between two adjacent slits.

In a preferred embodiment of the present invention, the above-mentioned active device array includes, for example, a plurality of signal lines, a plurality of scanning lines and a plurality of thin film transistors. The signal lines and the scan lines define a plurality of pixel areas. The thin film transistors are respectively arranged in each pixel area, and the thin film transistors are respectively electrically connected to the signal lines and the scanning lines.

In a preferred embodiment of the present invention, the above-mentioned second substrate further includes, for example, a color photoresist layer.

The present invention further proposes a pixel structure on an active component array substrate, including an active component, a pixel electrode layer and a plurality of alignment patterns. The active element is arranged on the substrate. The pixel electrode layer is arranged on the substrate, and the pixel electrode layer is electrically connected with the active element. A plurality of alignment patterns are disposed on the pixel electrode layer, wherein each alignment pattern includes at least one narrowed area, and the width of the alignment pattern at the narrowed area is smaller than the width of other parts of the alignment pattern.

In a preferred embodiment of the present invention, the above alignment pattern is formed by a plurality of protrusions formed on the pixel electrode layer.

In a preferred embodiment of the present invention, the above alignment pattern is formed by a plurality of slits formed in the pixel electrode layer. For example, a plurality of holes are formed in the pixel electrode layer between two adjacent slits.

The invention further proposes a color filter substrate, which includes a color photoresist layer, an electrode layer and a plurality of alignment patterns. The color photoresist layer is arranged on the substrate. The electrode layer is arranged on the color photoresist layer. A plurality of alignment patterns are disposed on the electrode layer, and each alignment pattern includes at least one narrowed area, and the width of the alignment pattern at the narrowed area is smaller than the width of other parts of the alignment pattern.

In a preferred embodiment of the present invention, the above alignment pattern is formed by a plurality of protrusions formed on the pixel electrode layer.

In a preferred embodiment of the present invention, the above alignment pattern is formed by a plurality of slits formed in the pixel electrode layer. For example, a plurality of holes are formed in the pixel electrode layer between two adjacent slits.

Because the present invention adopts the alignment pattern with narrowed area, the liquid crystal molecules in the area can be quickly deflected to reach a stable state when the electric field changes or the picture changes, so that the liquid crystal display panel can provide a better dynamic display picture.

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with accompanying drawings.

Description of drawings

FIG. 1 is a schematic top view of a known multi-domain vertical alignment liquid crystal display panel.

Fig. 1A is a schematic cross-sectional view along line A-A' in Fig. 1 .

2A and FIG. 2B are schematic diagrams of taste inspection of a known multi-area vertical alignment type liquid crystal display panel by using a moving inspection screen.

FIG. 3 is a schematic top view of an alignment state of liquid crystal molecules.

FIG. 4 is a schematic top view of a multi-region vertically aligned liquid crystal display panel in a preferred embodiment of the present invention.

Fig. 4A is a schematic cross-sectional view along line B-B' in Fig. 4 .

FIG. 5 is a schematic top view of another multi-region vertically aligned liquid crystal display panel in a preferred embodiment of the present invention.

6A to 6C are schematic cross-sectional views of another three types of multi-area vertical alignment liquid crystal display panels in a preferred embodiment of the present invention.

FIG. 7 is a schematic top view of another multi-region vertically aligned liquid crystal display panel according to an embodiment of the present invention.

Fig. 7A is a schematic cross-sectional view along line C-C' in Fig. 7 .

8A to 8C are schematic cross-sectional views of three types of multi-region vertically aligned liquid crystal display panels in an embodiment of the present invention.

Description of main component marking

100, 300: Multi-area vertical alignment type liquid crystal display panel

110: active element array substrate

111, 311: Substrate

112, 312: scan line

113, 313: signal line

114, 314: common electrode

115: thin film transistor

116, 316: pixel electrode layer

118: Slit

120: color filter substrate

121, 321: Substrate

122, 322: Color photoresist layer

123, 323: electrode layer

124: Protrusion

130, 330: liquid crystal layer

132, 332: liquid crystal molecules

210: black square

220: White screen

230: Whitening area

310: first substrate

310a: pixel area

315: Active components (thin film transistors)

317: active element array

318, 324: alignment pattern

318a, 324a: Reduced area

320: second substrate

340: hole

A-A', B-B', C-C': hatching

d1, d2, d4, d5: width

d3, d6, d7: distance

Detailed ways

Fig. 4 is a schematic top view of a multi-region vertically aligned liquid crystal display panel in a preferred embodiment of the present invention, and Fig. 4A is a schematic cross-sectional view along line B-B' in Fig. 4 . Please refer to FIG. 4 and FIG. 4A at the same time. The multi-region vertical alignment liquid crystal display panel 300 includes, for example, a first substrate 310 , a second substrate 320 and a liquid crystal layer 330 . The first substrate 310 includes an active device array 317, a pixel electrode layer 316, and a plurality of alignment patterns 318, wherein each alignment pattern 318 includes at least one narrowed area 318a, and the width d1 of the alignment pattern 318 at its narrowed area 318a It will be smaller than the width d2 of other parts of the alignment pattern 318 . The second substrate 320 is located above the first substrate 310 . The second substrate 320 includes an electrode layer 323 and a plurality of alignment patterns 324 , and the alignment patterns 324 and the alignment patterns 318 are alternately arranged. The liquid crystal layer 330 is disposed between the first substrate 310 and the second substrate 320 , and the liquid crystal layer 330 includes a plurality of liquid crystal molecules 332 .

Please refer to FIG. 4 and FIG. 4A at the same time. In a preferred embodiment of the present invention, the first substrate 310 is, for example, an active device array substrate, which includes an active device array 317 . The active element array 317 includes, for example, a plurality of signal lines 313 (only one is shown in FIG. 4 ), a plurality of scan lines 312 (only one is shown in FIG. 4 ), and a plurality of thin film transistors 315 (only one is shown in FIG. 4 ). The signal lines 313 and the scan lines 312 define a plurality of pixel regions 310 a (only one is shown in FIG. 4 ). Each thin film transistor 315 is respectively disposed in each pixel region 310a, and each thin film transistor 315 is electrically connected to the signal line 313 and the scan line 312 respectively. And the thin film transistor 315 is electrically connected to the corresponding pixel electrode layer 316 . In addition, a common electrode 314 is disposed on the first substrate 310 , and the common electrode 314 and the pixel electrode layer 316 can be used as two poles of a storage capacitor. In addition, in one embodiment, the second substrate 320 further includes, for example, a color photoresist layer 322 , which can allow light to pass through to make the liquid crystal display panel full-color.

It should be noted that the alignment pattern 318 is formed by, for example, a plurality of slits formed in the pixel electrode layer 316 . The slit is formed in the pixel electrode layer 316 , for example, it is defined while patterning the pixel electrode layer 316 . In particular, the slot has a reduced region 318a whose width d1 is smaller than the width d2 of the slot itself. In addition, as shown in FIG. 4 , in a preferred embodiment, a plurality of narrowing regions 318a are located on each slit at intervals of a fixed distance d3. In addition, the alignment pattern 324 on the second substrate 320 is formed by, for example, a plurality of protrusions formed on the electrode layer 323 , which are arranged alternately with the alignment pattern 318 on the first substrate 310 .

FIG. 5 is a schematic top view of another multi-region vertically aligned liquid crystal display panel in a preferred embodiment of the present invention. Referring to FIG. 5 , the components that are the same as those shown in FIG. 4 are marked with the same symbols. It should be noted that the alignment pattern 324 on the second substrate 320 in FIG. 5 also includes at least one narrowed area 324a, and the width d4 of the alignment pattern 324 at the narrowed area 324a is smaller than that of other parts of the alignment pattern 324. width d5. In a preferred embodiment, a plurality of narrowing regions 324a are located on each alignment pattern 324 at intervals of a fixed distance d6. The alignment patterns 324 on the second substrate 320 and the alignment patterns 318 on the first substrate 310 are alternately arranged, and the alignment patterns 324 are protrusions, for example, and the alignment patterns 318 are slits, for example. Further, the alignment pattern 318 on the first substrate 310 may be a slit or a protrusion with a narrowed area 318a. The alignment pattern 324 on the second substrate 320 can also be a slit or a protrusion with a narrowed area 324a. Through the cooperation of the first substrate 310 and the second substrate 320 , various multi-region vertical alignment liquid crystal display panels can be assembled.

In addition to the multi-area vertical alignment liquid crystal display panel shown in 4A, FIG. 6A and FIG. 6C are schematic cross-sectional views of three other multi-area vertical alignment liquid crystal display panels in a preferred embodiment of the present invention. Please refer to FIG. 6A first, the alignment pattern 318 on the first substrate 310 is, for example, a plurality of protrusions formed on the pixel electrode layer 316 . The alignment pattern 324 on the second substrate 320 is, for example, formed by a plurality of slits formed in the electrode layer 323 . Likewise, as shown in FIG. 5 , each alignment pattern 324 includes at least one narrowed region 324 a, and the width d4 of the alignment pattern 324 at the narrowed region 324 a is smaller than the width d5 of other parts of the alignment pattern 324 . Referring to FIG. 5 and FIG. 6B again, both the alignment pattern 318 and the alignment pattern 324 can also be configured as slits with narrowed regions 318a and 324a. Referring to FIG. 5 and FIG. 6C again, both the alignment pattern 318 and the alignment pattern 324 can also be provided as protrusions having narrowed regions 318a and 324a. As mentioned above, when a driving voltage is applied between the two substrates 310, 320, the distribution of electric force lines near the alignment patterns 318, 324 with the narrowed regions 318a, 324a can make the liquid crystal molecules 332 fall in the same direction, and the liquid crystal molecules 332 Can deflect quickly to reach a steady state.

In short, the alignment pattern 318 on the first substrate 310 can be a slit or a protrusion with a narrowed area 318a. The alignment pattern 324 on the second substrate 320 can also be a slit or a protrusion with a narrowed area 324a. By coordinating the slits with the narrowed areas 318a, 342a and the protrusions, and when a driving voltage is applied between the two substrates 310, 320, the distribution of the lines of force near the alignment patterns 318, 324 with the narrowed areas 318a, 324a can be The liquid crystal molecules 332 are quickly deflected to reach a stable state. Therefore, the present invention can improve the display performance of dynamic images.

FIG. 7 is a schematic top view of another multi-region vertically aligned liquid crystal display panel according to an embodiment of the present invention. Fig. 7A is a schematic cross-sectional view along line C-C' in Fig. 7 . Please refer to FIG. 7 and FIG. 7A at the same time. The components in FIG. 7 and FIG. 7A are marked with the same symbols as those in FIG. 4 and FIG. 4A , and their detailed structures will not be repeated here.

It should be noted that, for example, when the alignment pattern 318 is a slit, a plurality of holes 340 are also formed in the pixel electrode layer 316 between two adjacent slits. In a preferred embodiment, as shown in FIG. 7 and FIG. 7A , the holes 340 are spaced apart at a fixed distance d7 on the pixel electrode layer 316 opposite to the alignment pattern 324 (protrusion).

In the multi-area vertically aligned liquid crystal display panel with holes 340, the alignment pattern 318 on the first substrate 310 and the alignment pattern 324 on the second substrate 320 can also be slit and Interaction of protrusions. 8A to 8C are schematic cross-sectional views of three types of multi-region vertically aligned liquid crystal display panels in an embodiment of the present invention. Please refer to FIG. 8A first, its structure is mostly the same as that shown in FIG. 6A , and will not be repeated here. It should be noted that the hole 340 is disposed on the electrode layer 323 opposite to the alignment pattern 318 (protrusion in this case). Referring to FIG. 8B again, its structure is mostly the same as that shown in FIG. 6B . It is worth noting that the hole 340 is disposed on the electrode layer 323 opposite to the alignment pattern 318 . As shown in FIG. 8C , when the alignment patterns 318 and 324 are both slits, the hole 340 may also be disposed on the pixel electrode layer 316 opposite to the alignment pattern 324 . In addition, or the holes 340 may be disposed on the pixel electrode layer 316 and the electrode layer 323 (not shown in the figure) at the same time, and are respectively disposed corresponding to the alignment patterns 318 and 324 .

In short, through the collocation of the slits, protrusions and holes with narrowed areas, and when a driving voltage is applied between the two substrates 310 and 320, the distribution of electric force lines near the slits, protrusions and holes with narrowed areas can make the liquid crystal The tilting directions of the molecules are consistent, and the liquid crystal molecules can be deflected rapidly to reach a stable state. Therefore, the present invention can make the dynamic display picture have better display quality.

The present invention also proposes a pixel structure on the active device array substrate (the first substrate 310 ), please refer to FIG. 4 , FIG. 4A and FIG. 6A , which includes an active device 315 , a pixel electrode layer 316 and a plurality of alignment patterns 318 . The active device 315 is disposed on the substrate 311, which may be a thin film transistor. The pixel electrode layer 316 is disposed on the substrate 311 , and the pixel electrode layer 316 is electrically connected to the active device 315 . A plurality of alignment patterns 318 are disposed on the pixel electrode layer 316, wherein each alignment pattern 318 includes at least one narrowed area 318a, and the width d1 of the alignment pattern 318 at the narrowed area 318a is smaller than the width d2 of other parts of the alignment pattern 318 . Likewise, in a preferred embodiment of the present invention, as shown in FIG. 4A , the above alignment pattern 318 may be formed by a plurality of slits formed in the pixel electrode layer 316 . Alternatively, as shown in FIG. 6A , the alignment pattern 318 may be formed by a plurality of protrusions formed on the pixel electrode layer 316 .

In addition, as shown in FIG. 7 and FIG. 7A, for example, a plurality of holes 340 are formed in the pixel electrode layer 316 between two adjacent slits. In a preferred embodiment, the holes 340 are arranged in the alignment pattern 324 on the pixel electrode layer 316 opposite. In a word, in the pixel structure on the active device array substrate of the present invention, the alignment pattern 318 disposed thereon can be a slit or a protrusion, and the hole 340 can be formed in the pixel electrode layer 316 . The same or similar structure has been described in the first embodiment, so it will not be repeated here.

The present invention further proposes a color filter substrate (second substrate 320 ), please refer to FIG. 5 , FIG. 4A and FIG. 6A , which includes a color photoresist layer 322 , an electrode layer 323 and a plurality of alignment patterns 324 . The color photoresist layer 322 is disposed on the substrate 321 . The electrode layer 323 is disposed on the color photoresist layer 322 . A plurality of alignment patterns 324 are disposed on the electrode layer 323, wherein each alignment pattern 324 includes at least one narrowed area 324a, and the width of the alignment pattern 324 at the narrowed area 324a is smaller than the width of other parts of the alignment pattern 324. Likewise, in a preferred embodiment of the present invention, as shown in FIG. 4A , the above-mentioned alignment pattern 324 may be formed by a plurality of protrusions formed on the electrode layer 323 . And as shown in FIG. 6A , the above alignment pattern 324 may be formed by a plurality of slits formed in the electrode layer 323 .

In addition, as shown in FIG. 8A , for example, a plurality of holes 340 are formed in the electrode layer 323 between two adjacent slits. In a preferred embodiment, the holes 340 are arranged between the alignment patterns 318 on the opposite electrode layer 323 .

In short, the alignment pattern 324 disposed on the pixel structure on the color filter substrate can be a slit or a protrusion, and a hole 340 can be formed in the electrode layer 323 . The same or similar structure has been described in the first embodiment, so it will not be repeated here.

In summary, the multi-area vertically aligned liquid crystal display panel, the pixel structure on the active element array substrate and the pixel structure on the color filter substrate of the present invention have the following advantages:

(1) When a driving voltage is applied between the two substrates, the present invention adopts an alignment pattern with a reduced area, and the distribution of electric force lines near it can make the liquid crystal molecules fall in the same direction, and the liquid crystal molecules can be quickly deflected to reach a stable state . Therefore, better dynamic display images will be obtained.

(2) The alignment patterns (slits or protrusions) and holes of the present invention can be fabricated on the pixel electrode layer of the active device array substrate, or on the electrode layer of the color filter substrate. And by utilizing the mutual matching of the slits or protrusions, various multi-area vertically aligned liquid crystal display panels suitable for quickly deflecting liquid crystal molecules to achieve a stable state can be formed.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.

Claims (14)

1. display panels is characterized in that comprising:

First substrate, comprise on this first substrate and be provided with active cell array, pixel electrode layer and many first alignment pattern, wherein each first alignment pattern comprises that at least one first dwindles the zone, and this first alignment pattern can be less than the width of these first alignment pattern other parts at its this first width that dwindles location;

Second substrate, be positioned on this first substrate, comprise on this second substrate and be provided with electrode layer and many second alignment pattern, each second alignment pattern comprises that at least one second dwindles the zone, this second alignment pattern can be less than the width of these second alignment pattern other parts at its this second width that dwindles location, and above-mentioned these second alignment pattern and above-mentioned these first alignment pattern are to be staggered to be provided with; And

Liquid crystal layer is arranged between this first substrate and this second substrate.

2. the display panels according to claim 1 is characterized in that above-mentioned these first alignment pattern are made of a plurality of thrust that is formed on this pixel electrode layer.

3. the display panels according to claim 1 is characterized in that above-mentioned these first alignment pattern are made of many slits that are formed in this pixel electrode layer.

4. the display panels according to claim 3 is characterized in that also comprising in this pixel electrode layer between adjacent two slits being formed with a plurality of holes.

5. the display panels according to claim 1 is characterized in that above-mentioned these second alignment pattern are made of a plurality of thrust that is formed on this electrode layer.

6. the display panels according to claim 1 is characterized in that above-mentioned these second alignment pattern are made of many slits that are formed in this electrode layer.

7. the display panels according to claim 6 is characterized in that also comprising in this electrode layer between adjacent two slits being formed with a plurality of holes.

8. the display panels according to claim 1 is characterized in that this active cell array comprises:

Many signal line and multi-strip scanning line are to define a plurality of pixel regions; And

A plurality of thin film transistor (TFT)s, each above-mentioned these thin film transistor (TFT) is arranged at respectively in each above-mentioned these pixel region, and above-mentioned these thin film transistor (TFT)s are electrically connected with above-mentioned these signal wires and above-mentioned these sweep traces respectively.

9. the display panels according to claim 1 is characterized in that also comprising on this second substrate being provided with the colorama resistance layer.

10. the dot structure on the active assembly array substrate is characterized in that comprising:

Active member is arranged on the substrate;

Pixel electrode layer is arranged on this substrate, and this pixel electrode layer can be electrically connected with this active member; And

Many alignment pattern, be arranged on this pixel electrode layer, this alignment pattern is made of many slits that are formed in this pixel electrode layer, also comprise in this pixel electrode layer between adjacent two slits and be formed with a plurality of holes, wherein each alignment pattern comprises that at least one dwindles the zone, and this alignment pattern is dwindled the width of location its this can be less than the width of the other parts of this alignment pattern.

11. a colored optical filtering substrates is characterized in that comprising:

The colorama resistance layer is arranged on the substrate;

Electrode layer is arranged on this colorama resistance layer; And

Many alignment pattern are arranged on this electrode layer, and wherein each alignment pattern comprises that at least one dwindles the zone, and this alignment pattern is dwindled the width of location its this can be less than the width of the other parts of this alignment pattern.

12. the colored optical filtering substrates according to claim 11 is characterized in that above-mentioned these alignment pattern are made of a plurality of thrust that is formed on this electrode layer.

13. the colored optical filtering substrates according to claim 11 is characterized in that above-mentioned these alignment pattern are made of many slits that are formed in this electrode layer.

14. the colored optical filtering substrates according to claim 13 is characterized in that also comprising in this electrode layer between adjacent two slits being formed with a plurality of holes.

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