[go: up one dir, main page]

CN100411005C - control circuit with electrostatic protection and liquid crystal display - Google Patents

control circuit with electrostatic protection and liquid crystal display Download PDF

Info

Publication number
CN100411005C
CN100411005C CNB2006101412184A CN200610141218A CN100411005C CN 100411005 C CN100411005 C CN 100411005C CN B2006101412184 A CNB2006101412184 A CN B2006101412184A CN 200610141218 A CN200610141218 A CN 200610141218A CN 100411005 C CN100411005 C CN 100411005C
Authority
CN
China
Prior art keywords
coupled
electrostatic
buses
esd protection
electrostatic protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2006101412184A
Other languages
Chinese (zh)
Other versions
CN1928640A (en
Inventor
叶彦显
魏俊卿
罗时勋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AUO Corp
Original Assignee
AU Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AU Optronics Corp filed Critical AU Optronics Corp
Priority to CNB2006101412184A priority Critical patent/CN100411005C/en
Publication of CN1928640A publication Critical patent/CN1928640A/en
Application granted granted Critical
Publication of CN100411005C publication Critical patent/CN100411005C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

The control circuit has the function of electrostatic protection and comprises a plurality of shift registers; a plurality of buses coupled to the plurality of shift registers; a common terminal; a set of electrostatic protection elements coupled to a set of buses of the plurality of buses for protecting the plurality of buses from being damaged by electrostatic current; and a set of discharge paths coupled to the set of ESD protection devices and the common terminal for providing the discharge paths to the ESD current, wherein the set of ESD protection devices comprises: a first ESD protection device coupled to a first bus of the plurality of buses, the set of discharge paths including a first discharge path coupled to the first ESD protection device and the common node; and a second ESD protection device coupled to the first bus, the set of discharge paths further including a second discharge path coupled to the second ESD protection device and the common terminal.

Description

具有静电防护的控制电路与液晶显示器 Control circuit and liquid crystal display with electrostatic protection

技术领域 technical field

本发明涉及一种具有静电防护的控制电路,特别是涉及一种液晶显示器上具有静电防护的控制电路。The invention relates to a control circuit with static electricity protection, in particular to a control circuit with static electricity protection on a liquid crystal display.

背景技术 Background technique

请参考图1。图1为一液晶显示器100的示意图。液晶显示器100包含一玻璃基板110、一液晶层120及一玻璃基板130。玻璃基板110包含彩色滤光片(color filter)。玻璃基板130包含薄膜晶体管(thin film transistor,TFT)。Please refer to Figure 1. FIG. 1 is a schematic diagram of a liquid crystal display 100 . The liquid crystal display 100 includes a glass substrate 110 , a liquid crystal layer 120 and a glass substrate 130 . The glass substrate 110 includes a color filter. The glass substrate 130 includes thin film transistors (thin film transistor, TFT).

请参考图2。图2为玻璃基板130的示意图。如图所示,玻璃基板130包含多条横向的栅极线与多条纵向的源极线交错而形成多个像素区,如像素区210。举例来说,像素区210包含一薄膜晶体管Q1与一储存电容C1,薄膜晶体管Q1的栅极耦接至邻近的栅极线,而其源极耦接至邻近的源极线,而其漏极耦接至储存电容C1。储存电容C1的一端耦接至薄膜晶体管Q1的漏极,另一端耦接至一共同端VCOM。而所有的像素区的储存电容,其另一端皆耦接至共同端VCOM,以此方式使所有储存电容有共同的电压电平。Please refer to Figure 2. FIG. 2 is a schematic diagram of the glass substrate 130 . As shown in the figure, the glass substrate 130 includes a plurality of horizontal gate lines intersecting with a plurality of vertical source lines to form a plurality of pixel regions, such as the pixel region 210 . For example, the pixel region 210 includes a thin film transistor Q1 and a storage capacitor C1. The gate of the thin film transistor Q1 is coupled to an adjacent gate line, its source is coupled to an adjacent source line, and its drain Coupled to storage capacitor C1. One end of the storage capacitor C1 is coupled to the drain of the thin film transistor Q1, and the other end is coupled to a common end VCOM. The other ends of the storage capacitors in all the pixel areas are coupled to the common terminal VCOM, so that all the storage capacitors have a common voltage level.

请参考图3。图3为具有静电防护的玻璃基板330的示意图。由于玻璃基板330的栅极线与源极线皆耦接至玻璃基板330的边缘处,用以接受外部的栅极讯号与源极讯号,故容易在面板边缘处产生静电放电事件(electrostaticdischarge,ESD),而把薄膜晶体管打坏。因此,便在栅极线与源极线靠近玻璃基板330边缘处放置静电防护元件。如图所示,静电防护元件E1耦接至第一条栅极线,静电防护元件E2耦接至第二条栅极线,依此类推。而所有的静电防护元件的另一端皆耦接至一共同端VA,此即为短路圈(short ring)。以此方式,增强静电防护的能力,以更快消散静电放电电流。Please refer to Figure 3. FIG. 3 is a schematic diagram of a glass substrate 330 with electrostatic protection. Since the gate lines and source lines of the glass substrate 330 are coupled to the edge of the glass substrate 330 for receiving external gate signals and source signals, electrostatic discharge (ESD) events are easily generated at the edge of the panel. ), and break the thin film transistor. Therefore, an electrostatic protection component is placed near the edge of the glass substrate 330 between the gate line and the source line. As shown in the figure, the ESD protection element E1 is coupled to the first gate line, the ESD protection element E2 is coupled to the second gate line, and so on. The other ends of all the ESD protection components are coupled to a common end VA, which is a short ring. In this way, the ability of electrostatic protection is enhanced to dissipate electrostatic discharge current faster.

然而,另一种玻璃基板,却无法以上述方式,来完全防止静电放电电流所造成的损害。请参考图4。图4为玻璃基板400的示意图。玻璃基板400包含一像素模块410、一移位寄存器模块420、一总线模块430。像素模块410包含多个像素区与一静电防护模块412。像素模块410可模拟于图2与图3的设计,亦由多条横向的栅极线与多条纵向的源极线交错构成多个像素区,如像素区411所示。静电防护模块412包含多个静电防护元件E5~En,与一共同端VA。移位寄存器模块420包含多个移位寄存器S1~Sn,每个移位寄存器皆有对应的栅极线。第一个移位寄存器S1用以接收开始讯号ST,然后再发出栅极讯号给第一条栅极线,之后的移位寄存器S2根据第一条栅极讯号依序发出栅极讯号给相对应的栅极线依此类推一直到Sn输出第n条栅极讯号完成一个页面的扫描。总线模块430包含总线B1、B2、B3,用以提供偏压VSS、时钟讯号XCK与CK给移位寄存器模块420。由图可知,玻璃基板400与玻璃基板130的不同处在于玻璃基板400多出了移位寄存器模块420与总线模块430。但对于移位寄存器模块420与总线模块430却无相关的静电防护的设计。虽然移位寄存器模块420本身具有静电防护的能力,但是总线模块430却没有。且总线模块430所接收的偏压VSS,时钟讯号XCK与CK皆从玻璃基板400外部传送进来,因此总线模块430需耦接至玻璃基板400的边缘,更容易受到静电放电事件的影响而产生短路或断路的情况,使得于制作玻璃基板400时,容易失败。However, another glass substrate cannot completely prevent the damage caused by the electrostatic discharge current in the above-mentioned manner. Please refer to Figure 4. FIG. 4 is a schematic diagram of a glass substrate 400 . The glass substrate 400 includes a pixel module 410 , a shift register module 420 , and a bus module 430 . The pixel module 410 includes a plurality of pixel regions and an electrostatic protection module 412 . The pixel module 410 can imitate the designs shown in FIG. 2 and FIG. 3 , and multiple horizontal gate lines and multiple vertical source lines intersect to form multiple pixel regions, as shown in the pixel region 411 . The ESD protection module 412 includes a plurality of ESD protection elements E5˜En and a common terminal VA. The shift register module 420 includes a plurality of shift registers S1˜Sn, and each shift register has a corresponding gate line. The first shift register S1 is used to receive the start signal ST, and then send the gate signal to the first gate line, and the subsequent shift register S2 sends the gate signal to the corresponding gate line in sequence according to the first gate signal The gate lines are deduced by analogy until the Sn outputs the nth gate signal to complete the scanning of a page. The bus module 430 includes buses B1 , B2 , and B3 for providing bias voltage VSS, clock signals XCK and CK to the shift register module 420 . It can be seen from the figure that the difference between the glass substrate 400 and the glass substrate 130 is that the glass substrate 400 has more shift register modules 420 and bus modules 430 . But for the shift register module 420 and the bus module 430, there is no ESD protection design. Although the shift register module 420 itself has the ability of electrostatic protection, the bus module 430 does not. Moreover, the bias voltage VSS received by the bus module 430, the clock signals XCK and CK are all transmitted from the outside of the glass substrate 400, so the bus module 430 needs to be coupled to the edge of the glass substrate 400, and it is more likely to be affected by electrostatic discharge events and cause a short circuit. Or the situation of disconnection makes it easy to fail when manufacturing the glass substrate 400 .

发明内容 Contents of the invention

因此,本发明的主要目的,即是要提出一种具有静电防护功能的控制电路,以解决上述的问题。Therefore, the main purpose of the present invention is to provide a control circuit with electrostatic protection function to solve the above problems.

本发明提供一种具静电防护的控制电路,包含多个移位寄存器;多个总线,耦接于该多个移位寄存器;一共同端;一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;及一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流;其中该共同端用以释放经由该组放电路径所传来的静电电流,其中该组静电防护元件包含:一第一静电防护元件,耦接于该多个总线的一第一总线,该组放电路径包含一第一放电路径,耦接于该第一静电防护元件与该共同端;以及一第二静电防护元件,耦接于该第一总线,该组放电路径还包含一第二放电路径,耦接于该第二静电防护元件与该共同端。The present invention provides a control circuit with electrostatic protection, comprising a plurality of shift registers; a plurality of buses coupled to the plurality of shift registers; a common terminal; a group of electrostatic protection components coupled to the plurality of buses A group of buses, used to protect the plurality of buses from being damaged by electrostatic current; and a group of discharge paths, coupled between the group of electrostatic protection components and the common end, to provide a discharge path for electrostatic current; wherein the common end Used to discharge the electrostatic current transmitted through the group of discharge paths, wherein the group of electrostatic protection components includes: a first electrostatic protection component coupled to a first bus of the plurality of buses, and the group of discharge paths includes a first A discharge path, coupled to the first ESD protection component and the common end; and a second ESD protection component, coupled to the first bus, the group of discharge paths also includes a second discharge path, coupled to the The second electrostatic protection element is connected to the common end.

本发明还提供一种具有静电防护的控制电路,包含:多个移位寄存器;多个总线,耦接于该多个移位寄存器;一共同端;一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;以及一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流,其中该组静电防护元件包含:多个第一静电防护元件,耦接于该多个总线,该组放电路径包含一第一放电路径,耦接于该多个第一静电防护元件与该共同端;以及多个第二静电防护元件,耦接于该多个总线,该组放电路径还包含一第二放电路径,耦接于该多个第二静电防护元件与该共同端。The present invention also provides a control circuit with electrostatic protection, including: multiple shift registers; multiple buses, coupled to the multiple shift registers; a common terminal; a group of electrostatic protection components, coupled to the multiple A set of buses for protecting the plurality of buses from electrostatic current damage; and a set of discharge paths coupled between the set of electrostatic protection components and the common terminal for providing discharge paths to the electrostatic current, wherein The set of ESD protection components includes: a plurality of first ESD protection components coupled to the plurality of buses, the set of discharge paths includes a first discharge path coupled to the plurality of first ESD protection components and the common end; and A plurality of second ESD protection elements are coupled to the plurality of buses, and the set of discharge paths further includes a second discharge path coupled to the plurality of second ESD protection elements and the common end.

本发明还提供一种具静电防护控制电路的液晶显示器,包含一第一玻璃基板,包含多个控制电路;多个总线,耦接于该多个控制电路;一共同端;一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个控制电路不被静电电流损害;及一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流;其中该共同端用以释放经由该组放电路径所传来的静电电流;一第二玻璃基板;及一液晶层,该液晶层介于该第一玻璃基板与该第二玻璃基板之间,其中该组静电防护元件包含:一第一静电防护元件,耦接于该多个总线的一第一总线,该组放电路径包含一第一放电路径,耦接于该第一静电防护元件与该共同端;以及一第二静电防护元件,耦接于该第一总线,该组放电路径还包含一第二放电路径,耦接于该第二静电防护元件与该共同端。The present invention also provides a liquid crystal display with an electrostatic protection control circuit, comprising a first glass substrate, including a plurality of control circuits; a plurality of buses, coupled to the plurality of control circuits; a common terminal; a group of electrostatic protection components , a group of buses coupled to the plurality of buses, used to protect the plurality of control circuits from being damaged by electrostatic current; and a group of discharge paths, coupled to the group of electrostatic protection components and the common terminal, to provide discharge path for electrostatic current; wherein the common end is used to discharge the electrostatic current transmitted through the group of discharge paths; a second glass substrate; and a liquid crystal layer, the liquid crystal layer is interposed between the first glass substrate and the second glass Between the substrates, wherein the group of electrostatic protection components includes: a first electrostatic protection component coupled to a first bus of the plurality of buses, and the group of discharge paths includes a first discharge path coupled to the first static electricity A protection element and the common end; and a second ESD protection element coupled to the first bus, and the set of discharge paths further includes a second discharge path coupled to the second ESD protection element and the common end.

本发明还提供一种具有静电防护控制电路的液晶显示器,包含:一第一玻璃基板,包含:多个控制电路;多个总线,耦接于该多个控制电路;一共同端;一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;及一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流;其中该共同端用以释放经由该组放电路径所传来的静电电流;一第二玻璃基板;以及一液晶层,该液晶层介于该第一玻璃基板与该第二玻璃基板之间,其中该组静电防护元件包含:多个第一静电防护元件,耦接于该多个总线,该组放电路径包含一第一放电路径,耦接于该多个第一静电防护元件与该共同端;以及多个第二静电防护元件,耦接于该多个总线,该组放电路径还包含一第二放电路径,耦接于该多个第二静电防护元件与该共同端。The present invention also provides a liquid crystal display with an electrostatic protection control circuit, comprising: a first glass substrate, including: a plurality of control circuits; a plurality of buses, coupled to the plurality of control circuits; a common terminal; A protection element, coupled to a group of buses of the plurality of buses, used to protect the plurality of buses from being damaged by electrostatic current; and a set of discharge paths, coupled to the group of electrostatic protection elements and the common end, for providing Discharge path for electrostatic current; wherein the common end is used to discharge the electrostatic current transmitted through the group of discharge paths; a second glass substrate; and a liquid crystal layer, the liquid crystal layer is between the first glass substrate and the second Between the glass substrates, the group of ESD protection components includes: a plurality of first ESD protection components coupled to the plurality of buses, and the group of discharge paths includes a first discharge path coupled to the plurality of first ESD protection components components and the common end; and a plurality of second electrostatic protection elements coupled to the plurality of buses, the set of discharge paths also includes a second discharge path coupled to the plurality of second electrostatic protection elements and the common end .

附图说明 Description of drawings

图1为一液晶显示器的示意图。FIG. 1 is a schematic diagram of a liquid crystal display.

图2为玻璃基板的示意图。FIG. 2 is a schematic diagram of a glass substrate.

图3为现有技术的玻璃基板的示意图。FIG. 3 is a schematic diagram of a glass substrate in the prior art.

图4为现有技术的玻璃基板的示意图。FIG. 4 is a schematic diagram of a glass substrate in the prior art.

图5为本发明的具有静电防护的控制电路的示意图。FIG. 5 is a schematic diagram of the control circuit with electrostatic protection of the present invention.

图6为本发明具有静电防护的玻璃基板的示意图。FIG. 6 is a schematic diagram of a glass substrate with electrostatic protection according to the present invention.

图7为本发明的另一具有静电防护的控制电路的示意图。FIG. 7 is a schematic diagram of another control circuit with electrostatic protection according to the present invention.

图8为本发明的另一具有静电防护的玻璃基板的示意图。FIG. 8 is a schematic diagram of another glass substrate with electrostatic protection according to the present invention.

图9为本发明的静电防护元件的示意图。FIG. 9 is a schematic diagram of the electrostatic protection component of the present invention.

附图符号说明Description of reference symbols

100                      液晶显示器100 LCD display

110130330400600800      玻璃基板110130330400600800 glass substrate

120                     液晶层120 Liquid crystal layer

210411811               像素区210411811 Pixel area

Q1                      薄膜晶体管Q1 Thin Film Transistor

C1                      储存电容C1 Storage capacitor

VCOM VA Vx              共同端VCOM VA Vx common terminal

E1-En                   静电防护元件E1-En ESD Protection Components

410610810               像素模块410610810 Pixel Module

420520720               移位寄存器模块420520720 Shift register module

430510710               总线模块430510710 Bus module

412530540612730740812   静电防护模块412530540612730740812 Static protection module

S1~Sn                  移位寄存器S1~Sn Shift register

ST                      开始讯号ST Start signal

B1-B9                   总线B1-B9 Bus

VSS                     偏压VSS Bias

XCK CK                  时钟讯号XCK CK clock signal

P1P2P3P4                放电路径P1P2P3P4 Discharge path

500700                控制电路500700 Control circuit

501502701             静电放电事件501502701 Electrostatic discharge event

具体实施方式 Detailed ways

请参考图5。图5为本发明的具有静电防护的控制电路500的示意图。如图所示,具有静电防护的控制电路500包含一总线模块510、一移位寄存器模块520、二静电防护模块530与540、二放电路径P1与P2、一共同端Vx。总线模块510包含总线B4、B5、B6,分别用以提供偏压VSS、时钟讯号XCK与CK给移位寄存器模块520。移位寄存器模块520包含多个移位寄存器S1~Sn,每个移位寄存器皆有对应的栅极线。第一个移位寄存器S1用以接收开始讯号ST,然后再发出栅极讯号给第一条栅极线,之后的移位寄存器S2根据第一条栅极讯号依序发出栅极讯号给相对应的栅极线依此类推一直到Sn输出第n条栅极讯号完成一个页面的扫描。静电防护模块530包含三静电防护元件E7、E8、E9,分别耦接至总线B4、B5、B6,用以保护总线B4~B6免于静电放电事件的损害。静电防护模块540包含三静电防护元件E10、E11、E12,分别耦接至总线B4、B5、B6并与防护模块530维持一固定距离,用以保护总线B4~B6免于静电放电事件的损害。放电路径P1与P2分别耦接至静电防护模块530与540,用以提供静电放电电流流通的路径。共同端Vx耦接至放电路径P1与P2,用以将所流通的静电放电电流消散。举例来说,在一般状态下,静电防护模块530为断路状态,对于总线B4来说,静电防护元件E7亦呈现断路状态,因此,不会影响总线B4的正常运作。而当一静电放电事件501发生于总线B4上端时,静电防护元件E7导通,将静电放电电流导通至放电路径P1,再经由共同端Vx,来释放该静电放电电流,以此来保护总线B4。又例如当静电放电事件502发生于总线B4下端时,静电防护元件E10导通,将静电放电电流导通至放电路径P2,再经由共同端Vx,来释放该静电放电电流,以此来保护总线B4。而实际上静电防护模块530与540位置的摆放,并非绝对位于总线模块的上端或下端,根据线路布局时的考虑来予以摆放。而静电防护模块亦不仅限于两组,或可为多组,是根据线路布局时的考虑来予以设计。Please refer to Figure 5. FIG. 5 is a schematic diagram of a control circuit 500 with electrostatic protection according to the present invention. As shown in the figure, the control circuit 500 with ESD protection includes a bus module 510, a shift register module 520, two ESD protection modules 530 and 540, two discharge paths P1 and P2, and a common terminal Vx. The bus module 510 includes buses B4 , B5 , and B6 , which are respectively used to provide the bias voltage VSS and the clock signals XCK and CK to the shift register module 520 . The shift register module 520 includes a plurality of shift registers S1˜Sn, and each shift register has a corresponding gate line. The first shift register S1 is used to receive the start signal ST, and then send the gate signal to the first gate line, and the subsequent shift register S2 sends the gate signal to the corresponding gate line in sequence according to the first gate signal The gate lines are deduced by analogy until the Sn outputs the nth gate signal to complete the scanning of a page. The ESD protection module 530 includes three ESD protection components E7 , E8 , E9 respectively coupled to the buses B4 , B5 , and B6 to protect the buses B4 ˜ B6 from being damaged by ESD events. The ESD protection module 540 includes three ESD protection elements E10, E11, and E12, respectively coupled to the buses B4, B5, and B6 and maintaining a fixed distance from the protection module 530 to protect the buses B4-B6 from ESD damage. The discharge paths P1 and P2 are respectively coupled to the ESD protection modules 530 and 540 for providing a path for the ESD current to flow. The common terminal Vx is coupled to the discharge paths P1 and P2 for dissipating the flowing electrostatic discharge current. For example, in a normal state, the ESD protection module 530 is in an off state, and for the bus B4, the ESD protection element E7 is also in an off state, therefore, it will not affect the normal operation of the bus B4. And when an electrostatic discharge event 501 occurs on the upper end of the bus B4, the electrostatic protection element E7 is turned on, conducting the electrostatic discharge current to the discharge path P1, and then releasing the electrostatic discharge current through the common terminal Vx, thereby protecting the bus B4. For another example, when the ESD event 502 occurs at the lower end of the bus B4, the ESD protection element E10 is turned on, and conducts the ESD current to the discharge path P2, and then discharges the ESD current through the common terminal Vx, thereby protecting the bus B4. In fact, the placement of the ESD protection modules 530 and 540 is not absolutely located at the upper or lower end of the bus module, and they are placed according to the consideration of the circuit layout. The ESD protection modules are not limited to two groups, or may be multiple groups, which are designed according to the consideration of circuit layout.

请参考图6。图6为本发明具有静电防护的玻璃基板600的示意图。玻璃基板600包含一像素模块610,一控制电路500。像素模块610包含多个像素区与一静电防护模块612。像素模块610可模拟于像素模块410的设计,亦由多条横向的栅极线与多条纵向的源极线交错构成多个像素区,如像素区611所示。静电防护模块612包含多个静电防护元件E13~En,与一共同端VA。而控制电路500中的共同端Vx,便可与像素模块610的共同端VCOM耦接,或者与静电防护模块612的共同端VA耦接,使得当静电放电事件发生于总线模块510时,静电放电电流可经由静电防护模块530或540,分别流经放电路径P1或P2,再流至共同端Vx,最后经由共同端VCOM或VA来消散,以达成保护总线模块510的目的。Please refer to Figure 6. FIG. 6 is a schematic diagram of a glass substrate 600 with electrostatic protection according to the present invention. The glass substrate 600 includes a pixel module 610 and a control circuit 500 . The pixel module 610 includes a plurality of pixel regions and an electrostatic protection module 612 . The design of the pixel module 610 can be simulated to that of the pixel module 410 , and a plurality of horizontal gate lines and a plurality of vertical source lines intersect to form a plurality of pixel regions, as shown in the pixel region 611 . The ESD protection module 612 includes a plurality of ESD protection elements E13˜En and a common terminal VA. The common terminal Vx in the control circuit 500 can be coupled to the common terminal VCOM of the pixel module 610, or to the common terminal VA of the electrostatic protection module 612, so that when an electrostatic discharge event occurs on the bus module 510, the electrostatic discharge The current can pass through the ESD protection module 530 or 540 , flow through the discharge path P1 or P2 respectively, then flow to the common terminal Vx, and finally dissipate through the common terminal VCOM or VA, so as to protect the bus module 510 .

请参考图7。图7为本发明的另一具有静电防护的控制电路700的示意图。如图所示,具有静电防护的控制电路700包含一总线模块710、一移位寄存器模块720、二静电防护模块730与740、二静电防护元件E21与E22、二放电路径P3与P4、一共同端Vx。总线模块710包含总线B7、B8、B9,分别用以提供偏压VSS、时钟讯号XCK与CK给移位寄存器模块720。移位寄存器模块720包含多个移位寄存器S1~Sn,每个移位寄存器皆有对应的栅极线。第一个移位寄存器S1用以接收开始讯号ST,然后再发出栅极讯号给第一条栅极线,之后的移位寄存器S2根据第一条栅极讯号依序发出栅极讯号给相对应的栅极线依此类推一直到Sn输出第n条栅极讯号完成一个页面的扫描。静电防护模块730包含三静电防护元件E15、E16、E17,分别耦接至总线B7、B8、B9的上端,用以保护总线B7~B9免于静电放电事件的损害。静电防护模块740包含三静电防护元件E18、E19、E20,分别耦接至总线B7、B8、B9的下端,用以保护总线B7~B9免于静电放电事件的损害。放电路径P3与P4分别耦接至静电防护模块730与740,用以提供静电放电电流流通的路径。共同端Vx经由静电防护元件E22与E21分别耦接至放电路径P3与P4,用以将所流通的静电放电电流消散。控制电路700类似于控制电路500,差异仅在于控制电路700在放电路径P3、P4与共同端Vx之间,多了两个静电防护元件E21与E22。其目的在于若当静电放电事件701发生于图7中的交叉点A,将交叉点A打穿,使得放电路径P3与总线B8短路,若放电路径P3直接耦接至共同端Vx,由于共同端Vx提供一固定的电压电平,而会把总线B8上的时钟讯号XCK拉住,造成误动作。但若在放电路径P3与共同端Vx之间加入一静电防护元件E21,则在交叉点A被打穿后,虽然总线B8与放电路径P3为短路,但因有静电防护元件E21的关系,总线B8不会直接耦接至共同端Vx,而于一般状态下,静电防护元件E21为断路状态,因此,在一般状态下总线B8仍能正常运作以传送时钟讯号XCK。同样的情况,亦适用于当静电放电事件701发生于交叉点B、C、D时,亦可藉由静电防护元件E21与E22,让总线B7~B9仍能正常运作。另外,交叉点A~D仅表示放电路径与总线有交叉,于正常状态下并无耦接关系,举例来说,在线路布局时,总线B8为纵向走线于第一层走线层,而放电路径P3为横向走线于第二层走线层,由于层别不同故无实际上的耦接,当静电放电事件发生于总线B8的交叉点A时,若将交叉点A打穿,则仍会造成第一层走线层的总线B8与第二层走线层的放电路径P3的短路。而实际上静电防护模块730与740位置的摆放,并非绝对位于总线模块的上端或下端,是根据线路布局时的考虑来予以摆放。而静电防护模块亦不仅限于两组,或可为多组,亦根据线路布局时的考虑来予以设计。Please refer to Figure 7. FIG. 7 is a schematic diagram of another control circuit 700 with electrostatic protection according to the present invention. As shown in the figure, the control circuit 700 with ESD protection includes a bus module 710, a shift register module 720, two ESD protection modules 730 and 740, two ESD protection elements E21 and E22, two discharge paths P3 and P4, and a common Terminal Vx. The bus module 710 includes buses B7 , B8 , and B9 , which are respectively used to provide the bias voltage VSS and the clock signals XCK and CK to the shift register module 720 . The shift register module 720 includes a plurality of shift registers S1˜Sn, and each shift register has a corresponding gate line. The first shift register S1 is used to receive the start signal ST, and then send the gate signal to the first gate line, and the subsequent shift register S2 sends the gate signal to the corresponding gate line in sequence according to the first gate signal The gate lines are deduced by analogy until the Sn outputs the nth gate signal to complete the scanning of a page. The ESD protection module 730 includes three ESD protection elements E15 , E16 , E17 respectively coupled to the upper ends of the buses B7 , B8 , and B9 to protect the buses B7 ˜ B9 from being damaged by ESD events. The ESD protection module 740 includes three ESD protection elements E18 , E19 , E20 respectively coupled to the lower ends of the buses B7 , B8 , and B9 to protect the buses B7 ˜ B9 from being damaged by ESD events. The discharge paths P3 and P4 are respectively coupled to the ESD protection modules 730 and 740 for providing a path for the ESD current to flow. The common terminal Vx is respectively coupled to the discharge paths P3 and P4 via the ESD protection elements E22 and E21 for dissipating the flowing ESD current. The control circuit 700 is similar to the control circuit 500, the only difference is that the control circuit 700 has two more electrostatic protection elements E21 and E22 between the discharge paths P3, P4 and the common terminal Vx. Its purpose is that if the electrostatic discharge event 701 occurs at the intersection A in FIG. Vx provides a fixed voltage level, but will pull the clock signal XCK on the bus B8, causing malfunction. However, if an electrostatic protection element E21 is added between the discharge path P3 and the common terminal Vx, after the cross point A is broken through, although the bus B8 and the discharge path P3 are short-circuited, due to the relationship between the electrostatic protection element E21, the bus B8 is not directly coupled to the common terminal Vx, and under normal conditions, the ESD protection element E21 is in a disconnected state. Therefore, under normal conditions, the bus B8 can still operate normally to transmit the clock signal XCK. The same situation is also applicable when the ESD event 701 occurs at the intersections B, C, and D, and the ESD protection elements E21 and E22 can also be used to keep the buses B7-B9 still operating normally. In addition, the intersection points A~D only indicate that the discharge path crosses the bus line, and there is no coupling relationship under normal conditions. The discharge path P3 is horizontally routed on the second layer of the wiring layer. There is no actual coupling due to the different layers. When the electrostatic discharge event occurs at the intersection A of the bus B8, if the intersection A is broken through, then It will still cause a short circuit between the bus B8 of the first wiring layer and the discharge path P3 of the second wiring layer. In fact, the placement of the ESD protection modules 730 and 740 is not absolutely located at the upper end or lower end of the bus module, but is placed according to the consideration of the circuit layout. The ESD protection module is not limited to two groups, or may be multiple groups, and is also designed according to the consideration of circuit layout.

请参考图8。图8为本发明具有静电防护的玻璃基板800的示意图。玻璃基板800包含一像素模块810、一控制电路700。像素模块810包含多个像素区、一静电防护模块812。像素模块810可模拟于像素模块410的设计,亦由多条横向的栅极线与多条纵向的源极线交错构成多个像素区,如像素区811所示。静电防护模块812包含多个静电防护元件E23~En,与一共同端VA。而控制电路700中的共同端Vx,便可与像素模块810的共同端VCOM耦接,或者与静电防护模块812的共同端VA耦接,使得当静电放电事件发生于总线模块710时,静电放电电流可经由静电防护模块730或740,分别流经放电路径P3或P4,再经由静电防护元件E22与E21,流至共同端Vx,最后经由共同端VCOM或VA来消散,以此,来实现保护总线模块710的目的。Please refer to Figure 8. FIG. 8 is a schematic diagram of a glass substrate 800 with electrostatic protection according to the present invention. The glass substrate 800 includes a pixel module 810 and a control circuit 700 . The pixel module 810 includes a plurality of pixel regions and an electrostatic protection module 812 . The design of the pixel module 810 can be simulated to that of the pixel module 410 , and a plurality of horizontal gate lines and a plurality of vertical source lines intersect to form a plurality of pixel regions, as shown in the pixel region 811 . The ESD protection module 812 includes a plurality of ESD protection elements E23˜En and a common terminal VA. The common terminal Vx in the control circuit 700 can be coupled with the common terminal VCOM of the pixel module 810, or coupled with the common terminal VA of the electrostatic protection module 812, so that when an electrostatic discharge event occurs on the bus module 710, the electrostatic discharge The current can pass through the ESD protection module 730 or 740, flow through the discharge path P3 or P4 respectively, then pass through the ESD protection components E22 and E21, flow to the common terminal Vx, and finally dissipate through the common terminal VCOM or VA, so as to achieve protection The purpose of the bus module 710.

请参考图9。图9为本发明的静电防护元件900的示意图。静电防护元件900可由二极管D1与D2背对背耦接而成,或者由其他可防护电路元件免于静电放电事件损害的元件所构成。Please refer to Figure 9. FIG. 9 is a schematic diagram of an electrostatic protection component 900 of the present invention. The ESD protection component 900 can be formed by coupling diodes D1 and D2 back to back, or other components that can protect circuit components from ESD events.

综上所述,经由本发明的具静电防护电路的设计,在生产玻璃基板时,便能有效地来抵抗静电放电事件,使得玻璃基板上控制电路的相关讯号走线,能够免于静电放电事件的损害,进而提高生产的合格率。然而本发明所设计的静电防护电路,并非仅局限应用于玻璃基板与液晶显示器上,其他的电路设计,皆可利用本发明的精神,以静电防护元件、放电路径、共同端等,来实现静电防护的目的。To sum up, through the design of the electrostatic protection circuit of the present invention, the electrostatic discharge event can be effectively resisted during the production of the glass substrate, so that the relevant signal routing of the control circuit on the glass substrate can be free from the electrostatic discharge event damage, thereby increasing the pass rate of production. However, the electrostatic protection circuit designed by the present invention is not limited to be applied to glass substrates and liquid crystal displays. Other circuit designs can use the spirit of the present invention to realize electrostatic protection with electrostatic protection components, discharge paths, and common terminals. purpose of protection.

以上所述仅为本发明的较佳实施例,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (18)

1. 一种具有静电防护的控制电路,包含:1. A control circuit with electrostatic protection, comprising: 多个移位寄存器;multiple shift registers; 多个总线,耦接于该多个移位寄存器;a plurality of buses, coupled to the plurality of shift registers; 一共同端;a common terminal; 一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;以及a set of electrostatic protection components, coupled to a set of buses of the plurality of buses, to protect the plurality of buses from being damaged by electrostatic current; and 一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流,A set of discharge paths, coupled to the set of electrostatic protection components and the common end, to provide discharge paths for electrostatic currents, 其中该组静电防护元件包含:Among them, the group of electrostatic protection components includes: 一第一静电防护元件,耦接于该多个总线的一第一总线,该组放电路径包含一第一放电路径,耦接于该第一静电防护元件与该共同端;以及A first ESD protection component coupled to a first bus of the plurality of buses, the set of discharge paths includes a first discharge path coupled to the first ESD protection component and the common end; and 一第二静电防护元件,耦接于该第一总线,该组放电路径还包含一第二放电路径,耦接于该第二静电防护元件与该共同端。A second ESD protection component is coupled to the first bus, and the set of discharge paths further includes a second discharge path, coupled to the second ESD protection component and the common end. 2. 如权利要求1所述的控制电路,还包含一第三静电防护元件,耦接于该第二放电路径与该共同端之间。2. The control circuit as claimed in claim 1 , further comprising a third ESD protection element coupled between the second discharge path and the common terminal. 3. 如权利要求1所述的控制电路,还包含一第四静电防护元件,耦接于该第一放电路径与该共同端之间。3. The control circuit as claimed in claim 1 , further comprising a fourth electrostatic protection element coupled between the first discharge path and the common terminal. 4. 如权利要求1所述的控制电路,其中该组静电防护元件为一组互相反向并联的二极管。4. The control circuit according to claim 1, wherein the group of electrostatic protection components is a group of diodes connected in antiparallel to each other. 5. 一种具有静电防护的控制电路,包含:5. A control circuit with electrostatic protection, comprising: 多个移位寄存器;multiple shift registers; 多个总线,耦接于该多个移位寄存器;a plurality of buses, coupled to the plurality of shift registers; 一共同端;a common terminal; 一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;以及a set of electrostatic protection components, coupled to a set of buses of the plurality of buses, to protect the plurality of buses from being damaged by electrostatic current; and 一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流,A set of discharge paths, coupled to the set of electrostatic protection components and the common end, to provide discharge paths for electrostatic currents, 其中该组静电防护元件包含:Among them, the group of electrostatic protection components includes: 多个第一静电防护元件,耦接于该多个总线,该组放电路径包含一第一放电路径,耦接于该多个第一静电防护元件与该共同端;以及A plurality of first ESD protection components coupled to the plurality of buses, the group of discharge paths includes a first discharge path coupled to the plurality of first ESD protection components and the common end; and 多个第二静电防护元件,耦接于该多个总线,该组放电路径还包含一第二放电路径,耦接于该多个第二静电防护元件与该共同端。A plurality of second ESD protection elements are coupled to the plurality of buses, and the set of discharge paths further includes a second discharge path coupled to the plurality of second ESD protection elements and the common terminal. 6. 如权利要求5所述的控制电路,还包含一第三静电防护元件,耦接于该第二放电路径与该共同端之间。6. The control circuit as claimed in claim 5 , further comprising a third ESD protection element coupled between the second discharge path and the common terminal. 7. 如权利要求5所述的控制电路,还包含一第四静电防护元件,耦接于该第一放电路径与该共同端之间。7. The control circuit as claimed in claim 5 , further comprising a fourth electrostatic protection element coupled between the first discharge path and the common terminal. 8. 如权利要求5所述的控制电路,其中该组静电防护元件为一组互相反向并联的二极管。8. The control circuit according to claim 5, wherein the group of electrostatic protection components is a group of diodes connected in antiparallel to each other. 9. 一种具有静电防护控制电路的液晶显示器,包含:9. A liquid crystal display with an electrostatic protection control circuit, comprising: 一第一玻璃基板,包含:A first glass substrate, comprising: 多个控制电路;Multiple control circuits; 多个总线,耦接于该多个控制电路;Multiple buses, coupled to the multiple control circuits; 一共同端;a common terminal; 一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;及a set of electrostatic protection components, coupled to a set of buses of the plurality of buses, to protect the plurality of buses from being damaged by electrostatic current; and 一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流;A set of discharge paths, coupled to the set of electrostatic protection components and the common end, to provide discharge paths for electrostatic currents; 其中该共同端用以释放经由该组放电路径所传来的静电电流;Wherein the common terminal is used to discharge the electrostatic current transmitted through the set of discharge paths; 一第二玻璃基板;以及a second glass substrate; and 一液晶层,该液晶层介于该第一玻璃基板与该第二玻璃基板之间,a liquid crystal layer, the liquid crystal layer is interposed between the first glass substrate and the second glass substrate, 其中该组静电防护元件包含:Among them, the group of electrostatic protection components includes: 一第一静电防护元件,耦接于该多个总线的一第一总线,该组放电路径包含一第一放电路径,耦接于该第一静电防护元件与该共同端;以及A first ESD protection component coupled to a first bus of the plurality of buses, the set of discharge paths includes a first discharge path coupled to the first ESD protection component and the common end; and 一第二静电防护元件,耦接于该第一总线,该组放电路径还包含一第二放电路径,耦接于该第二静电防护元件与该共同端。A second ESD protection component is coupled to the first bus, and the set of discharge paths further includes a second discharge path, coupled to the second ESD protection component and the common end. 10. 如权利要求9所述的液晶显示器,其中该第一玻璃基板还包含一第三静电防护元件,耦接于该第二放电路径与该共同端之间。10. The liquid crystal display as claimed in claim 9, wherein the first glass substrate further comprises a third electrostatic protection element coupled between the second discharge path and the common terminal. 11. 如权利要求9所述的液晶显示器,其中该第一玻璃基板还包含一第四静电防护元件,耦接于该第一放电路径与该共同端之间。11. The liquid crystal display as claimed in claim 9, wherein the first glass substrate further comprises a fourth electrostatic protection element coupled between the first discharge path and the common terminal. 12. 如权利要求9所述的液晶显示器,其中该多个控制电路为多个移位寄存器。12. The liquid crystal display as claimed in claim 9, wherein the plurality of control circuits are a plurality of shift registers. 13. 如权利要求9所述的液晶显示器,其中该组静电防护元件为一组互相反向并联的二极管。13. The liquid crystal display as claimed in claim 9, wherein the group of electrostatic protection components is a group of diodes connected in antiparallel to each other. 14. 一种具有静电防护控制电路的液晶显示器,包含:14. A liquid crystal display with an electrostatic protection control circuit, comprising: 一第一玻璃基板,包含:A first glass substrate, comprising: 多个控制电路;Multiple control circuits; 多个总线,耦接于该多个控制电路;Multiple buses, coupled to the multiple control circuits; 一共同端;a common terminal; 一组静电防护元件,耦接于该多个总线的一组总线,用以保护该多个总线不被静电电流损害;及a set of electrostatic protection components, coupled to a set of buses of the plurality of buses, to protect the plurality of buses from being damaged by electrostatic current; and 一组放电路径,耦接于该组静电防护元件与该共同端,用以提供放电路径给静电电流;A set of discharge paths, coupled to the set of electrostatic protection components and the common end, to provide discharge paths for electrostatic currents; 其中该共同端用以释放经由该组放电路径所传来的静电电流;Wherein the common terminal is used to discharge the electrostatic current transmitted through the set of discharge paths; 一第二玻璃基板;以及a second glass substrate; and 一液晶层,该液晶层介于该第一玻璃基板与该第二玻璃基板之间,a liquid crystal layer, the liquid crystal layer is interposed between the first glass substrate and the second glass substrate, 其中该组静电防护元件包含:Among them, the group of electrostatic protection components includes: 多个第一静电防护元件,耦接于该多个总线,该组放电路径包含一第一放电路径,耦接于该多个第一静电防护元件与该共同端;以及A plurality of first ESD protection components coupled to the plurality of buses, the group of discharge paths includes a first discharge path coupled to the plurality of first ESD protection components and the common end; and 多个第二静电防护元件,耦接于该多个总线,该组放电路径还包含一第二放电路径,耦接于该多个第二静电防护元件与该共同端。A plurality of second ESD protection elements are coupled to the plurality of buses, and the set of discharge paths further includes a second discharge path coupled to the plurality of second ESD protection elements and the common terminal. 15. 如权利要求14所述的液晶显示器,其中该第一玻璃基板还包含一第三静电防护元件,耦接于该第二放电路径与该共同端之间。15. The liquid crystal display as claimed in claim 14 , wherein the first glass substrate further comprises a third electrostatic protection element coupled between the second discharge path and the common terminal. 16. 如权利要求14所述的液晶显示器,其中该第一玻璃基板还包含一第四静电防护元件,耦接于该第一放电路径与该共同端之间。16. The liquid crystal display as claimed in claim 14 , wherein the first glass substrate further comprises a fourth electrostatic protection element coupled between the first discharge path and the common terminal. 17. 如权利要求14所述的液晶显示器,其中该多个控制电路为多个移位寄存器。17. The liquid crystal display as claimed in claim 14, wherein the plurality of control circuits are a plurality of shift registers. 18. 如权利要求14所述的液晶显示器,其中该组静电防护元件为一组互相反向并联的二极管。18. The liquid crystal display as claimed in claim 14, wherein the group of electrostatic protection components is a group of diodes connected in antiparallel to each other.
CNB2006101412184A 2006-09-28 2006-09-28 control circuit with electrostatic protection and liquid crystal display Expired - Fee Related CN100411005C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2006101412184A CN100411005C (en) 2006-09-28 2006-09-28 control circuit with electrostatic protection and liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2006101412184A CN100411005C (en) 2006-09-28 2006-09-28 control circuit with electrostatic protection and liquid crystal display

Publications (2)

Publication Number Publication Date
CN1928640A CN1928640A (en) 2007-03-14
CN100411005C true CN100411005C (en) 2008-08-13

Family

ID=37858673

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006101412184A Expired - Fee Related CN100411005C (en) 2006-09-28 2006-09-28 control circuit with electrostatic protection and liquid crystal display

Country Status (1)

Country Link
CN (1) CN100411005C (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101887707A (en) * 2010-06-24 2010-11-17 华为终端有限公司 LCD electrostatic protection method and LCD
CN103268747B (en) * 2012-12-26 2016-01-06 上海中航光电子有限公司 A kind of amorphous silicon gate driver circuit
CN106710541A (en) 2015-11-17 2017-05-24 南京瀚宇彩欣科技有限责任公司 Liquid crystal display device
CN105448224B (en) * 2015-12-31 2018-05-25 上海中航光电子有限公司 Display panel and display device
CN115100990B (en) * 2022-06-27 2024-09-27 厦门天马显示科技有限公司 Array substrate, driving method thereof, display panel and display device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6097509A (en) * 1996-11-27 2000-08-01 Rohm Co., Ltd. Image sensor
US6333661B1 (en) * 1998-09-25 2001-12-25 Kabushiki Kaisha Toshiba Insulated-gate transistor signal input device
JP2003308050A (en) * 2002-04-16 2003-10-31 Seiko Epson Corp Drive circuit and electro-optical panel
CN1564060A (en) * 2004-03-15 2005-01-12 友达光电股份有限公司 Liquid crystal display panel protection circuit and liquid crystal display
US20050127369A1 (en) * 2003-12-15 2005-06-16 Seiko Epson Corporation Electro-optical device, driving circuit, and electronic apparatus
CN1728216A (en) * 2004-07-26 2006-02-01 精工爱普生株式会社 Driving circuit and driving method of electro-optical panel, electro-optical device and electronic instrument

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6097509A (en) * 1996-11-27 2000-08-01 Rohm Co., Ltd. Image sensor
US6333661B1 (en) * 1998-09-25 2001-12-25 Kabushiki Kaisha Toshiba Insulated-gate transistor signal input device
JP2003308050A (en) * 2002-04-16 2003-10-31 Seiko Epson Corp Drive circuit and electro-optical panel
US20050127369A1 (en) * 2003-12-15 2005-06-16 Seiko Epson Corporation Electro-optical device, driving circuit, and electronic apparatus
CN1564060A (en) * 2004-03-15 2005-01-12 友达光电股份有限公司 Liquid crystal display panel protection circuit and liquid crystal display
CN1728216A (en) * 2004-07-26 2006-02-01 精工爱普生株式会社 Driving circuit and driving method of electro-optical panel, electro-optical device and electronic instrument

Also Published As

Publication number Publication date
CN1928640A (en) 2007-03-14

Similar Documents

Publication Publication Date Title
KR101229881B1 (en) Array substrate and display device having the same
KR102145390B1 (en) Display device including electrostatic discharge circuit
KR101839334B1 (en) Liquid crystal display device and method of fabricating the same
TWI382264B (en) Thin film transistor array panel and display device including the same
CN104035217B (en) The peripheral test circuit of display array substrate and display panels
US20060289939A1 (en) Array substrate and display device having the same
CN100411005C (en) control circuit with electrostatic protection and liquid crystal display
CN105097838B (en) Display panel and thin-film transistor array base-plate
US20060002045A1 (en) Semiconductor device, display device, and electronic apparatus
US11562997B2 (en) Electrostatic protection circuit, array substrate and display apparatus
US20180204829A1 (en) Array substrate and display device
CN103293812A (en) Array substrate, repairing method of array substrate, and display device
US20100053489A1 (en) Pixel array substrate
US20080055505A1 (en) ESD protection control circuit and LCD
CN107505789A (en) Array base palte and display panel
KR101255289B1 (en) Liquid crystal display device
KR20110106492A (en) Display substrate and manufacturing method thereof
CN101192379B (en) Active element array substrate with electrostatic discharge protection capability
WO2017202171A1 (en) Array substrate and manufacturing method therefor, and display device
CN113204145A (en) Display substrate and display device
JP2008116770A (en) Display device
CN108254982B (en) display device
KR101774585B1 (en) Display Device
JP2011166153A (en) Semiconductor device having guard ring structure, display driver circuit, and display apparatus
CN212782681U (en) A GOA circuit, array substrate and display device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080813