CN100410736C - Display circuit of display and display method thereof - Google Patents

Abstract

A display circuit of a display comprises a control circuit, a data driving circuit, a partial mode driving circuit, a scanning driving circuit and a liquid crystal display panel. When the display works in a partial display mode, when the scanning drive circuit scans to a non-display area, the control circuit stops controlling the data drive circuit, controls the partial mode drive circuit, and sends a common voltage to the liquid crystal display panel through the data line so as to enable two ends of the pixel electrode in the non-display area to be at equal potential.

Description

Monitor display circuit and display method thereof

technical field

The invention relates to a display circuit, in particular to a display circuit and a display method thereof.

Background technique

Liquid Crystal Display (LCD for short) was first used in electronic calculators and electronic clocks in the early 1970s. Subsequently, due to the discovery of a variety of new photoelectric effects and the improvement of drive technology, it has the advantages of low power consumption, thin and light weight, and low voltage drive. It has been widely used in TVs, mobile phones, notebook computers, personal digital Assistant (PersonalDigital Assistance, referred to as PDA) and so on. The liquid crystal display industry has been recognized as a very significant electronics industry.

FIG. 1 is a schematic diagram of a partial display mode (Partial Mode Display) of a liquid crystal display panel. Please refer to FIG. 1 , in a liquid crystal display, there is a display mode which is a partial display mode. When the LCD monitor works in partial display mode, there will be a display area and a non-display area on its screen, and only the display area will display images, while the non-display areas will not display any images.

FIG. 2A is an internal circuit diagram of a known liquid crystal display. Please refer to FIG. 2A , a known internal circuit of a liquid crystal display includes a control circuit 210 , a scanning driving circuit 220 , a data driving circuit 230 and a liquid crystal display panel 240 . Wherein, the shift pulse terminal 211 and the data signal terminal 212 of the control circuit 210 are respectively coupled to the data driving circuit 230 . The n data signal output terminals (Y ₁ -Y _n ) of the data driving circuit 230 and the m scanning lines (X ₁ -X _m ) of the scanning driving circuit are connected to the liquid crystal display panel 240 respectively. The data driving circuit 230 includes a shift register group 231 and n transmission gates 232 . The transfer gate 232 includes a first trigger terminal 21 and a second trigger terminal 23 respectively coupled to the shift register 231 . The data signal input terminal 25 of the transmission gate 232 is connected to the data signal terminal 212 , and the data signal output terminal 27 thereof is coupled to the data line Y ₃ . The shift register group is coupled to the shift pulse end 211 , and controls the conduction of the transmission gate 232 according to the shift pulse Vshift.

In addition, FIG. 2B is another data driving circuit diagram of the liquid crystal display. Referring to FIG. 2B , another data driving circuit 230 uses a transistor switch such as a transistor 234 to replace the transfer gate 232 in FIG. 2A . In this figure, taking the transistor 234 as an example, its source/drain terminal is coupled to the shift register group 231, the other source/drain terminal is coupled to the data line _Y3 , and its gate terminal is coupled to the data line Y3. Signal terminal 212 .

Regardless of the data driving circuit 230 in FIG. 2A or FIG. 2B , its working principle is the same. The following uses FIG. 2A to introduce it. Please refer to FIG. 2A . For the convenience of description, only the pixel circuit 250 is used as an example. The pixel circuit 250 includes a thin film transistor (Thin Film Transistor, hereinafter referred to as TFT) 251, a capacitor 252 and a pixel electrode 253. Known liquid crystal display display circuit, no matter it is in full display (Full Display) mode or its working method is all the same in partial display mode. When an image is to be displayed, the scan driving circuit 220 turns on the TFT 251. At the same time, the control circuit 210 also sends out a shift pulse Vshift and a data signal Vdata. The shift register group 231 will control the transmission gates 232 to be turned on in sequence according to the shift pulse Vshift. When the transmission gates 232 are turned on, the data signal Vdata will be sent to the TFT 251. When the TFT 251 is turned on, the data signal Vdata will be turned on. The capacitor 252 is charged, and after the capacitor 252 is charged, the pixel (Pixel) electrode 253 can be displayed on the screen.

But in the partial display mode, the non-display area on the liquid crystal display panel 240 is black, and the shift register group 230 still must transmit the data signal to the liquid crystal display panel 240 one by one, in other words, no matter in the display area Still in the non-display area, all circuits will operate in the same way. Although such a structure and operation method are simple, there is still a problem of power consumption.

Contents of the invention

In view of this, the purpose of the present invention is to provide a display circuit. When the liquid crystal display works in the partial display mode, in the non-display area, the display work can be completed without performing the shifting action, so as to save the power consumed by the shifting.

Another object of the present invention is to provide a display method for a display circuit of a display. When the display is not in the display area, the two ends of the pixel electrodes are controlled to be equipotential.

To achieve the above object, the present invention provides a display circuit, which is suitable for liquid crystal display panels. The display circuit of the present invention includes a data drive circuit, a partial mode drive circuit and a control circuit. Wherein, the data driving circuit has multiple data lines, and the data driving circuit sends the data signal to one of the data lines according to the shift pulse. In addition, the partial mode driving circuit has a plurality of switches, and the partial mode signal controls whether to conduct some of the switches. When the liquid crystal display scans to the non-display area, part of the display mode signal controls part of the switches to be turned on. The control circuit is coupled to the data driving circuit, and when the liquid crystal display panel scans to the display area, the control circuit sends shift pulses to the data driving circuit. When the liquid crystal display panel scans to a non-display area, the control circuit stops sending shift pulses.

Generally, each of the above switches is a Metal Oxide Semiconductor (MOS) transistor. The gate of the MOS transistor receives a partial mode voltage.

Generally speaking, the display circuit further includes a plurality of pixel circuits arranged in an array in the liquid crystal display panel, and each pixel circuit includes a pixel electrode.

Generally, the two ends of each pixel electrode are respectively coupled to the source/drain terminal of the above-mentioned one MOS transistor.

There is also a situation that the two ends of some of the pixel electrodes are respectively coupled to the source/drain terminal of the above-mentioned one MOS transistor.

In an embodiment of the present invention, multiple data lines of the data driving circuit are coupled to the above-mentioned liquid crystal display panel. When the above-mentioned liquid crystal display panel scans to the display area, the above-mentioned data driving circuit passes the data signal through the One of the above-mentioned data lines is sent to the above-mentioned liquid crystal display panel; each switch of the partial mode driving circuit has a common voltage output terminal, and is correspondingly coupled to the above-mentioned data line, when the above-mentioned display panel scans to a non-display area, the Part of the mode drive circuit receives a part of the mode signal, and sends the common voltage to the above-mentioned liquid crystal display panel through the above-mentioned data line; the control circuit is coupled to the above-mentioned data drive circuit and the above-mentioned part of the mode drive circuit, and sends the above-mentioned shift pulse To the above-mentioned data drive circuit and send the above-mentioned partial mode signal to the above-mentioned partial mode drive circuit, when the above-mentioned liquid crystal display panel scans to the non-display area, the above-mentioned control circuit stops sending the above-mentioned shift pulse, and then sends the above-mentioned partial mode signal to the above partial mode drive circuit.

Wherein, a plurality of switches of the partial mode circuit are correspondingly coupled to one of the above-mentioned data lines, and whether to conduct is determined by the above-mentioned partial-mode signal.

In another embodiment, the aforementioned switch is a transmission gate, and the transmission gate has a first trigger terminal, a second trigger terminal, a common voltage input terminal and a common voltage output terminal. Wherein, the first trigger terminal and the second trigger terminal of each transmission gate are respectively coupled to the control circuit for receiving part of the mode signal to determine whether the transmission gate is turned on. In addition, the common voltage input terminals of all transmission gates receive the common voltage, and the common voltage output terminals are respectively coupled to the data lines.

Another object of the present invention is to provide a display method suitable for the display circuit of the above-mentioned display. This display includes a control circuit, a data drive circuit and a display panel. There are a plurality of pixel electrodes and a plurality of data lines in the display panel. The method includes the following steps: first, the display works in a partial display mode, and the control circuit judges whether it is in the display area, and if it is not in the display area, the partial mode signal controls the two ends of the pixel electrodes to be equipotential.

As mentioned above, the present invention provides two methods for controlling the equipotential at both ends of the pixel electrode. The method of the first embodiment is as follows: firstly, the control circuit stops sending shift pulses to the data drive circuit; secondly, the partial mode signal controls the common The voltage is sent from the data line to the pixel electrode.

The method of the second embodiment is as follows: firstly, the control circuit stops sending shift pulses to the data driving circuit; secondly, the part of the mode signal turns on the switch, so that the two ends of the pixel electrodes are substantially short-circuited. In this embodiment, part of the mode signal is to control the conduction of the switch such as the transistor. When the switch is turned on, the two ends of the pixel electrode will not be completely short-circuited, because if the transistor is turned on at the source/drain, There will still be a slight voltage drop, so the two ends of the pixel electrodes can only be said to be essentially shorted.

It can be seen from the above that when the display is working in a partial display mode, if it is in a non-display area, the control circuit will stop sending shift pulses to control the data drive circuit, but directly make the two ends of the pixel electrodes equipotential. In this way, complex operations in the data driving circuit can be omitted, thereby reducing power consumption.

Detailed ways

Please refer to FIG. 3A , which is an internal circuit diagram of a liquid crystal display using MOS transistors as switches according to a first embodiment of the present invention. In the present invention, the control circuit 310 has its shift pulse terminal 311 and data signal terminal 312 respectively coupled to the data driving circuit 330 , and its partial mode signal terminal 313 is coupled to the partial mode driving circuit 340 . The data driving circuit 330 is coupled to the partial mode driving circuit 340 , and the partial mode driving circuit 340 is further coupled to the liquid crystal display panel 350 . Meanwhile, the scanning driving circuit 320 is also coupled to the liquid crystal display panel 350 .

Please continue to refer to FIG. 3A , the data driving circuit 330 includes a shift register set 331 and a plurality of switch circuits such as transmission gates 332 . The shift register group 331 is coupled to the shift pulse end 311 of the control circuit 310 for receiving the shift pulse Vshift. In addition, all the transmission gates in the data driving circuit 330 are shown as the transmission gate 332, the data signal input terminal 35 of which is coupled to the data signal terminal 312 of the control circuit 310 to receive the data signal Vdata and pass it through the data signal The output terminal 37 is sent to the partial mode driving circuit 340 . In addition, all transmission gates in the data driving circuit 330 generally have a first trigger terminal 31 and a second trigger terminal 33 like the transmission gate 332, wherein the first trigger terminal 31 and the second trigger terminal 33 are all coupled Connected to shift register group 331.

Although the above-mentioned data driving circuit constituted by the transmission gate as a switch is taken as an example, it does not limit that the data driving circuit provided by the present invention must be designed in this way. Among them, those skilled in the art can replace the transmission gate part with a MOS transistor as shown in FIG. 2B , or replace it with other switching circuits, which will not affect the present invention.

Please continue to refer to FIG. 3A , the partial mode driving circuit 340 includes a switch circuit such as a MOS transistor 341 . Wherein all MOS transistors are all shown as MOS transistor 341, and its gate terminal 39 is coupled to the part mode signal terminal 313 of control circuit 310, is used for receiving part mode signal Vpm, and its source/drain terminal 41 is coupled common The voltage terminal 343 is used to receive the common voltage Vcom, and its source/drain terminal 43 is coupled to the data line Y ₃ .

In addition, the present invention also provides another partial-mode driving circuit. Please refer to FIG. 3B , which is an internal circuit diagram of a liquid crystal display using transmission gates as switches according to a preferred embodiment of the present invention. In this embodiment, the control circuit 310 has a first partial mode signal terminal 313 and a second partial mode signal terminal 313'. In addition, the part-mode driving circuit 340 includes a plurality of switching circuits such as transmission gates 342, and all transmission gates in the part-mode driving circuit 340, as shown in the transmission gate 342, have a first trigger terminal 51, a second trigger terminal Terminal 53, signal input terminal 55 and signal output terminal 57. Wherein, the first trigger terminal 51 and the second trigger terminal 53 are respectively coupled to the first partial mode signal terminal 313 and the second partial mode signal terminal 313 ′. In addition, its signal input terminal 55 is coupled to the common voltage terminal 343 to receive the common voltage Vcom, and its signal output terminal 57 is coupled to the data line Y ₃ . Regardless of the partial-mode driving circuit using transmission gates as switches in this embodiment or the partial-mode driving circuit using MOS transistors as switches in the previous embodiment, the working principle is the same, which will be described in detail below.

Please continue to refer to FIG. 3A , the partial mode driving circuit 340 has n data lines (Y ₁ ~Y _n ), and the scan driving circuit 320 has m scanning lines (X ₁ ~X _m ), and these data lines (Y ₁ ~ Y _n ) and scan lines (X ₁ ˜X _m ) are arranged in a matrix in the liquid crystal display panel 350 . At the intersection of each data line (Y ₁ -Y _n ) and each scan line (X ₁ -X _m ), a pixel package such as a pixel circuit 360 is arranged, and all pixel circuits are such as a pixel The circuit 360 shown may include a TFT 361 , a capacitor 362 and a pixel electrode 363 . The gate terminal 45 of the TFT 361 is coupled to the scan line X ₃ , the source/drain terminal 47 is coupled to the data line Y ₃ , and the source/drain terminal 49 is coupled to the capacitor 362 and the pixel electrode 363 . The capacitor 362 is connected in parallel with the pixel electrode 363, one end of which is coupled to the source/drain terminal 49 of the TFT 361, and the other end receives the common voltage Vcom.

Please continue to refer to FIG. 3A . For the sake of simplicity, only the pixel circuit 360 is used as an example. When the liquid crystal display needs to display images on its panel, the scan driving circuit 320 will first send a scan signal from the scan line _X3 to the gate terminals of all the TFTs coupled to the scan line _X3 to turn on two of these TFTs. source/drain terminals. If the area where the pixel circuit 360 is located is the display area, the control circuit 310 will send a shift pulse Vshift to the shift buffer module to turn on all the transmission gates one by one in sequence. When the transmission gate 332 is turned on, the signal input terminal 35 thereof receives the data signal Vdata, and is sent to the data line Y ₃ through the signal output terminal 37 . At this time, the partial mode signal Vpm controls all the switch circuits such as the MOS transistor 43 in the partial mode circuit 340 to turn off (Turn Off). When the data signal Vdata is sent to the TFT 361 by the data line _Y3 , the data signal Vdata will be turned on from its source/drain terminal 47 to the source/drain terminal 49 to charge the capacitor 362 and make the pixel electrode 363 appear on the screen. Bright.

And if the area where the pixel circuit 360 is located is a non-display area, the control circuit will stop sending the shift pulse Vshift to the data driving circuit 330, and instead use the partial mode signal Vpm to control all switches such as MOS transistors 341 in the partial mode driving circuit 340 conduction. When the MOS transistor 341 is turned on, the common voltage Vcom will be sent to the TFT361 by the data line _Y3 , and the common voltage Vcom will be conducted from its source/drain terminal 47 to the source/drain terminal 49. At this time, the pixel electrode 363 and the two ends of the capacitor 362 have the same potential, so the capacitor 362 will not be charged, so the pixel electrode 363 will not produce bright light on the screen.

Please refer to FIG. 4 , which is an internal circuit diagram of a liquid crystal display according to another embodiment of the present invention. The difference between this embodiment and the previous embodiment is that part of the display driving circuit 340 in FIG. 3A is not used, but a switch transistor is used instead to couple to the two ends of the pixel electrodes. In the following, for the sake of simplicity, only the pixel circuit 450 is taken as an example. The pixel circuit 450 may include a TFT 441 , a capacitor 442 , a pixel electrode 443 and a switch transistor 444 . The two source/drain terminals of the switching transistor 444 are connected to the two ends of the pixel electrode 443 in the liquid crystal display panel, and the two source/drain terminals are respectively coupled to the two ends of the pixel electrode 443, and the gate terminal is connected to the receiving part. The partial mode signal Vpm is used to determine whether the switch transistor 444 is turned on or not. If the area where the pixel circuit 450 is located is the display area, its working method is the same as that of the previous embodiment, and will not be repeated here. And if the area where the pixel circuit 450 is located is a non-display area, the control circuit 310 will stop sending the shift pulse Vshift, and then the partial mode signal Vpm will control the switch transistor 444 to be turned on, so that the two ends of the pixel electrode 443 are substantially Short circuit, so there will be no bright light on the screen.

Although another circuit for making the two ends of the pixel electrodes equipotential is proposed above, it does not mean that all the pixel electrodes must be coupled to a transistor circuit. Those skilled in the art can couple only part of the pixel electrodes to the transistor circuit according to actual needs.

Please refer to FIG. 5 , which is a flow chart of the partial display mode of the display according to a preferred embodiment of the present invention. After synthesizing the above two embodiments and making an arrangement, we can summarize a working method of the partial display mode of the display. First, as described in step S501, when the display works in partial mode, as described in step S502, it is determined whether the area where each pixel circuit is located is a display area. If the area where the pixel circuit is located is the display area, as described in step S504, the display works in full display mode. However, if the area where the pixel circuit is located is a non-display area, then proceed to step S503 to control the equal potential of both ends of the pixel electrode.

The present invention proposes two kinds of methods that make the two ends of the pixel electrode equipotential in Fig. 3A and Fig. 4, arrange as follows, please refer to Fig. 6 at first, for making the two ends of the pixel electrode according to a preferred embodiment of the present invention Flowchart of the equipotential method. First, as described in step S601, the control circuit stops sending shift pulses to the data driving circuit. As described in step S602, a common voltage is controlled to be sent from the data lines of the liquid crystal display panel to the pixel electrodes. Finally, as described in step S603, the two ends of the pixel electrode are at the same potential.

Please refer to FIG. 7 , which is a flowchart of a method for making both ends of a pixel electrode equal in potential according to another preferred embodiment of the present invention. Another method for making the two ends of the pixel electrode equal potential provided by the present invention is firstly as described in step S701, the control circuit stops sending data signals to the data driving circuit. At this time, as described in step S702, a partial mode signal is sent through the partial mode signal terminal to control the two ends of the pixel electrode to be equivalent to short circuit, and then as described in step S703, the two ends of the pixel electrode can be regarded as short circuit.

In summary, when the liquid crystal display works in the partial display mode, the present invention directly makes the two ends of the pixel electrodes equipotential in its non-display area, without needing to output shift pulses for complex operations, so it can be greatly improved. of reduced power consumption.

Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.

Description of drawings

FIG. 1 is a schematic diagram of a partial display mode of a liquid crystal display panel.

FIG. 2A is an internal circuit diagram of a known liquid crystal display.

FIG. 2B is another data driving circuit diagram in a liquid crystal display.

3A is an internal circuit diagram of a liquid crystal display using MOS transistors as switches according to the first embodiment of the present invention.

FIG. 3B is an internal circuit diagram of a liquid crystal display using transmission gates as switches according to a preferred embodiment of the present invention.

FIG. 4 is an internal circuit diagram of a liquid crystal display according to another embodiment of the present invention.

Fig. 5 is a flow chart of the partial display mode of the display according to a preferred embodiment of the present invention.

FIG. 6 is a flow chart of a method for equipotentializing both ends of a pixel electrode according to a preferred embodiment of the present invention.

FIG. 7 is a flow chart of a method for making both ends of a pixel electrode equal in potential according to another preferred embodiment of the present invention.

Explanation of reference signs

21, 31, 51: the first trigger terminal

23, 33, 53: the second trigger terminal

25, 35, 49, 55: Data signal input terminals

27, 37, 51, 57: Data signal output terminals

39, 45: Gate terminal

41, 43, 47, 49: source/drain terminals

100: LCD display

210, 310: control circuit

211, 311: shift pulse terminal

212, 312: data signal terminal

220, 320: scanning drive circuit

230, 330: data drive circuit

231, 331: shift register group

232, 332: transmission gate

240, 350: LCD panel

250, 360: pixel circuit

251, 361, 441: thin film transistors

252, 362, 442: capacitance

253, 363, 443: pixel electrodes

313: Partial mode signal terminal

340: Partial mode drive circuit

341: MOS transistor

343: Common voltage input terminal

444: switch circuit

S501-S504: the workflow of the partial display mode of the display in the preferred embodiment of the present invention

S601-603: Flowchart of the method for making both ends of the pixel electrode equipotential according to the first embodiment of the present invention

S701-S703: Flowchart of the method for making both ends of the pixel electrode equipotential according to the second embodiment of the present invention

Claims (10)

1. a display circuit of display device is applicable to display panels, it is characterized in that the aforementioned display device display circuit comprises:

Data drive circuit has many data lines, and above-mentioned data drive circuit is delivered to the output of one of above-mentioned data line according to shift pulse with data-signal;

Partly the mode activated circuit has a plurality of switches, whether controls the above-mentioned switch in turning part by the part mode signal, when above-mentioned panel of LCD is scanned up to non-display area, and the above-mentioned switch conduction of above-mentioned part mode signal control section; And

Control circuit, be coupled to above-mentioned data drive circuit, when above-mentioned display panels is scanned up to the viewing area, then this control circuit sends above-mentioned shift pulse to above-mentioned data drive circuit, when above-mentioned display panels was scanned up to non-display area, then above-mentioned control circuit stopped to send above-mentioned shift pulse.

2. display circuit of display device according to claim 1 is characterized in that above-mentioned each switch is a metal oxide semiconductor transistor, and the gate terminal of above-mentioned metal oxide semiconductor transistor receives a part of mode voltage.

3. display circuit of display device according to claim 2 is characterized in that the aforementioned display device display circuit also comprises a plurality of pixel circuits, arrange to above-mentioned display panels with array way, and above-mentioned each pixel circuit comprises pixel capacitors.

4. display circuit of display device according to claim 3 is characterized in that the two ends of the above-mentioned pixel capacitors of part couple source electrode, the drain electrode end of above-mentioned metal oxide semiconductor transistor respectively.

5. display circuit of display device according to claim 1 is characterized in that:

Many data lines of described data drive circuit are coupled to above-mentioned display panels, when above-mentioned display panels is scanned up to the viewing area, then above-mentioned data drive circuit is delivered to above-mentioned display panels with data-signal by one of above-mentioned data line according to shift pulse;

Has the common electric voltage output terminal in each switch of described part mode activated circuit, and be coupled to above-mentioned data line accordingly, when above-mentioned display panel is scanned up to non-display area, then this part mode activated circuit receives a part of mode signal, and common electric voltage is delivered to above-mentioned display panels by above-mentioned data line;

Described control circuit, be coupled to above-mentioned data drive circuit and above-mentioned part mode activated circuit, when being scanned up to the viewing area, above-mentioned display panels sends above-mentioned shift pulse to above-mentioned data drive circuit, when being scanned up to non-display area, above-mentioned display panels sends above-mentioned part mode signal to above-mentioned part mode activated circuit, promptly work as above-mentioned display panels and be scanned up to non-display area, then above-mentioned control circuit stops to send above-mentioned shift pulse, then sends above-mentioned part mode signal to above-mentioned part mode activated circuit.

6. display circuit of display device according to claim 5 is characterized in that a plurality of switches of above-mentioned part mode circuit, and correspondence is coupled to one of above-mentioned data line respectively, and determines whether conducting by above-mentioned part mode signal.

7. according to claim 5 or 6 described display circuit of display device, it is characterized in that above-mentioned each switch comprises the transmission lock, each transmission lock has first trigger end, second trigger end, common electric voltage input end, above-mentioned first and second trigger ends are coupled to above-mentioned control circuit respectively, decide the whether conducting of above-mentioned transmission lock in order to receive above-mentioned part mode signal, above-mentioned common electric voltage input end receives common electric voltage.

8. the display packing of a display circuit of display device has wherein been used the described display circuit of display device of claim 3, it is characterized in that this method comprises the following steps:

Judge that by control circuit whether display is in the viewing area; And

As not in the viewing area then by the above-mentioned pixel capacitors of partial mode signal controlling two ends equipotential.

9. the display packing of display circuit of display device according to claim 8 is characterized in that controlling above-mentioned pixel capacitors two ends equipotential and comprises the following steps:

Control circuit stops above-mentioned data drive circuit is sent shift pulse; And

Partial mode signal controlling common electric voltage is sent into above-mentioned pixel capacitors from above-mentioned data line.

10. the display packing of display circuit of display device according to claim 8 is characterized in that above-mentioned control pixel capacitors two ends equipotential comprises the following steps:

Control circuit stops above-mentioned data drive circuit is sent shift pulse; And

Partly mode signal makes the pixel capacitors two ends be short circuit in fact switch conduction.

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