CN100383648C - Storage capacitor and liquid crystal display using the storage capacitor - Google Patents

Abstract

The present invention discloses a memory capacitor and a liquid crystal display using the memory capacitor. The memory capacitor comprises a first capacitance electrode, a dielectric layer arranged on the first capacitance electrode and a second capacitance electrode arranged on the dielectric layer, wherein at least one of the first capacitance electrode and the second capacitance electrode comprises at least one hole. Owing to the edge effect of the hole, the memory capacitor has a large capacitance value. As a further improvement, one of the first capacitance electrode and the second capacitance electrode can be provided with a plurality of mutually divided lugs. Due to the edge function of the lugs and the light transmission function of lug gaps, the capacitance value of the memory capacitor can be further increased. The liquid crystal display using the memory capacitor has a large memory capacitance value, and the aperture opening ratio of a pixel area can be raised.

Description

Storage capacitor and liquid crystal display using the storage capacitor

【Technical field】

The invention relates to a storage capacitor and a liquid crystal display using the storage capacitor.

【Background technique】

A liquid crystal display using an active matrix array generally includes a plurality of pixel regions formed by intersecting gate lines and source lines and a plurality of thin film transistors (Thin Film Transistor, TFT) arranged at the intersections of gate lines and source lines. Wherein, each pixel has a pixel electrode, and the thin film transistor is used to control the switching of the pixel electrode.

When a signal is applied to the thin film transistor, the pixel area is activated, and an image signal is applied to the pixel electrode. In order to achieve a high-quality display effect, the voltage applied to the pixel electrode must maintain a constant value until the next signal is received. However, the charge used to maintain the voltage on the pixel electrode usually leaks quickly, causing the voltage on the pixel electrode to drop prematurely, thereby reducing the display effect of the liquid crystal display. Therefore, each pixel of the liquid crystal display usually uses a storage capacitor to maintain its pixel. The voltage of the electrodes is stabilized for a predetermined time.

Please refer to FIG. 1 , which is a schematic diagram of a pixel area of a prior art liquid crystal display. The pixel area 2 includes a pixel electrode 20 , a source line 23 , a gate line 28 , a thin film transistor 200 and a storage capacitor 27 . The source line 23 and the gate line 28 cross each other to form the pixel region 2 , and the pixel electrode 20 is electrically connected to the source line 23 via the thin film transistor 200 , and the thin film transistor 200 is used as a switch to control switching of the pixel electrode 20 .

Please refer to FIG. 2 , which is a cross-sectional view of the storage capacitor 27 along the direction II-II shown in FIG. 1 . The storage capacitor 27 is located on a glass substrate 29 and includes a first capacitor electrode (ie, a gate line) 28, a first insulating layer 26 located on the glass substrate 29 and the first capacitor electrode 28, and a first insulating layer 26 located on the first insulating layer 26. The second capacitor electrode 24 located directly above the first capacitor electrode 28 . The second insulating layer 22 is located above the second capacitor electrode 24 , and the pixel electrode 20 is located on the second insulating layer 22 . A part of the second insulating layer 22 above the second capacitor electrode 24 has a connection hole (not shown), and the pixel electrode 20 is electrically connected to the second capacitor electrode 24 through the connection hole.

As mentioned above, the storage capacitor 27 is equivalent to a capacitor with two parallel planes, and its capacitance is calculated according to the following formula:

${\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; ST</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; \&epsiv;</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; A</span>}}{\mathrm{<span\; class="notranslate">\; d</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

In the formula (1), C _ST represents the capacitance value of the storage capacitor, ε represents the dielectric constant of the first insulating layer 26 between the first capacitance electrode 28 and the second capacitance electrode 24, and A represents the first capacitance electrode 28 and the second capacitance electrode 24. The effective area of the second capacitor electrode 24 , d represents the thickness of the first insulating layer 26 . Therefore, the capacitance C _ST of the storage capacitor 27 is proportional to the effective area A and inversely proportional to the thickness d.

To sum up, when the thickness d and the dielectric constant ε of the first insulating layer 26 are constant, increasing the capacitance C _ST of the storage capacitor 27 can be realized by increasing the effective area A. However, increasing the effective area A will reduce the aperture ratio of the pixel region 2, thereby affecting the display effect of the liquid crystal display.

【Content of invention】

In order to overcome the defects in the prior art that increase the capacitance value of the storage capacitor used in liquid crystal displays while reducing the aperture ratio of the pixel area, the present invention provides a liquid crystal display that has a larger capacitance value and does not reduce the opening ratio of the pixel area. Rate storage capacitor.

The present invention also provides a liquid crystal display using the above-mentioned storage capacitor.

The technical solution adopted by the present invention to solve the technical problem is to provide a storage capacitor, including a first capacitor electrode, a dielectric layer arranged on the first capacitor electrode and a second capacitor electrode arranged on the dielectric layer. The capacitor electrode, wherein at least one of the first capacitor electrode and the second capacitor electrode includes at least one hole.

As a further improvement, a plurality of bumps separated from each other may also be provided on at least one of the first capacitor electrode and the second capacitor electrode.

Another technical solution adopted by the present invention to solve the technical problem is to provide a liquid crystal display, wherein a pixel region includes a base and a storage capacitor arranged on the base, the storage capacitor includes a first capacitor electrode, a set A dielectric layer on the first capacitor electrode and a second capacitor electrode disposed on the dielectric layer, wherein at least one of the first capacitor electrode and the second capacitor electrode includes at least one hole.

As a further improvement, a plurality of bumps separated from each other may also be provided on at least one of the first capacitor electrode and the second capacitor electrode.

Compared with the prior art, the beneficial effects of the present invention are: the storage capacitor provided by the present invention, because there is at least one hole on the first capacitor electrode, the amount of charge accumulated on the surface of the first capacitor electrode is relatively large, so that the storage capacitor The capacitance value is larger. That is, when the electrodes of the first capacitor have the same area and use the dielectric layer of the same material, the capacitance value of the storage capacitor of the present invention is larger. The storage capacitor provided with a plurality of bumps can further increase the capacitance value of the storage capacitor due to the edge effect of the bumps and the light transmission effect of the gap between the bumps.

Similarly, for the liquid crystal display using the storage capacitor, since there is at least one hole on the first capacitor electrode, the charge accumulated on the surface of the first capacitor electrode is relatively large, so the capacitance value of the storage capacitor is relatively large. That is, when the electrodes of the first capacitor have the same area and use the dielectric layer of the same material, the capacitance value of the storage capacitor of the present invention is larger. The storage capacitor provided with a plurality of bumps can not only further increase the capacitance value of the storage capacitor due to the edge effect of the bumps and the light transmission effect of the gap between the bumps, but also increase the aperture ratio of the pixel area and improve the performance of the liquid crystal display. display effect.

【Description of drawings】

FIG. 1 is a schematic diagram of a pixel region with a storage capacitor in a prior art liquid crystal display.

FIG. 2 is a schematic cross-sectional view of the pixel region shown in FIG. 1 along the direction II-II.

FIG. 3 is a schematic diagram of a pixel region with a storage capacitor in the first embodiment of the liquid crystal display of the present invention.

FIG. 4 is a schematic cross-sectional view of the pixel region shown in FIG. 3 along the IV-IV direction.

FIG. 5 is a schematic diagram of a pixel region with a storage capacitor in a second embodiment of the liquid crystal display of the present invention.

FIG. 6 is a schematic diagram of a pixel region with a storage capacitor in a third embodiment of the liquid crystal display of the present invention.

【Detailed ways】

The pixel area with the storage capacitor in the first embodiment of the liquid crystal display of the present invention is shown in FIG. 3 and FIG. 4 . Please refer to FIG. 3 , which is a schematic diagram of a pixel area of the first embodiment of the liquid crystal display of the present invention. The pixel area 3 includes a pixel electrode 30 , a source line 33 , a gate line 38 , a thin film transistor 300 and a storage capacitor 37 . The source line 33 and the gate line 38 intersect each other to form the pixel region 3 , and the pixel electrode 30 is electrically connected to the source line 33 through the thin film transistor 300 , and the thin film transistor 300 is used as a switch to control switching of the pixel electrode 30 .

Please refer to FIG. 4 , which is a cross-sectional view of the storage capacitor 37 along the IV-IV direction shown in FIG. 3 . The storage capacitor 37 is located on a glass substrate 39 and includes a first capacitor electrode (ie, a gate line) 38, a first insulating layer 36 located on the glass substrate 39 and the first capacitor electrode 38, and a first insulating layer 36 located on the first insulating layer 36. The second capacitor electrode 34 located right above the first capacitor electrode 38 . The second insulating layer 32 is located above the second capacitor electrode 34 , and the pixel electrode 30 is located on the second insulating layer 32 . A portion of the second insulating layer 32 above the second capacitor electrode 34 has a hole (not shown), and the pixel electrode 30 is electrically connected to the second capacitor electrode 34 through the hole.

Wherein, the first insulating layer 36 is used as a dielectric layer, and the first capacitive electrode 38 is provided with a plurality of holes 380 on a plane. Because the first capacitive electrode 38 has a certain thickness, the curvature at the edge of the hole 380 is greater than the curvature of the plate surface without holes at all; An ideal plate capacitance cannot be formed. Compared with the prior art, it can be known from the knowledge of electrostatics that the charge density at the edge of the hole 380 is greater than the charge density on the surface of the first capacitor electrode 28 in the pixel area 2. In this case, when the voltage values of the two plates of the storage capacitor 27 and 37 are kept the same, the amount of charge accumulated on the surface of the first capacitor electrode 38 is greater than the amount of charge on the surface of the first capacitor electrode 28 . Since there is a capacitance formula for a capacitor:

C=q/V (2)

In formula (2), C represents the capacitance of the capacitor, q represents the amount of charge on the first capacitor electrode 38 or the second capacitor electrode 34 , and V represents the voltage between the first capacitor electrode 38 and the second capacitor electrode 34 . According to formula (2), when the storage capacitors 27 and 37 were in working order, their two-plates kept a stable fixed value voltage, that is, V was a constant value, and because there were a plurality of holes 380 on the first capacitance electrode 38 of the storage capacitor 37 , the amount of charge _q37 accumulated on the surface of the first capacitor electrode 37 is greater than the amount of charge _q27 accumulated on the surface of the first capacitor electrode 27 in the prior art, that is, the capacitance value C37 of the storage capacitor ₃₇ is greater than the capacitance value C27 of the storage capacitor ₂₇ . That is, when the first capacitor electrode 38 has the same area as the first capacitor electrode 28 and uses a dielectric layer of the same material, the capacitance of the storage capacitor 37 is greater than that of the storage capacitor 27 .

In the pixel area 3, a plurality of holes can also be provided only on the second capacitor electrode 34, or a plurality of holes can be arranged on both the first capacitor electrode 38 and the second capacitor electrode 34, and the edge effect of the hole can be used to make The capacitance value of the storage capacitor 37 is increased; at the same time, due to the light transmission effect of the hole, the aperture ratio of the pixel region 3 can also be increased.

Please refer to FIG. 5 , which is a schematic diagram of a pixel region with a storage capacitor in a second embodiment of the liquid crystal display of the present invention. The difference from the pixel region 3 with storage capacitors in the liquid crystal display of the first embodiment is that in the pixel region 5, a plurality of separated elongated bumps 502 are arranged on the second capacitor electrodes 54 constituting the storage capacitors 57 , In this way, each bump 502 and the first capacitor electrode 58 can form a sub-storage capacitor, that is, the storage capacitor 57 is equivalent to a storage capacitor formed by connecting a plurality of sub-storage capacitors in parallel, because the bump 502 and the first capacitor electrode The existence of the edge effect of the holes (not marked) on the 58 makes the capacitance value of the storage capacitor 57 larger than that of the storage capacitor 37; The aperture ratio of the pixel area 5 is increased.

In the pixel area 5, it is also possible to arrange a plurality of mutually separated bumps only on the first capacitor electrode 58, or to arrange a plurality of bumps on both the first capacitor electrode 58 and the second capacitor electrode 54, which can also be effective. The capacitance value of the storage capacitor 57 is increased, and the aperture ratio of the pixel region 5 is increased at the same time.

Please refer to FIG. 6 , which is a schematic diagram of a pixel region with a storage capacitor in a third embodiment of the liquid crystal display of the present invention. The difference from the pixel region 5 with the storage capacitor in the liquid crystal display of the second embodiment is that: in the pixel region 6 , the second capacitor electrode 64 constituting the storage capacitor 67 further includes a plurality of holes 602 . Due to the edge effect of the hole 602 , the capacitance of the storage capacitor 67 can be effectively increased.

Wherein, the first capacitive electrode may have a single-layer structure, a double-layer structure or a three-layer structure. If the first capacitance electrode is a single-layer structure, it can be made of conductive materials such as aluminum, chromium, niobium-aluminum alloy, molybdenum-tungsten alloy or molybdenum-niobium alloy; if the first capacitance electrode is a double-layer structure, its double The material of the layer can adopt the following material combination: the combination of molybdenum and neodymium aluminum alloy or the combination of neodymium aluminum alloy and chromium; if the first capacitance electrode is a three-layer structure, the material of its three layers can adopt the following material combination: titanium/ Aluminum/Titanium or Molybdenum/Al/Molybdenum. In addition, the above-mentioned aluminum alloys, such as neodymium aluminum alloys, niobium aluminum alloys, etc., can be replaced by aluminum. The structure and material selection of the second capacitor electrode is roughly the same as that of the first capacitor electrode, the difference is that when the second capacitor electrode is a double-layer structure, the material of the double layer can adopt the following material combination: Aluminum/Chrome or Aluminum/Titanium.

In addition, the second capacitor electrode and the pixel electrode can also be made of transparent conductive materials such as indium tin oxide (Indium Tin Oxide, ITO) or indium zinc oxide (Indium Zinc Oxide, IZO), which are used as the first insulating layer of the dielectric layer. The first insulating layer can be made of silicon nitride, silicon oxide, benzocyclobutene (Benzocyclobutene) or acryl (Acryl) and other dielectric materials, and the second insulating layer can be made of silicon nitride, silicon oxide, benzocyclobutene or acrylic and other insulating materials. The bumps may also be trapezoidal bumps or triangular bumps.

Claims (25)

1. memory capacitance, comprise that one first capacitance electrode, is arranged on dielectric layer and on this first capacitance electrode and is arranged at second capacitance electrode on this dielectric layer, it is characterized in that: one of them comprises at least one hole at least in this first capacitance electrode and second capacitance electrode.

2. memory capacitance as claimed in claim 1 is characterized in that: this first capacitance electrode is a single layer structure, and it adopts aluminium, chromium, Nb-Al alloy, molybdenum and tungsten alloy or molybdenum niobium alloy conductive material to make.

3. memory capacitance as claimed in claim 1 is characterized in that: this first capacitance electrode is a double-decker, and its double-deck material is one of following combination of materials: the combination of molybdenum and neodymium aluminium alloy or the combination of neodymium aluminium alloy and chromium.

4. memory capacitance as claimed in claim 1 is characterized in that: this first capacitance electrode is a three-decker, and the material of its three-decker is one of following combination of materials: titanium/aluminium/titanium or molybdenum/aluminium/molybdenum.

5. memory capacitance as claimed in claim 1 is characterized in that: this dielectric layer adopts silicon nitride, monox, phenylpropyl alcohol cyclobutane or acryl material to make.

6. memory capacitance as claimed in claim 1 is characterized in that: this second capacitance electrode is a single layer structure, and it adopts aluminium, chromium, Nb-Al alloy, molybdenum and tungsten alloy or molybdenum niobium alloy conductive material to make.

7. memory capacitance as claimed in claim 1 is characterized in that: this second capacitance electrode is a double-decker, and its double-deck material is one of following combination of materials: aluminium/chromium or aluminium/titanium.

8. memory capacitance as claimed in claim 1 is characterized in that: this second capacitance electrode is a three-decker, and the material of its three-decker is one of following combination of materials: titanium/aluminium/titanium or molybdenum/aluminium/molybdenum.

9. memory capacitance as claimed in claim 1 is characterized in that: one of them is provided with a plurality of projections that are separated from each other at least in this first capacitance electrode and second capacitance electrode.

10. memory capacitance as claimed in claim 9 is characterized in that: this projection is strip or trapezoidal or triangle.

11. memory capacitance as claimed in claim 1 is characterized in that: this second capacitance electrode adopts transparent conductive material to make.

12. memory capacitance as claimed in claim 11 is characterized in that: this transparent conductive material is indium zinc oxide or tin indium oxide.

13. LCD, the one pixel region comprises that a substrate and is arranged on this suprabasil memory capacitance, this memory capacitance comprises that one first capacitance electrode, is arranged on dielectric layer, on this first capacitance electrode and is arranged on second capacitance electrode on this dielectric layer, and it is characterized in that: one of them comprises at least one hole at least in this first capacitance electrode and second capacitance electrode.

14. LCD as claimed in claim 13 is characterized in that: this first capacitance electrode is a single layer structure, and it adopts aluminium, chromium, Nb-Al alloy, molybdenum and tungsten alloy or molybdenum niobium alloy conductive material to make.

15. LCD as claimed in claim 13 is characterized in that: this first capacitance electrode is a double-decker, and its double-deck material is one of following combination of materials: the combination of molybdenum and neodymium aluminium alloy or the combination of neodymium aluminium alloy and chromium.

16. LCD as claimed in claim 13 is characterized in that: this first capacitance electrode is a three-decker, and the material of its three-decker is one of following combination of materials: titanium/aluminium/titanium or molybdenum/aluminium/molybdenum.

17. LCD as claimed in claim 13 is characterized in that: this dielectric layer adopts silicon nitride, monox, phenylpropyl alcohol cyclobutane or acryl material to make.

18. LCD as claimed in claim 13 is characterized in that: this second capacitance electrode is a single layer structure, and it adopts aluminium, chromium, Nb-Al alloy, molybdenum and tungsten alloy or molybdenum niobium alloy conductive material to make.

19. LCD as claimed in claim 13 is characterized in that: this second capacitance electrode is a double-decker, and its double-deck material is one of following combination of materials: aluminium/chromium or aluminium/titanium.

20. LCD as claimed in claim 13 is characterized in that: this second capacitance electrode is a three-decker, and the material of its three-decker is one of following combination of materials: titanium/aluminium/titanium or molybdenum/aluminium/molybdenum.

21. LCD as claimed in claim 13 is characterized in that: this pixel region comprises that further one is arranged on the insulation course of this second capacitance electrode top, and this insulation adopts silicon nitride, monox, phenylpropyl alcohol cyclobutane or acryl material to make.

22. LCD as claimed in claim 13 is characterized in that: one of them is provided with a plurality of projections that are separated from each other at least in this first capacitance electrode and second capacitance electrode.

23. LCD as claimed in claim 22 is characterized in that: this projection is strip or trapezoidal or triangle.

24. LCD as claimed in claim 13 is characterized in that: this second capacitance electrode adopts transparent conductive material to make.

25. LCD as claimed in claim 24 is characterized in that: this transparent conductive material is indium zinc oxide or tin indium oxide.

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