CN100382418C - Multiplying circuit capable of adjusting output voltage in program control mode - Google Patents

Abstract

The invention discloses a multiplying circuit capable of regulating output voltage in a program control mode, which compares the output voltage with a reference voltage through the backtracking of the output voltage to control whether a voltage pump operates to pressurize the output voltage through a clock generator so as to maintain the output voltage within a preset range, and can provide stable output voltage for a load through the voltage stabilization of a voltage stabilizing circuit.

Description

A Multiplier Circuit with Programmable Adjustable Output Voltage

technical field

The invention relates to a voltage multiplication circuit, in particular to a multiplication circuit with low loss and programmable output voltage adjustment.

Background technique

Direct current (DC) is the most commonly used voltage source for electronic devices. In order to be suitable for electronic devices (or electronic components) with different driving voltages, a DC-DC converter is generally used to change the voltage. Please refer to Figure 1, which is a commonly used DC-DC voltage converter, which includes a step-down 1 (bandgap), a voltage pump 2 (pumpingCKT) and a voltage regulator circuit 3 (regulator), the user can Select the characteristics of the components according to the required voltage supply; assuming that the user needs an output voltage Vout of 7.2v and has a system voltage Vcc of 2.4v~3.6v, he can choose a 1.2v step-down converter 1 and a 6-fold Voltage pump 2, the system voltage Vcc is first stepped down by the step-down device 1 to form 1.2v, and then 6 times the voltage of the voltage pump 2 to form an output voltage Vout of 7.2v, and finally through the voltage regulator circuit 3 The stabilized voltage can provide the required 7.2v stable output voltage Vout. If the customer does not care about slight voltage fluctuations, the stabilized voltage circuit 3 may not be used.

The aforementioned voltage converter is stepped down by the step-down device 1, and then pressurized by the high-multiplier voltage pump 2, so its energy consumption is quite serious. Therefore, please refer to Figure 2. At present, a system voltage Vcc has been developed that directly uses the system voltage Vcc as the voltage converter. The operation mode of the source voltage of the voltage pump 2 also assumes that the user needs an output voltage Vout of 7.2v and has a system voltage Vcc of 2.4v~3.6v, then it only needs to use 3 times the voltage pump 2, and then go through the voltage regulator circuit 3, the required 7.2v stable output voltage Vout can be provided, thereby improving the operating efficiency of the voltage pump 2 and reducing overall energy consumption.

Another example is when the operating voltage of the system voltage Vcc is relatively wide, but it is necessary to directly use the system voltage Vcc as the source voltage of the voltage pump 2. For example, it is assumed that the output voltage Vout of 5.0v is required, but it has a voltage of 2.0v to 3.6v. When the system voltage is Vcc, when the system voltage Vcc=3.0~3.6v, use the double voltage pump 2; when the system voltage Vcc=2.0~2.5v, use the triple voltage pump 2; when the system voltage Vcc=2.5 ~3.0v, the voltage pump 2 switches between 2 and 3 times, and then the output voltage Vout is stabilized at 5.0v through the step-down and voltage stabilization of the voltage regulator circuit 3. Although this operation method is applicable to a wide range of However, when the system voltage Vcc is 2.5-3.0v, the voltage pump 2 will switch between 2 and 3 times, which seriously affects the conversion efficiency of its voltage.

Obviously, although the aforementioned DC-DC voltage converter can supply voltage according to the needs of users, it inevitably needs to be stepped down during the voltage conversion process to supply the voltage required by the load, thus causing unnecessary energy loss.

Contents of the invention

Therefore, the main object of the present invention is to provide a low loss multiplication circuit.

A secondary object of the present invention is to provide a multiplier circuit that can be programmed to adjust the output voltage.

The present invention is a multiplication circuit that can be programmed to adjust the output voltage, which includes a voltage pump (pumping CKT), a clock generator (CLK generator), and a comparator (comparator). The voltage pump has an input terminal, a The control terminal is connected to an output terminal; the clock generator is connected to the control terminal of the voltage pump, and it generates a clock signal to control the action of the voltage pump, so that the input voltage of the input terminal of the voltage pump is pressurized in the voltage pump The output terminal generates an output voltage; the comparator has two input terminals and one output terminal, the output terminal of the comparator is connected with the clock generator, one input terminal of the comparator is connected with the output terminal of the voltage pump, and the comparator The other input terminal of the comparator inputs a reference voltage, so when the output voltage of the output terminal of the voltage pump is lower than the reference voltage, the comparator is used to start the clock generator to drive the voltage pump to pressurize until the voltage pump When the output voltage of the output terminal of the voltage pump is higher than the reference voltage, the comparator is used to turn off the clock generator, so as long as the reference voltage is programmed, the output voltage of the output terminal of the voltage pump can be controlled for use by a load.

In addition, in order to avoid the loss of efficiency and shorten the life of the voltage pump switching times too frequently, the output voltage returned from the output terminal of the voltage pump can first pass through a voltage divider circuit to generate a first return voltage and a second return voltage. voltage, and then connected to the comparator with the assistance of a multiplexer (multiplexer), so that when the first backtracking voltage is lower than the reference voltage, the comparator is used to start the clock generator to drive the voltage pump The pressurization operation is performed until the second return voltage is higher than the reference voltage, and then the comparator is used to turn off the clock generator, thereby reducing the switching frequency of the voltage pump.

Description of drawings

FIG. 1 is a block diagram of a conventional DC-DC voltage converter.

FIG. 2 is a block diagram of another conventional DC-DC voltage converter.

FIG. 3 is a block diagram of a DC-DC voltage converter according to a first embodiment of the present invention.

FIG. 4 is a block diagram of a DC-DC voltage converter according to a second embodiment of the present invention.

Fig. 5 is a timing chart according to a second embodiment of the present invention.

FIG. 6 is a block diagram of an additional voltage stabilizing circuit according to the first embodiment of the present invention.

FIG. 7 is a block diagram of an additional voltage stabilizing circuit according to a second embodiment of the present invention.

Detailed ways

Relevant detailed content and technical description of the present invention, now in conjunction with accompanying drawing, explain as follows:

Please refer to FIG. 3 , which is the first embodiment of the present invention. The multiplying circuit according to the present invention includes a voltage pump 10 , a clock generator 20 , and a comparator 30 .

The voltage pump 10 has an input terminal 10a, a control terminal 10c, and an output terminal 10b.

The clock generator 20 is connected to the control terminal 10c of the voltage pump 10, and it generates a clock signal to control the start or stop of the voltage pump 10. The input voltage Vcc of the input terminal 10a of the voltage pump 10 is applied by the voltage pump 10. The output terminal 10 b of the voltage pump 10 is pressed to generate an output voltage Vout.

The comparator 30 has two input terminals 30a and an output terminal 30b, the output terminal 30b of the comparator 30 is connected to the clock generator 20, and the input terminal 30a of the comparator 30 is connected to the output terminal 10b of the voltage pump 10 , the other input terminal 30a of the comparator 30 inputs the reference voltage Vref.

When the circuit is started, the clock generator 20 will drive the voltage pump 10 to continuously pressurize to pressurize the output voltage Vout of the output terminal 10b of the voltage pump 10, and the output voltage Vout of the output terminal 10b of the voltage pump 10 is constantly Backtracking (feedback) to the comparator 30 until the output voltage Vout of the output terminal 10b of the voltage pump 10 is higher than the reference voltage Vref, the comparator 30 is used to generate a signal to turn off the clock generator 20 to stop driving The voltage pump 10 performs a pressurizing action. At this time, the output voltage Vout of the output terminal 10b of the voltage pump 10 will be consumed by a load (not shown in the figure) and will continue to decrease until the output voltage of the output terminal 10b of the voltage pump 10 When Vout is lower than the reference voltage Vref, the comparator 30 is used to generate a signal to start the clock generator 20 to drive the voltage pump 10 to pressurize, thereby forming a circular action loop. Therefore, as long as the reference voltage Vref is programmed, the The output voltage Vout of the output terminal 10b of the voltage pump 10 is controlled for use by the load (not shown in the figure).

Please refer to again shown in Fig. 4, it is the second embodiment of the present invention, multiplier circuit according to the present invention comprises a voltage pump 10, a clock generator 20, a comparator 30, a multiplexer 40, and a Voltage divider circuit 50.

The clock generator 20 is connected to the control terminal 10c of the voltage pump 10, and generates a clock signal to control the start or stop of the voltage pump 10. The input voltage Vcc of the input terminal 10a of the voltage pump 10 is applied by the voltage pump 10. Pressing on the output terminal 10b of the voltage pump 10 generates an output voltage Vout.

The voltage pump 10 has an input terminal 10a, a control terminal 10c, and an output terminal 10b.

The clock generator 20 is connected to the control terminal 10c of the voltage pump 10, which generates a discontinuous clock signal to control the start or stop of the voltage pump 10. The input voltage Vcc of the input terminal 10a of the voltage pump 10 passes through the The voltage doubler circuit of the voltage pump 10 makes the output terminal 10 b of the voltage pump 10 generate an output voltage Vout.

The comparator 30 has two input terminals 30 a and an output terminal 30 b, the output terminal 30 b of the comparator 30 is connected to the clock generator 20 , and the reference voltage Vref is input to one input terminal 30 a of the comparator 30 .

This multiplexer 40 has an output terminal 40b, a selection terminal 40c, a first input terminal 40a1, and a second input terminal 40a2, the output terminal 40b of the multiplexer 40 is connected to the other The input terminal 30 a is connected, and the selection terminal 40 c of the multiplexer 40 is connected to the output terminal 30 b of the comparator 30 .

The voltage divider circuit 50 has an input terminal 50a and an output terminal 50b. A first resistor Ra, a first connection point A, a third resistor Rc, and a first resistor R are connected in series from the input terminal 50a to the output terminal 50b. Two connection points B are connected to a second resistor Rb, the input terminal 50a of the voltage divider circuit 50 is connected to the output terminal 10b of the voltage pump 10, the first connection point A is connected to the first input terminal of the multiplexer 40 40a1, the second connection point B is connected to the second input terminal 40a2, and the output terminal 50b of the voltage divider circuit 50 is grounded.

Please refer to FIG. 5 again, which is the timing diagram of the output voltage Vout of the output terminal 10b of the voltage pump 10 of the present invention, the voltage pump 10, and the clock generator 20. As shown in the figure, the time intervals can be divided into It is the Ti interval (starting interval), the Ta interval, and the Tb interval; first, it is the Ti interval and the Ta interval. When the circuit is started, the clock generator 20 will drive the voltage pump 10 to continuously pressurize to increase the voltage of the voltage pump 10. The output voltage Vout of the output terminal 10b of the output terminal 10b, and the output voltage Vout of the output terminal 10b passes through the voltage divider circuit 50 to generate a first return voltage Vrefl at the first connection point A, and generates a second return voltage Vrefl at the second connection point B. The relationship between the return voltage Vref2, the first return voltage Vref1, the second return voltage Vref2, the output voltage Vout of the output terminal 10b, the first resistor Ra, the second resistor Rb and the third resistor Rc is as follows :

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="V\; ref"\; filenames="C20051006315600121.png"\; state="\{\{state\}\}">V</figure-callout></span><figure-callout\; id="1"\; label="V\; ref"\; filenames="C20051006315600121.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="ref"\; filenames="C20051006315600121.png,C20051006315600131.png"\; state="\{\{state\}\}">ref</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}<span\; class="notranslate">\; )</span>$

At first, the multiplexer 40 selects the second input terminal 40a2 as a path, so that the second return voltage Vref2 is continuously returned to the comparator 30 until the second return voltage Vref2 is higher than the reference voltage Vref , that is, use the comparator 30 to generate a signal to close the clock generator 20, and then stop the action of the voltage pump 10, and the comparator 30 simultaneously generates a signal to change the path of the multiplexer 40 to select the first input terminal 40a1 is a path, at this time, the input terminal 30a of the comparator 30 is changed to input the first return voltage Vref1, but since the second return voltage Vref2 is smaller than the first return voltage Vref1 at this time, when the multi-channel When the converter 40 selects the first input terminal 40a1 as a path instead, the state of the comparator 30 will not be changed to generate a clock signal.

Then there is the interval Tb, the output voltage Vout of the output terminal 10b of the voltage pump 10 will be consumed by the load (not shown in the figure) and will continue to decrease with time, and the corresponding first return voltage Vref1 will also continue to decrease until When the first return voltage Vref1 is lower than the reference voltage Vref, the comparator 30 will generate a signal to start the clock generator 20 to drive the voltage pump 10 to perform pressurization, and at the same time change the multiplexer 40 path, so that it selects the second input terminal 40a2 as the path, and at this time, the second return voltage Vref2 is smaller than the first return voltage Vref1, and at this time, the multiplexer 40 is changed to select the first input terminal 40a2 is a path, which does not change the state of the comparator 30; as mentioned above, the Ta interval and the Tb interval will repeat continuously, that is, a cyclic operation is formed. And the output voltage Vout of the output terminal of the voltage pump 10 can be kept at

$\left(\frac{R_a+R_b+R_C}{R_b+R_C}\right)V_{\mathrm{ref}}\&le;V_{\mathrm{out}}\&le;\left(\frac{R_a+R_b+R_c}{R_b}\right)V_{\mathrm{ref}}$ between,

Therefore, as long as the reference voltage Vref, the first resistor Ra, the second resistor Rb, or the third resistor Rc are programmed, the output voltage Vout of the output terminal 10b of the voltage pump 10 can be controlled for the load (not shown in the figure). shown) use.

In addition, as shown in FIG. 6 and FIG. 7, both the aforementioned first embodiment and the second embodiment can be equipped with a regulator circuit 60 (regulator) behind the output terminal 10b of the voltage pump 10, and the regulator circuit 60 It is composed of a comparator, a transistor Q, and resistors R1 and R2. It can finally stabilize and step down the output voltage Vout by adjusting the size of the resistors R1 and R2. It can provide a load (not shown in the figure) More stable voltage supply; and the first resistor Ra, the second resistor Rb, and the third resistor Rc in the second embodiment can be made of programmable adjustable variable resistors using semiconductors, thereby adjusting the third resistor Rc, That is, the oscillation amplitude of the output voltage Vout of the output terminal 10b of the voltage pump 10 can be adjusted, and the output voltage Vout of the output terminal 10b of the voltage pump 10 can be changed by adjusting the first resistor Ra and the second resistor Rb, so that Meet the needs of different loads, and meet the needs of program-controlled adjustment.

As mentioned above, the present invention can double the voltage to provide the required output voltage for the load without going through the step-down procedure, thereby reducing unnecessary energy loss, and it can program change the resistance value of the variable resistor, to change the output voltage.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (4)

1. the multiple circuit of a program-controlled adjustment output voltage is characterized in that comprising:

Voltage pump (10) has an input (10a), a control end (10c) and an output (10b);

Clock generator (20) is connected with the control end (10c) of described voltage pump (10), and its clocking is to control the action of described voltage pump (10);

Comparator (30), described comparator (30) has two inputs (30a) and an output (30b), the output (30b) of described comparator (30) is connected with described clock generator (20), an input (30a) input reference voltage (Vref) of described comparator (30);

Multiplexer (40), described multiplexer (40) have an output (40b), a selecting side (40c), a first input end (40a1), with one second input (40a2), the output (40b) of described multiplexer (40) is connected with another input (30a) of described comparator (30), and the selecting side (40c) of described multiplexer (40) is connected with the output (30b) of described comparator (30);

Bleeder circuit (50), have an input (50a) and an output (50b), its input (50a) is connected with one first resistance (Ra) in regular turn to output (50b), one first tie point (A), one the 3rd resistance (Rc), one second tie point (B), with one second resistance (Rb), the input (50a) of described bleeder circuit (50) is connected with the output (10b) of described voltage pump (10), described first tie point (A) is connected with the first input end (40a1) of described multiplexer (40), described second tie point (B) is connected with second input (40a2) of described multiplexer (40), and the output (50b) of described bleeder circuit (50) is ground connection then.

2. multiple circuit according to claim 1 is characterized in that, the output (10b) of described voltage pump (10) also connects a voltage stabilizing circuit (60).

3. multiple circuit according to claim 1 is characterized in that, described the 3rd resistance (Rc) is the variable resistor of program-controlled adjustment.

4. multiple circuit according to claim 1 is characterized in that, described first resistance (Ra) is the variable resistor of program-controlled adjustment with described second resistance (Rb).

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