CN100379138C - A control method and device for a series resonant converter - Google Patents

Abstract

The invention discloses a control method and device for a series resonant converter, wherein the method is as follows: sampling a feedback signal from a load circuit and providing it to a processor; processing the feedback signal by the processor and judging to adopt a frequency modulation control method according to the processed result The phase-shift control method is still used; if the phase-shift control method is used to process the feedback signal, the phase-shift pulse width modulation signal is generated as the driving pulse according to the processed result; if the frequency modulation control method is used, the frequency modulation pulse is generated according to the processed result The wide modulation signal is used as a driving pulse; the driving circuit generates a corresponding control signal according to the received driving pulse and outputs it to the series resonant circuit.

Description

A control method and device for a series resonant converter

technical field

The invention relates to DC power conversion technology, in particular to a control method and device for a series resonant converter.

Background technique

The inductance-inductance-capacitance (LLC) series resonant circuit is a circuit that has recently attracted the attention and research of the industry. It is relatively mature in theory, and has some obvious advantages compared with the phase-shifted full bridge in industrial applications: The side diode is naturally turned off, eliminating the voltage spike and turn-off loss of the secondary side; the ZVS turn-on and turn-off of the MOS tube can be realized within the variable frequency range; the high operating frequency of the circuit can reduce the size and cost of the module; the original The side current is a sine wave, and the conduction and radiation are small. However, there is a prominent problem in the application of the LLC series resonant circuit: when working at a light load (load below 2A), the frequency rises too high, which will affect the stability of the circuit, and the working state of the circuit cannot better meet the LLC series resonant principle. Therefore, simple frequency modulation control cannot meet the requirements of output voltage regulation at light load and no load. Although the light load problem can be solved to a certain extent by adding a dead load at the output end, it will greatly increase the loss.

Contents of the invention

The purpose of the present invention is to provide a control method and device for a series resonant converter, so as to solve the problem that only the frequency modulation control method in the prior art cannot satisfy the requirement of output voltage stabilization.

Realize the technical scheme of the present invention:

A control method for a series resonant converter, the converter includes a drive circuit and a series resonant circuit, the drive circuit generates a control signal according to received drive pulses, the control signal controls the series resonant circuit to provide power to a load and makes the series resonant circuit The output voltage remains stable; the method comprises the steps of:

A. Sampling the feedback signal from the load circuit and providing it to the processor;

B. The processor processes the feedback signal, and compares the processing result with a reference value to determine whether to use a frequency modulation control method or a phase shift control method to control the series resonant circuit;

C. If the phase-shift control method is adopted, determine the period value corresponding to the switching frequency of the series resonant circuit when it is a fixed frequency, and calculate the comparison value for determining the phase-shift duty ratio according to the processing results at the same time, and continue to step D; if frequency modulation is adopted Control mode, then calculate and determine the periodic value of series resonant circuit switching frequency and the comparative value of determining phase-shift duty cycle according to described processing result, continue step E;

D. The processor generates a phase-shifted pulse width modulation signal as a driving pulse according to the comparison value and the period value, and continues to step F;

E. The processor generates a frequency-modulated pulse width modulation signal as a driving pulse according to the calculated period value and comparison value;

F. The driving circuit generates a corresponding control signal according to the received driving pulse and outputs it to the series resonant circuit.

in:

The feedback signal is a feedback voltage, and processing the feedback voltage by the processor in step B includes the steps of: subtracting the digital value of the feedback voltage from a given value; performing a proportional-integral operation on the result of the subtraction to obtain a processing result.

The feedback signal is a feedback voltage and a feedback current, and the processing of the feedback voltage and the feedback current by the processor in step B includes the steps of: respectively subtracting the digital values of the feedback voltage and the feedback current from the corresponding given values; Perform proportional-integral calculation on the result; judge the size of the voltage proportional-integral calculation result and the current proportional-integral calculation result, if the voltage proportional-integral calculation result is smaller than the current proportional-integral calculation result, then perform voltage stabilization control on the series resonant circuit, And the voltage proportional-integral operation result is taken as the processing result, otherwise, the current limiting control is performed on the series resonant circuit, and the current proportional-integral operation result is taken as the processing result.

When the phase-shift control mode is adopted, the value of the fixed frequency can make the switching frequency of the series resonant circuit fixed at the maximum frequency.

When the frequency modulation control mode is adopted, the value of the comparison value is half of the period value.

Step B and Step C are executed when the processor responds to the first interrupt request with a fixed interrupt frequency; Step D and Step E are executed when the processor responds to the second interrupt request whose interrupt frequency is consistent with the operating frequency range of the series resonant circuit For selective execution, the priority of the second interrupt request is higher than that of the first interrupt request.

Step C also includes the steps of: respectively storing the comparison value and the period value into the first-level cache unit corresponding to the comparison register and the period register to be processed, and prohibiting interruption; respectively assigning the value of the first-level cache unit to the corresponding second-level cache unit, And open interrupts.

Step D or step E comprises the steps of:

a. Determine the interrupt source of the second interrupt, if it is a periodic interrupt, proceed to step b, otherwise proceed to step d;

b. assigning the values of the second-level cache units corresponding to the comparison register and the period register of the processor to the corresponding third-level cache units;

C, assign the value of described three-level cache unit to the period register and compare register of processor respectively, go to step e;

d. Assign the resultant value obtained by subtracting the value of the third-level cache unit of the period register from the value of the third-level cache unit of the comparison register to the comparison register;

e. The processor outputs a pulse width modulation signal for phase shift control or frequency modulation control according to the values of the comparison register and the period register.

A series resonant converter, comprising a drive circuit and a series resonant circuit, the drive circuit outputs a control signal to the series resonant circuit according to the received drive pulse, and the series resonant circuit provides the transformed power to the load under the control of the control signal circuit; the converter also includes:

The sampling circuit obtains the feedback signal from the load circuit;

a processor, receiving a feedback signal from the sampling circuit, generating a pulse width modulation signal for performing frequency modulation control and phase shift control on the series resonant circuit according to the feedback signal, and outputting the pulse width modulation signal as a driving pulse to the driving circuit .

The sampling circuit is a voltage sampling circuit, or a voltage sampling circuit and a current sampling circuit.

The present invention can realize frequency modulation and phase-shifting two control methods. When the operating frequency of the power supply is low, frequency conversion control is adopted, and when the operating frequency of the power supply is too high, the phase-shifting control method is adopted. Therefore, the operating frequency of the series resonant circuit under light load and no load The requirement for voltage stabilization can be met without being too high, which solves the problem of excessive circuit loss in this case in the prior art.

Description of drawings

Fig. 1 is the block diagram of the circuit principle of embodiment one;

Fig. 2A is the block diagram of the control principle of the LLC series resonant circuit adopting frequency modulation + phase shift control in the embodiment;

Fig. 2B is a schematic diagram of a control strategy of the frequency modulation + phase shift control method;

Fig. 3 is the flowchart of the first interrupt service routine;

Fig. 4 is the flowchart of the second interrupt service routine;

Fig. 5 is a schematic diagram of a frequency modulation PWM signal;

6 is a schematic diagram of a phase-shifted PWM signal;

Fig. 7 is the schematic circuit diagram of embodiment two;

Fig. 8 is the control principle block diagram of the LLC series resonant circuit adopting frequency modulation+phase-shift control in the embodiment;

FIG. 9 is a flow chart of the first interrupt service routine in the second embodiment.

Detailed ways

Embodiment one

In this embodiment, the feedback signal is taken as an example for illustration.

The invention adopts a digital control method combining frequency modulation and phase shifting to solve the light load problem of LLC series resonance. The principle is: the circuit adopts frequency conversion control when the circuit is in normal operation, and adopts phase shifting control mode when the frequency is greater than a certain frequency.

Referring to Fig. 1, the series resonant converter of the present invention includes a drive circuit, a series resonant circuit, a sampling circuit and a processor. The drive circuit outputs a control signal to the series resonant circuit according to the received drive pulse, and the series resonant circuit provides the converted power supply to the load circuit under the control of the control signal; the sampling circuit obtains the feedback voltage from the load circuit and provides it to the processor for processing The converter generates a frequency modulated pulse width modulated signal or a phase shifted pulse width modulated signal according to the feedback voltage and outputs it to the driving pulse circuit.

The processor adopts a digital signal processor (DSP), and the DSP can easily generate a pulse width modulation (PWM) signal with frequency or phase change by refreshing the values of the period register and the comparison register in real time. That is, the DSP timer automatically counts according to the initialization settings. When the value of the counting register is equal to the value of the comparison register, a comparison match is generated, and the output pulse changes from high to low, thereby generating a corresponding frequency modulation pulse width modulation signal or phase shift pulse. Wide modulation signal; when the count of the count register reaches 0, an underflow interrupt is generated, and at this time, the DSP automatically reloads the period register and the compare register.

As shown in Figure 2A, the output voltage of the series resonant circuit is provided to the DSP after being sampled by the sampler. If the voltage provided to the DSP is an analog voltage, the DSP needs to perform analog/digital conversion on it; If the number is converted, the DSP does not perform this step any more. The DSP subtracts the feedback voltage from a predetermined value, and performs a proportional integral (PI) operation on the result of the subtraction, and judges whether to perform phase shift control or frequency modulation control according to the output value after the PI operation. If the phase shift adjustment is performed, the control signal flow enters the dotted line in the figure, otherwise, the frequency modulation control is performed. The phase-shift PWM signal generator generates PWM signals according to the principle of full-bridge phase-shift control, and the frequency-modulated PWM signal generator generates PWM signals according to the principle of frequency-modulation control. The PWM signal is amplified by the drive circuit to drive the series resonant circuit.

Referring to Figure 2B, in this embodiment, the working principle of the frequency conversion + phase shift control method is:

1. When the load is heavy (greater than about 2V), the frequency modulation control method is adopted, and when the load is light (less than about 2V), the phase shift control method is adopted. The cut-off point of frequency modulation and phase shifting is judged according to the output result of linear proportional-integral (PI) controller. When it is greater than a certain value, the frequency modulation control method is adopted, and when it is smaller than the value, the phase shift control method is adopted.

2. In the frequency modulation control mode, the switching frequency changes within a certain range, and the switching frequency increases as the load decreases. The switching frequency varies with the output of the linear proportional-integral (PI) controller, which is controlled by a simple linear relationship between the output of the linear proportional-integral (PI) controller and the frequency. During frequency modulation, the phase-shift duty cycle is always the maximum output.

3. In the phase-shift control mode, the switching frequency is fixed at the maximum frequency, and the phase-shift angle changes in a full range between the maximum output and the minimum output. The lower the output voltage, the lighter the load, and the smaller the phase-shift duty cycle D. Until it reaches 0, so as to realize light load and no-load regulation.

In Figure 2B, the output limit of the linear proportional-integral (PI) controller is between 0 and 5V, and the magnitude of the PI output is used as the judgment basis for phase shift or frequency modulation in control. In this example, when the PI output is 2V, it is used as the shift The dividing point of phase and frequency modulation. When the PI output is 0~2V, the phase shift control method is adopted, and the frequency is fixed at 300K; when the PI output is 2~5V, the frequency modulation control method is adopted, and the relationship between the frequency and the PI output is determined according to the linear relationship shown in the figure. The limiting point of PI output, the demarcation point of phase shift and frequency modulation, the range of frequency change, etc. can be determined according to the specific implementation situation.

In this embodiment, the frequency modulation control signal and the phase shift control signal are implemented in the following manner:

(1) Two levels of nested interrupts are adopted, the first interrupt is an auxiliary PWM timing interrupt, and the interrupt frequency is fixed. The second interrupt is the main PWM interrupt (PWM cycle interrupt), the interrupt frequency is consistent with the operating frequency range of the LLC series resonant circuit, and the priority of the second interrupt is higher than that of the first interrupt. The task of the first interrupt service routine is to complete the functions of sampling, subtraction, linear proportional integral (PI), control mode judgment, calculation of phase shift and frequency modulation PWM signal generator required period register and the value of comparison register. The task of the second interrupt program is to assign the values of the period register and the comparison register calculated in the first interrupt service program to the period register and the comparison register respectively.

(2) The three-level data cache unit corresponding to the period register and the comparison register should be defined in advance in the software to ensure the synchronous refresh of the period register and the comparison register.

(3) In the first interrupt service routine, real-time refreshing is performed on the first-level cache unit corresponding to the period register and the comparison register. After executing the operation of refreshing the first-level cache unit, disable the interrupt, transfer the values of the first-level cache unit to the second-level cache unit, and then enable the interrupt.

(4) The second interrupt service program first transfers the value of the secondary cache unit to the third-level cache unit, and then assigns the value of the third-level cache unit to the period register and the comparison register.

(5) In the interrupt program caused by the arrival of the PWM underflow interrupt, the value of the third-level buffer unit of the period register minus the value of the third-level buffer unit of the comparison register is assigned to the comparison register to ensure a 50% duty cycle pulse output.

Referring to shown in Figure 3, the processing flow of the first interrupt service routine is as follows:

Step 10: Sampling the feedback voltage;

Step 20: Comparing the feedback voltage with a given value to calculate the voltage error. The given value is the A/D sampling value of the value that the output voltage needs to be stable;

Step 30: Perform a proportional integral operation on the error voltage in step 20 to obtain a PI value;

Step 40: judging whether the PI value is greater than 2V, if so, proceed to step 60, otherwise proceed to step 50;

Step 50: Adopting the phase-shift control method, calculating a comparison value for determining the phase-shift duty cycle according to the PI value, and assigning the comparison value and a fixed cycle value for determining the switching frequency to the first-level buffer unit respectively, and continuing to step 70;

Step 60: Using the frequency modulation control method, calculate the period value for determining the switching frequency of the series resonant circuit and the comparison value for determining the phase-shift duty cycle according to the PI value, calculate the period and the value of the comparison register, and assign the results to the first-level cache unit ;

Step 70: disable interruption;

Step 80: transfer the value of the level-1 cache unit to the level-2 cache unit;

Step 90: Open interrupt and return.

Step 50 includes the following steps:

A. Assign a value to the first-level cache unit of the comparison register corresponding to the fixed bridge arm, and the value is fixed. Fix the bridge arm to the leftmost in the design, so that the values of DSP underflow matching and cycle matching are close to the underflow point and cycle point.

In the phase-shift control mode, the period register is a fixed value, and the fixed value is the period value corresponding to the maximum frequency point of frequency change. In order to make the output voltage reach the maximum adjustable range, the leading bridge arm of the phase-shifted full bridge (see "Soft Switching Technology of Pulse Width Modulation DC/DC Full Bridge Converter)", Science Press, Ruan Xinbo, Yan Yangguang, 1999 ) as a fixed bridge arm, that is, the control signals PWM3 and PWM4 that control the bridge arm are fixed so that the comparison value of the processor at the rising edge and the comparison value at the falling edge are fixed, and the signal of the rising edge is always on the far left. Then the comparison value of the rising edge should be 1, (if it is not set to 1, it is also possible, but the range of the output voltage will become smaller) In order to generate a full-bridge phase-shift driving signal with a 50% duty cycle, the comparison value of the falling edge should be The value of the period register is decremented by 1. The value 1 is used as the compare value of compare register 1. The lagging bridge arm of the phase-shifted full bridge is used as a moving bridge arm, that is, the control signals PWM1 and PWM2 controlling the bridge arm change according to the change of the output phase-shifting angle.

B. Multiply the result of the proportional-integral operation by a coefficient to obtain the output phase-shift angle of the pulse width modulation. The coefficient is obtained by dividing the maximum output phase-shift angle by the maximum limit value of the proportional-integral operation.

C. According to the relationship shown in FIG. 5 and FIG. 6, calculate the comparison value of the comparison register corresponding to the PWM signal of the moving arm, and assign it to the corresponding first-level buffer unit.

Figure 5 shows the control signals of the two diagonal switching tubes in the frequency modulation mode. In the frequency modulation mode, the diagonally diagonal two switch tubes are turned on and off at the same time. In order to make frequency modulation control and phase shift control consistent in the critical state, even if the control signal under the frequency modulation control mode is consistent with the control signal at the maximum output under the phase shift control mode, it is necessary to compare register 1 and compare register 2 on the rising edge The comparison value is set to 1. This value is the compare value of the compare register.

As shown in Figure 6, the phase-shifting mode is used to control the control signals of the two diagonal switching tubes. Among them, PWM4 is the control signal of the upper tube of the fixed bridge arm, and the signal of its rising edge is always on the far left, and PWM1 is the lower tube of the moving bridge arm. The control signal, as the output phase shift angle decreases, PWM1 moves from right to left, and the output voltage gradually increases.

D. Assign a fixed period value to the first-level cache unit of the period register, which is fixed to the count value corresponding to the highest frequency.

Step 60 includes the following steps:

A. Convert the output of the linear proportional-integral (PI) controller into the period value of the period register according to the linear relationship between the output of the linear proportional-integral (PI) controller and the interrupt frequency shown in Figure 2B, and store it in the first-level cache unit.

B. Divide the value of the period register by 2 to obtain the value of the compare register, and store it in the first-level cache unit.

In the frequency modulation mode, the power output of the tube drive signal maintains the maximum output, so the two comparison registers are assigned the same value. In order to ensure a smooth transition process between the phase-shifted PWM signal and the frequency-modulated PWM signal, the value of the compare register needs to be close to the underflow point and the period point during underflow matching and period matching.

Referring to shown in Figure 4, the processing flow of the second interrupt service routine is as follows:

Step 100: judge whether it is a periodic interrupt or an underflow interrupt, if it is a periodic interrupt, proceed to step 110, otherwise proceed to step 130;

Step 110: transfer the value of the second-level cache unit to the third-level cache unit;

Step 120: Assign the value of the L3 cache unit to the period register and the compare register, and return;

Step 130: Assign the value obtained by subtracting the value of the L3 cache unit of the period register to the L3 cache unit of the compare register into the compare register, and return.

Since digital control does not have problems such as temperature drift in analog circuits and circuit aging caused by time, it has obvious advantages compared with analog circuits in realizing frequency modulation control.

Embodiment two

This embodiment is described by taking the feedback signal as an example of a voltage signal and a current signal.

Referring to Fig. 7, the converter of this embodiment has a feedback current loop added to the converter of the first embodiment. The feedback voltage loop and the feedback current loop work in parallel, the voltage loop acts as a regulator, and the current loop acts as a current limiter. The relationship between the voltage loop and the current loop can also be a serial inner and outer loop relationship.

As shown in Figure 8, the output voltage and current of the series resonant circuit are provided to the DSP after being sampled by the sampler. If the value provided to the DSP is an analog value, the DSP needs to perform analog/digital conversion on it; if it has been provided to the DSP before For analog/digital conversion, the DSP no longer performs this step. The DSP subtracts the feedback voltage and current from predetermined values, respectively, and performs proportional-integral (PI) operations on the subtracted results. Comparing the size of the PI operation result, if the voltage value is less than the current value, the series resonant circuit is controlled for voltage stabilization, and according to the voltage value after the PI operation, it is judged whether to perform frequency modulation control or phase shift control for the series resonant circuit, and its implementation method and implementation Example 1 is exactly the same; otherwise, the current limiting control is performed on the series resonant circuit, and whether the current after the PI calculation is greater than the predetermined power supply value is used to judge whether the frequency modulation control or the phase shift control is performed on the series resonant circuit. same.

When the voltage loop plays a regulating role, the current loop is in a saturated state, and the output voltage value is stable at this time; when the current loop works, the output of the voltage loop is saturated, and the output current is limited to a certain value, so the main function of the current loop is to limit the current.

In this embodiment, the frequency modulation control signal and the phase shift control signal adopt the same method as that in Embodiment 1, that is, two levels of nested interrupts are used. Referring to shown in Figure 8, the processing procedure of the first interrupt service routine is as follows:

Step 200: Obtain the feedback voltage;

Step 210: Comparing the feedback voltage with a given value to calculate the voltage error;

Step 220: Perform a proportional integral operation on the error voltage in step 210 to obtain the PI value of the voltage;

Step 230: Obtain the feedback current;

Step 240: Comparing the feedback current with a given value to calculate the voltage error;

Step 250: Perform a proportional integral operation on the error current in step 240 to obtain the PI value of the current;

Step 260: compare the PI value of the voltage and the PI value of the current, if the PI value of the voltage is smaller than the PI value of the current, then select the PI value of the voltage as the basis for frequency modulation and phase shift control, otherwise select the PI value of the current as the basis for frequency modulation and phase shift control Basis for phase control;

Step 270: judging whether the PI value is greater than a predetermined value, if yes, proceed to step 290, otherwise proceed to step 280;

Step 280: Using the phase-shift control method, calculate the comparison value for determining the phase-shift duty cycle according to the PI value, assign the comparison value and a fixed cycle value for determining the switching frequency to the first-level buffer unit, and assign the results to the For the first-level cache unit, continue to step 300;

Step 290: Using the frequency modulation control method, calculate the period value for determining the switching frequency of the series resonant circuit and the comparison value for determining the phase-shift duty cycle according to the PI value, calculate the period and the value of the comparison register, and assign the results to the first-level cache unit ;

Step 300: Disable interruption;

Step 310: transfer the value of the level-1 cache unit to the level-2 cache unit;

Step 320: Open interrupt and return.

Wherein, for the specific calculation process of step 280 and step 290, please refer to the corresponding part of the embodiment.

The processing procedure of the second interrupt service routine is the same as that of the first embodiment.

The above embodiments are used to illustrate the best implementation of the present invention, but the present invention is not limited thereto. Changes made by those skilled in the art according to the above solutions will not deviate from the spirit of the present invention to control the series resonant circuit by adopting a digital control method of frequency conversion + phase shifting.

Claims (10)

1. A control method for a series resonant converter, the converter comprising a drive circuit and a series resonant circuit, the drive circuit generates a control signal according to received drive pulses, the control signal controls the series resonant circuit to provide power to the load and makes the series resonant The output voltage of the circuit is kept stable; it is characterized in that the method comprises the steps of: A. Sampling the feedback signal from the load circuit and providing it to the processor; B. The processor processes the feedback signal, and compares the processing result with a reference value to determine whether to use a frequency modulation control method or a phase shift control method to control the series resonant circuit; C. If the phase-shift control method is adopted, determine the corresponding period value when the resonant circuit switching frequency is a fixed frequency, and at the same time calculate the comparison value for determining the phase-shift duty ratio according to the processing results, and continue to step D; if frequency modulation control is adopted mode, then calculate the cycle value for determining the switching frequency of the series resonant circuit and the comparison value for determining the phase-shift duty cycle according to the processing results, and continue to step E; D. The processor generates a phase-shifted pulse width modulation signal as a driving pulse according to the comparison value and the period value, and continues to step F; E. The processor generates a frequency-modulated pulse width modulation signal as a driving pulse according to the calculated period value and comparison value; F. The driving circuit generates a corresponding control signal according to the received driving pulse and outputs it to the series resonant circuit. 2. The method according to claim 1, wherein the feedback signal is a feedback voltage, and the processing of the feedback voltage by the processor in step B comprises the steps of: Subtract the digital value of the feedback voltage from the given value; Proportional-integral operation is performed on the result of the subtraction operation to obtain the processing result. 3. The method according to claim 1, wherein the feedback signal is a feedback voltage and a feedback current, and the processing of the feedback voltage and the feedback current by the processor in step B comprises the steps of: Subtract the digital values of the feedback voltage and feedback current from the corresponding given values respectively; Proportional-integral operations are performed on the results of the subtraction operations respectively; Judging the magnitude of the voltage proportional-integral calculation result and the current proportional-integral calculation result, if the voltage proportional-integral calculation result is smaller than the current proportional-integral calculation result, the series resonant circuit is stabilized and controlled, and the voltage proportional-integral calculation result is As a processing result, otherwise, the current limiting control is performed on the series resonant circuit, and the current proportional-integral operation result is used as the processing result. 4. The method according to claim 1, wherein when the phase-shift control mode is adopted, the value of the fixed frequency value can make the switching frequency of the series resonant circuit fixed at the maximum frequency. 5. The method according to claim 1, wherein when the frequency modulation control mode is adopted, the value of the comparison value is half of the period value. 6. The method according to any one of claims 1 to 5, wherein step B and step C are executed when the processor responds to the first interrupt request with a fixed interrupt frequency; step D and step E are executed when the processor responds to the interrupt A second interrupt request whose frequency is consistent with the variation range of the operating frequency of the series resonant circuit is selectively executed, and the priority of the second interrupt request is higher than that of the first interrupt request. 7. method as claimed in claim 6 is characterized in that, after determining described comparative value, period value in step C, also comprise the step: Store the comparison value and the period value into the first-level cache unit corresponding to the comparison register and the period register respectively, and disable the interrupt; Assign the value of the first-level cache unit to the corresponding second-level cache unit, and open the interrupt. 8. The method of claim 7, wherein step D or step E comprises the steps of: a. Determine the interrupt source of the second interrupt, if it is a periodic interrupt, then proceed to step b, if it is an underflow interrupt, proceed to step d; b. assigning the values of the second-level cache units corresponding to the comparison register and the period register of the processor to the corresponding third-level cache units; C, assign the value of described three-level cache unit to the period register and compare register of processor respectively, go to step e; d. Assign the resultant value obtained by subtracting the value of the third-level cache unit of the period register from the value of the third-level cache unit of the comparison register to the comparison register; e. The processor outputs a pulse width modulation signal for phase shift control or frequency modulation control according to the values of the comparison register and the period register. 9. A series resonant converter, comprising a drive circuit and a series resonant circuit, the drive circuit outputs a control signal to the series resonant circuit according to the received drive pulse, and the series resonant circuit provides the transformed power supply under the control of the control signal To the load circuit; it is characterized in that the converter also includes: The sampling circuit obtains the feedback signal from the load circuit; a processor, receiving a feedback signal from the sampling circuit, generating a pulse width modulation signal for performing frequency modulation control and phase shift control on the series resonant circuit according to the feedback signal, and outputting the pulse width modulation signal as a driving pulse to the driving circuit . 10. The method according to claim 9, wherein the sampling circuit is a voltage sampling circuit, or a voltage sampling circuit and a current sampling circuit.

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