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CN100371851C - Time synchronizing method and device - Google Patents

Time synchronizing method and device Download PDF

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Publication number
CN100371851C
CN100371851C CNB2006101453790A CN200610145379A CN100371851C CN 100371851 C CN100371851 C CN 100371851C CN B2006101453790 A CNB2006101453790 A CN B2006101453790A CN 200610145379 A CN200610145379 A CN 200610145379A CN 100371851 C CN100371851 C CN 100371851C
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system time
time
memory module
master cpu
clock source
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CN1949129A (en
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郭昕
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New H3C Information Technologies Co Ltd
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Hangzhou H3C Technologies Co Ltd
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Abstract

The invention relates to time synchronization method. It includes the following steps: main control CPU accumulates system time according to timer interruption to gain current system time; and it writes the current system time into system time memory module; non main control CPU core acquires the system time request, reads the current system time from the system time memory module. The invention also relates to time synchronization device used in multi-core CPU system, includes main control CPU core, one or many non main control CUP cores and system time memory module. Thus it can make the non main control CPU core share the current system time, not need to interrupt timer to synchronize system time to ensure system time synchronization, but only need main control CPU to response timer interruption, reduce non main control CPU interruption spending to increase system performance.

Description

Method for synchronizing time and device
Technical field
The present invention relates to system time simultaneous techniques in the communication facilities, method for synchronizing time in especially a kind of communication facilities, and time synchronism apparatus.
Background technology
For various communication facilitiess or the computer equipment in the communication network, the system time of device interior as important parameter need with Coordinated Universal Time(UTC) (Universal Time Coordinated, be called for short UTC) keep synchronous as much as possible, time deviation is limited in the enough little scope (as 100ms) usually.In order to guarantee that time synchronized can finish smoothly, each nodal clock in the Time Synchronization Network all needs to utilize special-purpose network time synchronization technology and UTC synchronous.In the internet, generally adopt NTP (Network Time Protocol) (Network Time Protocol, be called for short NTP) as the time synchronization protocol of the system time of various communication facilitiess in the internet, the distance dependent between the order of accuarcy of time synchronized and ntp server and user.
Each parts for communication facilities inside, the synchronism that also needs the time that guarantees, in the communication facilities that adopts multi-core CPU, each CPU in the multi-core CPU can move independently task, can adopt pipeline system or parallel processing mode on message is handled.As shown in Figure 1, handle synoptic diagram for the message that adopts pipeline system in the multi-core CPU, under pipeline system, each CPU finishes the part that message is handled.As shown in Figure 2, handle synoptic diagram for the message that adopts the parallel processing mode in the multi-core CPU, under the parallel processing mode, each CPU can independently finish whole processing of message.The mode that no matter adopts streamline still is the mode of parallel processing, and time synchronized is the prerequisite of correctly managing business in some cases between the multi-core CPU.
In the prior art about the time between many CPU synchronously in the following ways: the timer that utilizes an outside sends timer to each CPU nuclear simultaneously according to the cycle and interrupts, so-called outside timer is a kind ofly can send the equipment that timer interrupts according to certain cycle, and each CPU nuclear can obtain identical system time initial value when powering on, interrupt adding up according to the timer that receives again, obtaining current system time, thus guaranteed time between each CPU synchronously.This method of synchronization can guarantee the time synchronized between each CPU nuclear, but this timer needing to interrupt each CPU nuclear all to respond, thereby makes the expense of each CPU become big, causes the entire process performance of system to be a greater impact.
Summary of the invention
The objective of the invention is in the existing multi-core CPU during time synchronized timer interrupt defectives such as influence to system performance, a kind of method for synchronizing time is proposed, can guarantee the system time unanimity in the multi-core CPU, and do not need each CPU nuclear all to handle timer and interrupt, to reduce the influence of timer interruption to the handling property of system.
Another object of the present invention is a kind of time synchronism apparatus of proposition, can guarantee the system time unanimity in the multi-core CPU, and does not need each CPU nuclear all to handle the timer interruption, to reduce the influence of timer interruption to the handling property of system.
For achieving the above object, the invention provides a kind of method for synchronizing time, may further comprise the steps:
Step 1, the timer that master cpu nuclear sends according to timer internal interrupts the system time of storing in the system time memory module is added up, to obtain current system time;
Step 2, master cpu are examined described current system time writing system time memory module;
Step 3 when non-master cpu nuclear is received the request of obtaining system time, reads described current system time from described system time memory module.
In technique scheme, before the described step 1, master cpu nuclear reads the system time initial value of preserving in the clock source from the clock source when power-up initializing.When adopting the hardware real-time clock as the clock source, because coded system and operating system in the hardware real-time clock are distinguished to some extent, for example the hardware real-time clock adopts the BCD coding, and operating system adopts BIN (scale-of-two) coding, therefore need carry out format conversion.
Further, after the step 3, master cpu nuclear writes the clock source with described current system time before power down, and by described clock source described current system time is safeguarded.
Alternatively, step 2 is specially: described current system time is encapsulated as the software equipment that is stored in the system time memory module, and described master cpu is checked this software equipment and is carried out write operation.Employing can solve the problem of the region of memory separately of can not exchanging visits between multinuclear to the mode of software equipment read-write.
Further, step 3 is specially: when described non-master cpu nuclear is received the request of obtaining system time, this software equipment is carried out read operation.
For achieving the above object, the invention provides a kind of time synchronism apparatus, this time synchronism apparatus is used for the multi-core CPU system, and the system time memory module that it comprises master cpu nuclear, or several non-master cpus nuclears and is used for the storage system time comprises in this master cpu nuclear:
Timer internal is used for sending timer according to the cycle and interrupts;
Accumulator module, link to each other with the system time memory module with described timer internal, be used to receive the timer interruption that described timer internal sends, the system time that the system time memory module is stored adds up, obtain current system time, and writing system time memory module;
The non-master cpus nuclear of this or several comprises:
Receive request module, be used to receive the request of obtaining system time;
The internal memory read module links to each other with the reception request module with described system time memory module, is used for reading described current system time according to the request of obtaining system time that receives the request module transmission from described system time memory module.
In technique scheme, can also comprise the clock source, link to each other with described accumulator module, be used to described master cpu nuclear that the system time initial value is provided.Described clock source can be the hardware real-time clock.
Based on above-mentioned technical scheme, the present invention has the following advantages: by the hardware resource of master cpu nuclear centralized management system Time Calculation, and with system time writing system time memory module, directly read when needed by other non-master cpu nuclears, so both can make non-master cpu nuclear energy enough share current system time, do not need again to utilize timer to interrupt the synchro system time, thereby when having guaranteed system time synchronous, only need master cpu response timer to interrupt, improved system performance with this.In realization with current system time as system time variable writing system time memory module, and be encapsulated as a software equipment, in software design with use and can utilize unified interface to operate.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Description of drawings
Fig. 1 adopts the message of pipeline system to handle synoptic diagram in the multi-core CPU.
Fig. 2 adopts the message of parallel processing mode to handle synoptic diagram in the multi-core CPU.
Fig. 3 is the structural representation of an embodiment of time synchronism apparatus of the present invention.
Fig. 4 is the structural representation of another embodiment of time synchronism apparatus of the present invention.
Fig. 5 is the schematic flow sheet of an embodiment of method for synchronizing time of the present invention.
Fig. 6 is the schematic flow sheet of another embodiment of method for synchronizing time of the present invention.
Fig. 7 is the schematic flow sheet of the another embodiment of method for synchronizing time of the present invention.
Fig. 8 is the structural representation of the system time synchro system of employing software clock mode.
Embodiment
In existing many CPU nuclear communication facilitiess, each CPU nuclear all needs to use timer internal to interrupt in maintenance and synchro system during the time, thereby influence system performance, the present invention adopts a kind of centralized Clock management, do not need each CPU nuclear all to go the maintenance system time, thereby both made CPU nuclear energy enough share current system time, improved system performance again.
As shown in Figure 3, be the structural representation of an embodiment of time synchronism apparatus of the present invention, in the present embodiment, the system time synchro system comprises master cpu nuclear 1, system time memory module 2 and other CPU nuclear 3.Wherein master cpu nuclear 1 can be done centralized management to system time, and other C PU nuclear 3 is non-master cpu nuclear, does not need system time is safeguarded, only just obtains when needs use.In this embodiment, be applicable to the situation of many CPU nuclear communication facilitiess for the veneer of power down seldom, when initially powering on, the system time initial value is provided or utilizes default device parameter for master cpu nuclear, realize the maintenance of system time again by master cpu nuclear 1 by external clock reference.So-called external clock reference can be software clock source or external clock reference (for example hardware RTC), and default device parameter can be written to the original equipment information of multi-core CPU for producer.If veneer needs frequent power down and powers on, that just needs to have adopted outside clock source.
In master cpu nuclear 1, comprise timer internal 11 and accumulator module 12, wherein accumulator module 12 can receive the timer interruption that timer internal 11 sent according to the cycle, and the system time in the system time memory module 2 added up, obtain current system time, write back system time memory module 2 then.The system time of being stored in the system time memory module 2 be pre-if receive on the basis of system time initial value of external clock reference, the timer that sends according to timer internal 12 interrupts constantly adding up and obtains.
Non-master cpu nuclear 3 comprises reception request module 31 and internal memory read module 32, when the reception request module 31 of upper procedure in non-master cpu nuclear 3 of operation on the non-master cpu nuclear 3 sent the request of obtaining system time, internal memory read module 32 can read current system time from system time memory module 2 according to the request of obtaining system time that receives request module 31 transmissions.
As shown in Figure 4, for the structural representation of another embodiment of time synchronism apparatus of the present invention, compare with a last embodiment, increased clock source 4, clock source 4 links to each other with the accumulator module 12 that master cpu is examined in 1, and it can be software clock source or hardware clock source (the hardware RTC) of outside.
Accumulator module 12 can be obtained system time as the system time initial value from clock source 2 when powering on, and the timer that sends according to timer internal 12 interrupts the system time initial value is added up, obtain current system time, then with current system time writing system time memory module 2.Accumulator module 12 also can write current system time clock source 2 before device looses power, and is kept by the 2 pairs of current system time in clock source.
Non-master cpu nuclear does not need to handle the signal to the clock source when operating system, only need just read current system time from predetermined region of memory and use for upper layer software (applications) when receive that upper layer software (applications) obtains the request of system time.
As shown in Figure 5, the schematic flow sheet for an embodiment of method for synchronizing time of the present invention may further comprise the steps:
Step 101, the timer that master cpu nuclear sends according to timer internal interrupts the system time of storing in the system time memory module is added up, to obtain current system time;
Step 102, master cpu are examined current system time writing system time memory module;
Step 103 when non-master cpu nuclear is received the request of obtaining system time, reads current system time from the system time memory module.
The timer of master cpu nuclear inside is as hardware resource in the present embodiment, comparing with the timer in the monokaryon CPU to have specific (special) requirements, regardless of the design of timer, timer only need interrupt getting final product at interval timer of master cpu according to Tick.Master cpu is endorsed to utilize this timer to interrupt beginning the time of carrying out from the system time initial value and is added up, to obtain current system time.
As shown in Figure 6, schematic flow sheet for another embodiment of method for synchronizing time of the present invention, present embodiment is described further to the system time initial value of a last embodiment, can also comprise step 100 before step 101, promptly master cpu nuclear reads the system time initial value of preserving in this clock source from the clock source when power-up initializing.When adopting the hardware real-time clock as the clock source, because coded system and operating system in the hardware real-time clock are distinguished to some extent, for example the hardware real-time clock adopts the BCD coding, and operating system adopts BIN (scale-of-two) coding, therefore need carry out format conversion, because format conversion has been the technology that one of ordinary skill in the art are easy to realize, just do not given unnecessary details here.
After step 3, master cpu nuclear can also be before power down writes current system time described clock source, and by the clock source described current system time is safeguarded, is read by master cpu nuclear when powering on for next time.
System time is actually a kind of variable that is stored in certain section memory address in the operating system process, this section memory address is the system time memory module 2 among Fig. 3, when utilizing the programming of higher level lanquage or assembly language to realize, the system time variable can be encapsulated as a software equipment, and the actual presumptive area that is taking in the internal memory of this software equipment, MEM address for example, in some communication apparatus based on multinuclear, the operated region of memory of each CPU nuclear is to distinguish mutually, by being packaged into the mode of software equipment, just can read and write, thereby operate the region of memory that other do not belong to this CPU nuclear this software equipment.
Provided the definition of this software equipment below with the C language:
struct?sys_time
{
Spinlock_t lock; //spinlock_t represents the spin lock in the software, is used for mutually exclusive operation;
int?time_ms;
int?time_sec;
int?time_min;
int?time_hour;
int?time_day;
int?time_month;
int?time_year;
int?time_weekday;
int?yearday;
Int time_isdst; //time_isdst represents " whether being daylight saving time ", is complementary with definition in the standard Linux;
}
Master cpu is checked this software equipment and is had access limit, is responsible for regularly upgrading current system time to software equipment; And other non-master cpu nuclear only has read right, only reading system time from this software equipment just in needs.
As shown in Figure 7, the schematic flow sheet for the another embodiment of method for synchronizing time of the present invention may further comprise the steps:
Step 101, the timer that master cpu nuclear sends according to timer internal interrupts the system time of storing in the system time memory module is added up, to obtain current system time;
Step 102 ', current system time is encapsulated as the software equipment that is stored in the system time memory module, master cpu is checked this software equipment and is carried out write operation;
Step 103 ', when non-master cpu nuclear is received the request of obtaining system time, this software equipment is carried out read operation.
Present embodiment also can add the step 100 among the embodiment before step 101, in step 103 ' add the step 104 among the last embodiment afterwards.
Wherein adopt the system time definition of C language description should be as the restriction of implementation, the way of realization of other the definition that can finish the system time variable also should be within coverage of the present invention.
Except carry out centralized management with master cpu nuclear, can also adopt the software clock mode to carry out the system time management, as shown in Figure 8, structural representation for the system time synchro system that adopts the software clock mode, each CPU nuclear and monokaryon CPU nuclear phase ratio, there is not special requirement, but a kind of software clock source 6 can be adopted in the clock source, total system is by 6 centralized management of software clock source, avoided the crystal oscillator of each CPU nuclear, the system time error that differences such as timer are brought, software clock source 6 obtains the system time initial value from hardware clock source (hardware RTC), and according to the hardware timer of outside the system time initial value is added up to obtain current system time.The time precision that requires according to upper layer software (applications) then, at software clock during in the software timing Event triggered, send the software clock signal by authorizing of cycle of software clock signal 5 (for example message, software pulse signal etc.), examine updating maintenance system time voluntarily by each CPU again to each CPU.Because it is more much smaller to the influence of system performance than handling in the timer that CPU checks the software clock Signal Processing, therefore can realize the synchronous of system time under the influence of very little system performance.
Should be noted that at last: above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit; Although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the field are to be understood that: still can make amendment or the part technical characterictic is equal to replacement the specific embodiment of the present invention; And not breaking away from the spirit of technical solution of the present invention, it all should be encompassed in the middle of the technical scheme scope that the present invention asks for protection.

Claims (9)

1. method for synchronizing time, it may further comprise the steps:
Step 1, the timer that master cpu nuclear sends according to timer internal interrupts the system time of storing in the system time memory module is added up, to obtain current system time;
Step 2, master cpu nuclear writes described system time memory module with described current system time;
Step 3 when non-master cpu nuclear is received the request of obtaining system time, reads described current system time from described system time memory module.
2. method for synchronizing time according to claim 1, before the wherein said step 1, master cpu is examined when power-up initializing, reads the system time initial value of preserving in the clock source from the clock source.
3. method for synchronizing time according to claim 2, wherein said master cpu nuclear reads the system time initial value of preserving in this clock source from the clock source and is specially when power-up initializing: master cpu nuclear reads the system time initial value of preserving in this clock source from the hardware real-time clock when power-up initializing, the row format of going forward side by side is changed.
4. method for synchronizing time according to claim 1, wherein after the step 3, master cpu nuclear writes the clock source with described current system time before power down, and by described clock source described current system time is safeguarded.
5. method for synchronizing time according to claim 1, wherein step 2 is specially: the variable of described current system time correspondence is encapsulated as the software equipment that is stored in the system time memory module, and described master cpu is checked this software equipment and is carried out write operation.
6. method for synchronizing time according to claim 5, wherein step 3 is specially: when described non-master cpu nuclear is received the request of obtaining system time, this software equipment is carried out read operation.
7. time synchronism apparatus, this time synchronism apparatus is used for the multi-core CPU system, and the system time memory module that it comprises master cpu nuclear, or several non-master cpus nuclears and is used for the storage system time comprises in this master cpu nuclear:
Timer internal is used for sending timer according to the cycle and interrupts;
Accumulator module, link to each other with the system time memory module with described timer internal, be used to receive the timer interruption that described timer internal sends, the system time that the system time memory module is stored adds up, obtain current system time, and writing system time memory module;
The non-master cpus nuclear of this or several comprises:
Receive request module, be used to receive the request of obtaining system time;
The internal memory read module links to each other with the reception request module with described system time memory module, is used for reading described current system time according to the request of obtaining system time that receives the request module transmission from described system time memory module.
8. time synchronism apparatus according to claim 7 wherein also comprises the clock source, links to each other with described accumulator module, is used to described master cpu nuclear that the system time initial value is provided.
9. time synchronism apparatus according to claim 8, wherein said clock source is the hardware real-time clock.
CNB2006101453790A 2006-11-27 2006-11-27 Time synchronizing method and device Active CN100371851C (en)

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CN101359238B (en) * 2008-09-02 2012-01-18 中兴通讯股份有限公司 Time synchronization method and system for multi-core system
CN101751067B (en) * 2008-11-11 2012-05-23 盛群半导体股份有限公司 Synchronous circuit applied to multiple microprocessors
CN101719080B (en) * 2009-12-25 2014-03-26 北京网御星云信息技术有限公司 Multi-core timer implementing method and system
CN104216813B (en) * 2014-09-02 2017-06-27 迈普通信技术股份有限公司 A kind of monitoring method and device from nuclear state
CN106559157A (en) * 2015-09-29 2017-04-05 中兴通讯股份有限公司 A kind of clock synchronizing method, device and communication equipment
CN106708639B (en) * 2015-11-13 2020-05-05 中国科学院沈阳自动化研究所 An Accurate Recording Method of Data Timing Based on VxWorks System
CN105550156B (en) * 2015-12-02 2018-08-07 浙江大华技术股份有限公司 A kind of method and device of time synchronization
CN106354119B (en) * 2016-08-26 2020-04-21 华自科技股份有限公司 Power-down time recording method, system and device for microcomputer relay protection device
CN109471588B (en) * 2018-09-13 2021-08-10 北京米文动力科技有限公司 Synchronization method and device
CN111107020B (en) * 2019-12-31 2022-01-11 苏州盛科通信股份有限公司 Method for time synchronization of multi-core Ethernet switching chip
CN111752335B (en) * 2020-05-23 2022-05-31 苏州浪潮智能科技有限公司 Time synchronization method, system, terminal and storage medium based on hard disk multi-core CPU
CN112558685B (en) * 2020-12-11 2024-05-10 南京四方亿能电力自动化有限公司 Method for synchronizing time between power distribution terminal modules
CN113406992B (en) * 2021-05-25 2022-11-11 威胜集团有限公司 System clock control method, processing device and readable storage medium
CN114895746B (en) * 2022-06-14 2023-11-07 北京东土军悦科技有限公司 System time synchronization method and device, computing equipment and storage medium
CN117220817B (en) * 2023-11-07 2024-01-05 江苏金智科技股份有限公司 Method and system for time synchronization monitoring of multi-core processor

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