CN100359602C - Method for effectively utilizing memory in site programmable gate array - Google Patents

Abstract

The present invention relates to a method which comprises the following procedures: (1) a controller is arranged in a field programmable gate array, memories in the programmable gate array are selected on site, memory blocks are divided into a plurality of memory spaces, and the memory spaces are defined simultaneously so as to store one correlation variable of a timer in each memory space; (2) the correlation variable of each memory space is initialized by the controller so as to make each memory space correspond to one application source; (3) the controller is indicated to have polling operation on all the memory spaces, and corresponding operation on the application sources are carried out according to the correlation variable of each memory space; (4) the correlation variables of the corresponding memory spaces are configured in time when application from the application sources is received by the controller, and corresponding operation on corresponding memory spaces is carried out according to the information offered by the application sources. Therefore, the present invention can save resources for field programmable gate arrays and reduce costs of development and design, and is suitable for designing all field programmable gate arrays.

Description

Method for effectively utilizing memory in field programmable gate array

Technical Field

The invention belongs to the Field of Programmable Gate Array (FPGA) method in communication technology, and especially relates to a method for effectively utilizing a memory in an FPGA.

Background

At present, in the field programmable gate array design, the application of timers is more and more extensive, and particularly when some data queues with higher real-time performance are managed, each data queue is used as a timer application source, and a timer is required to be uniquely corresponding to the data queue. The timer provides a time basis for the management of each queue data, and the data queue is updated in time according to the running condition of the timer during the management. Nowadays, communication technology is developing day by day, data queues managed by field programmable gate arrays are more and more complex, and a few timers are utilized in the field programmable gate arrays, so that the requirements are far from being met. For example: when the field programmable gate array adopts an Asynchronous Transfer Mode (ATM) adaptation layer (AAL) protocol, more than 1000 data queues need to be managed, which requires more than 1000 timers to be set in the field programmable gate array. However, the general conventional method for realizing more than 1000 timers increases the design and production cost; at the same time, a large amount of resources of the field programmable gate array are consumed, which cannot be realized in many cases. Therefore, it is necessary to implement a large number (more than 1000) of timers in the fpga to meet the requirements of reducing design and production costs.

Disclosure of Invention

The invention aims to provide a method for effectively utilizing a memory in a field programmable gate array, which solves the problems so as to meet the requirements of the field programmable gate array on various aspects such as quick management, cost reduction and the like.

The purpose of the invention is realized as follows: a method of efficiently utilizing memory in a field programmable gate array, comprising the steps of:

1, a controller is arranged in a field programmable gate array, a memory in the field programmable gate array is selected, a memory block is divided into a plurality of memory spaces, and the memory spaces are defined simultaneously, so that each memory space stores a relevant variable of a timer;

2, assigning an initial value to the related variable of each storage space by the controller, so that each storage space corresponds to one application source;

3, the controller performs polling operation on all the storage spaces and performs corresponding operation on the application source according to the related variable of each storage space;

and 4, when the controller receives the application of the application source, configuring relevant variables of the corresponding storage space in time, and performing corresponding operation on the corresponding storage space according to the information provided by the application source.

By adopting the technical scheme, the invention not only can efficiently provide a large number of timers for the design of the field programmable gate array to meet the requirements of communication technology, but also can save a large number of resources of the field programmable gate array used by the timers by other methods, thereby achieving the requirements of reducing development and design costs and carrying out rapid communication management. The invention is suitable for the design of all field programmable gate arrays.

Drawings

FIG. 1 is a schematic diagram of a timer according to the present invention;

fig. 2 is a flow chart of a control process of the present invention.

In the figure:

101. application source control module 102, controller 103, memory 104 and timer

111. Bus 112. bus

201. Select define operation 202, apply for source operation 203, poll operation 204, store operation

Detailed Description

The following detailed description of the invention is provided in connection with the accompanying drawings:

in fig. 1, the timer 104 of the present invention is composed of a controller 102 and a memory 103 of a field programmable gate array. The controller 102 performs handshaking (connection) with the application source control module 101 through the bus 111, and performs read/write operations (connection) on each storage space in the memory 103 through the bus 112. The memory 103 is divided into a number of memory spaces, each of which stores a variable associated with a timer 104 corresponding to a source 202 of a proposed application.

If the memory 103 is replaced by logic resources in a conventional field programmable gate array, the logic resources are consumed greatly. For example, generating 32 timers consumes 30% of the resources of a 15 ten thousand gate FPGA chip from XILINX. And 1000 timers are generated, so that no field programmable gate array chip which can meet the design requirements exists at all. In the invention, the required design requirements can be realized only by occupying 2-4 memories 103.

In fig. 2, the control program of the present invention is specifically as follows:

1, power-up begins.

2, the controller 102 is generated, and the first memory space is defined, and the polling operation 203 initializes this memory space, and makes a decision to initialize all memory spaces.

And 3, judging all initialized storage spaces:

if not, starting polling the next storage space and returning to the program for initializing the storage space;

if so, a poll operation 203 polls the first memory space and reads the value of this memory space and makes a determination that the count status bit is 1.

4, judging that the counting state bit is 1:

1) if not, judging whether an application source operation 202 provides an application or not;

2) if yes, judging that the value of the counting register is 0;

1) a judgment is made that the value of the count register is 0;

if yes, making a count status bit clear 0, simultaneously notifying the application source, and making a judgment whether the application source operation 202 provides an application;

if not, subtracting 1 from the value in the counting register, and then rewriting the value into the counting register, and making a judgment whether an application source operation 202 provides an application;

5, making a judgment whether an application source operation 202 applies for;

1) if not, then the polling operation 203 of the next storage space is started, and the program for reading the value of the storage space is returned;

2) if yes, temporarily storing the address of the storage space of the polling operation 203, and making a judgment whether to apply for starting the timer 104;

1) a determination is made as to whether the timer 104 is applied for starting;

if yes, making a counting state position of '1', giving an initial value to a counting register, reading the address of the temporarily stored storage space, starting a polling operation 203 of the next storage space, and returning to a program for reading the value of the storage space;

if not, a determination is made as to whether a stop timer 104 is applied.

2) Make a determination as to whether a stop timer has been applied;

if yes, counting the status bit to clear 0, and counting the register to clear 0; reading the address of the temporary storage space, starting the polling operation 203 of the next storage space, and returning to the program for reading the value of the storage space;

if not, the address of the temporarily stored memory space is read out, and the polling operation 203 of the next memory space is started, and the procedure of reading out the value of the memory space is returned.

In summary, in the actual control process, the method of the present invention mainly includes the following contents and steps in combination with the specific control program:

first, a controller 102 is generated in a field programmable gate array; the method comprises the steps of selecting a memory 103 in the field programmable gate array according to actual conditions, dividing the memory 103 into a plurality of storage spaces, and defining the storage spaces to enable each storage space to store a relevant variable of a timer 104. Wherein,

the timer 104 is composed of the controller 102 and the memory 103, and the control relationship of the controller 102 and each memory space.

The controller 102 may be generated by a field programmable gate array.

In the storage space definition described above:

counting the status bit: for indicating the current working state of the timer 104, the counting status bit only occupies one bit (1bit) space; when the count state bit is '0', it indicates that the timer 104 is not starting to count, and when the count state bit is '1', it indicates that the counter is counting.

Applying for a source address register: the address of the application source operation 202 corresponding to the timer 104 is recorded, and the size of the memory space occupied by the register can be set according to actual situations.

An initial value register: the counting initial value of the timer 104 is represented, and the size of the storage space occupied by the initial value register can be set according to the actual situation; the count initial value of the initial value register determines the timing length of the timer 104, and since the time for the controller 102 to poll all the memory spaces 203 once is only a fixed value, the timing length of the timer 104 is "count initial value x time for the controller to poll another memory space once".

A counting register: the count value of the timer 104 is represented, and the size of the memory space occupied by the count register is the same as the size of the memory space occupied by the initial value register.

Next, the associated variables of each memory space are initialized by the controller 102 so that each memory space corresponds to an application source operation (i.e., polling and initializing memory space operations) 202. When the field programmable gate array is powered on and starts operating, the initial values of the storage spaces in the field programmable gate array are all indeterminate values, and in order to enable all the timers 104 to normally operate from the beginning, each variable in each storage space must be assigned an initial value. When an initial value is assigned, the storage spaces are polled in sequence in operation 203, and an application source operation 202 is allocated to each storage space, that is, an application source address register of each storage space retains an address of the application source operation 202, and each application source operation 202 also retains an address of the storage space, so that a one-to-one correspondence relationship is established. The initial value register is then initialized according to the actual conditions of the application source operation 202, while all other bits of the memory space are cleared. After assigning the initial value to the storage space, determining whether all the storage spaces are assigned with the initial values, if not, polling 203 the next storage space; if so, a jump is made to polling operation 203.

Furthermore, the controller 102 performs a polling operation 203 on all the memory spaces, performs a corresponding polling operation 203 on the application source operation 202 according to the relevant variable of each memory space, reads the value of the memory space, and makes a judgment count status bit. If the count state bit is '0', jump to store operation 204; if the count state bit is '1', indicating that the timer 104 is counting, the following operations are continued: judging whether the value in the counting register is 0 or not, if not, subtracting 1 from the value in the counting register, writing the value in the counting register into the counting register, and jumping to a storage operation (namely judging whether an application source provides an application operation or not) 204; if it is 0, the count status bit is written to '0', and the application source operation 202 is notified that its corresponding memory space count is full by the address in the address register of the application source operation 202, and then jumps to the store operation 204. Finally, when the controller 102 receives the application of the application source operation 202, relevant variables of the corresponding storage space are configured in time, and corresponding storage operation 204 is performed on the corresponding storage space according to the information provided by the application source operation 202. The controller 102 determines if a request was made by the request source operation 202 and if not, a new polling operation 203 is initiated. If so, the address of the memory space to be polled in operation 203 is temporarily stored. The requests received by the controller 102 for the source operation 202 are generally of two types: one is to start the timer 104 to start counting, and the other is to stop the timer 104 to count. When the controller 102 receives a command for starting the timer 104 to start counting from the application source operation 202, according to the address of the storage space provided by the application source operation 202, the value of the storage space corresponding to the application source operation 202 is read out, the value of the initial value register is written into the counting register, and at the same time, the counting state position '1' is written into the counting register, and then the address of the temporarily stored storage space is read out, and a new polling operation 203 is started. When the memory 103 receives the application for stopping the counter counting by the application source operation 202, temporarily storing the address of the storage space of the next to-be-polled operation 203, reading the value of the storage space corresponding to the application source operation 202 according to the address of the storage space provided by the application source operation 202, clearing the value of the counting memory 103 by 0, setting the counting state position to '0', reading the temporarily stored address of the storage space, and starting a new polling operation 203.

Claims (5)

1. A method of efficiently utilizing memory in a field programmable gate array, comprising the steps of:

1) setting a controller in a field programmable gate array, selecting a memory in the field programmable gate array, dividing a memory block into a plurality of memory spaces, and defining the memory spaces to enable each memory space to store a relevant variable of a timer;

2) the controller assigns an initial value to the related variable of each storage space to enable each storage space to correspond to one application source, wherein one data queue serves as one application source;

3) the controller performs polling operation on all the storage spaces and performs corresponding operation on the application source according to the related variable of each storage space;

4) when the controller receives the application of the application source, relevant variables of the corresponding storage space are configured in time, and corresponding operation is carried out on the corresponding storage space according to the information provided by the application source.

2. The method of claim 1, wherein the second step further comprises the steps of:

1) when an initial value is assigned, sequentially polling each storage space, and allocating an application source operation to each storage space;

2) then assigning an initial value to the initial value register according to the actual condition of the application source operation, and simultaneously resetting all other bits of the storage space;

3) after assigning an initial value to the storage space, judging whether all the storage spaces are assigned with initial values, if not, polling to operate the next storage space; if so, a jump is made to the polling operation.

3. A method for efficiently utilizing memory in a field programmable gate array according to claim 1 or 2, wherein the third step further comprises the steps of:

1) when the controller performs polling operation on all the storage spaces, the value of the storage space is read out and the counting state bit is judged;

2) when the counting state bit is judged, if the counting state bit is '0', the storage operation is jumped to, and if the counting state bit is '1', the judgment whether the value in the counting register is 0 is made;

3) when judging whether the value in the counting register is 0, if not, subtracting 1 from the value of the counting register, writing the value into the counting register, and jumping to a storage operation; if 0, the count status bit is written to '0' and then a jump is made to the store operation.

4. The method of claim 1, wherein the fourth step further comprises the steps of:

1) when the controller judges whether an application source operation applies for, if not, a new polling operation is started, and if so, the new polling operation is about to be performed

Temporarily storing the address of the storage space of the polling operation;

2) when the controller receives the application of the application source operation, the controller starts the timer to start counting and starts a new polling operation, or stops the timer to count and starts a new polling operation.

5. The method of claim 3, wherein the fourth step further comprises the steps of:

1) when judging whether an application source operation applies for, if not, starting a new polling operation, and if so, temporarily storing the address of a storage space to be subjected to the polling operation;

2) when the controller receives the application of the application source operation, the controller starts the timer to start counting and starts a new polling operation, or stops the timer to count and starts a new polling operation.

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