CN100339765C - Reticles to Reduce Optical Proximity Effects - Google Patents

Abstract

The invention discloses a photomask capable of reducing optical proximity effect, which comprises a plurality of linear patterns, a plurality of first auxiliary patterns arranged between the linear patterns and a plurality of second auxiliary patterns arranged between the linear patterns and the first auxiliary patterns. The linear pattern is used for forming a shallow trench isolation on a silicon chip. The first auxiliary pattern is rectangular and has a larger width in a direction perpendicular to the linear pattern. The width of the first auxiliary pattern parallel to the line pattern direction is less than two fifths of the wavelength of the exposure beam emitted by a lithography system, but greater than one quarter of the wavelength. The width of the second auxiliary pattern perpendicular to the line pattern direction is less than two fifths of the wavelength of the exposure beam, but greater than one quarter of the wavelength.

Description

Reticles to Reduce Optical Proximity Effects

technical field

The present invention relates to a photomask capable of reducing the optical proximity effect, in particular to a photomask comprising a plurality of staircase-shaped auxiliary patterns for reducing the optical proximity effect. The staircase-shaped auxiliary pattern can not only improve the process window, but also improve the image contrast.

Background technique

The process of semiconductor chips often uses lithography to form desired patterns on silicon chips. The resolution of a lithography system can basically be expressed by the following Rayleigh equation:

R=k ₁ λ/NA

Wherein, R represents resolution, k ₁ is a parameter of the lithography process, λ is the wavelength of the exposure beam emitted by the lithography system, and NA is the numerical aperture of the lens. According to the Rayleigh equation, the larger the numerical aperture, the better the resolution. On the other hand, the depth-of-focus (DoF) of the lithography system can be expressed by the following equation:

DoF = k ₂ λ/(NA) ²

Where k ₂ is a parameter of the lithography process. It can be seen from the above equation that the larger the numerical aperture, the smaller the depth of focus. The lithography process using an optical system with a larger numerical aperture can obtain better pattern resolution, but it will reduce the depth of focus, making it difficult to control the stability of the lithography process. Because reducing the numerical aperture leads to a decrease in the depth of focus, many special processes have been developed that can increase the resolution and depth of focus of the lithography process without changing the numerical aperture. One of them is to increase the depth of focus by changing the traditional lighting system to circular off-axis lighting, four-hole off-axis lighting and two-hole off-axis lighting. Another special process, which is especially suitable for the lithography process of equal-width lines or equal-width spaces, is to change the iso-focal curve by adding auxiliary patterns.

As the critical dimension of the photoresist pattern shrinks and approaches the resolution scale of the lithography equipment, the corresponding relationship between the pattern on the photomask and the pattern actually formed on the photoresist layer of the silicon chip will be seriously reduced. In particular, the difference between the circuit patterns will change with the proximity of the patterns. The optical proximity effect of the lithography process may come from the exposure process, the formation process of the photoresist pattern and the subsequent pattern transfer process (such as the etching process). Due to the influence of the optical proximity effect, the change of the pattern on the silicon chip depends on the closeness of the two patterns on the photomask. The optical proximity effect has been proven to originate from the optical diffraction phenomenon of the projection system, and this optical diffraction phenomenon causes adjacent patterns to influence each other, resulting in this pattern-dependent variation phenomenon.

One of the common optical proximity effects in the lithography process is that when the patterns with the same size on the photomask are transferred to the silicon chip, patterns of different sizes are formed, and the difference between the patterns of different sizes depends on the proximity of the patterns to each other ( That is, the degree of relative isolation or clustering). US Patent No. 5,242,770 discloses a technique for reducing such variations by setting scattered bars (also called auxiliary patterns) beside isolated edges. In this way, the pattern with isolated edges of the mask can be transferred to the silicon chip in a manner similar to packed edges.

FIG. 1 is a schematic diagram of a photomask 10 disclosed in US Pat. No. 5,242,770. As shown in FIG. 1 , the photomask 10 includes a plurality of main patterns 30 - 34 , wherein the main pattern 32 has two isolated sides A1 , A3 and a cluster of sides A2 . According to the teaching of US Pat. No. 5,242,770, two auxiliary patterns 35, 36 are disposed at a predetermined distance on both sides of the main pattern 32, so that the isolated side A3 becomes a corrected side (compared to the isolated side A1).

According to the technology disclosed in Patent No. 5,242,770, the experimental results show that the optimal width of the auxiliary patterns 35 and 36 is one-fifth of the critical dimension of the lithography process, and the optimal distance from the isolated side is the critical dimension 1.1 times. For example, using a traditional mercury arc lamp with a wavelength of 365 nm as the exposure beam emitted by the lithography system, the width of the auxiliary pattern is set to 0.1 μm. However, the allowable maximum width of the auxiliary pattern can be as high as 0.125 μm, while still keeping the auxiliary pattern non-resolvable.

With the rapid shrinking of the critical dimensions of the semiconductor process, the existing lithography technology cannot meet the future process requirements, and has the following disadvantages:

1. If auxiliary pattern design is not used, the process window of the lithography process cannot meet the specifications of future advanced semiconductor processes (especially patterns with equal-width lines or equal-width spacing), and the value of the mask error enhancement factor will be too large.

2. Even if the prior art adopts the auxiliary patterning technique disclosed in No. 5,242,770, it may not provide enough process window to meet the design criteria of very small shallow trench isolation. Furthermore, the position and quantity of the auxiliary patterns are not easy to be changed in design.

Contents of the invention

The main objective of the present invention is to provide a photomask comprising a plurality of staircase auxiliary patterns to reduce the optical proximity effect. The staircase-shaped auxiliary pattern can not only improve the process window, but also improve the image contrast.

In order to achieve the above object, the present invention provides a kind of photomask that can reduce optical proximity effect, and described photomask comprises:

Multiple linear patterns;

A plurality of groups of first auxiliary patterns, wherein each group of first auxiliary patterns is arranged between two linear patterns, the first auxiliary patterns are rectangular, and the width perpendicular to the direction of the linear pattern is greater than that parallel to the linear pattern the width of the orientation; and

A plurality of second auxiliary patterns, wherein each second auxiliary pattern is disposed between the linear pattern and a group of first auxiliary patterns.

In other words, to achieve the above object, the present invention discloses a photomask capable of reducing the optical proximity effect, which includes a plurality of linear patterns, a plurality of first auxiliary patterns disposed between the linear patterns, and a plurality of first auxiliary patterns disposed between the linear patterns. The second auxiliary pattern between the shape pattern and the first auxiliary pattern. The linear pattern is used to form a shallow trench isolation on a silicon chip. The first auxiliary pattern is rectangular, and its width perpendicular to the direction of the line pattern is larger. The width of the first auxiliary pattern parallel to the line pattern is less than 2/5 of the wavelength of the exposure beam emitted by a lithography system, but greater than 1/4 of the wavelength. The width of the second auxiliary pattern perpendicular to the line pattern is less than two-fifths of the wavelength of the exposure beam but greater than one-fourth of the wavelength. The size of the first auxiliary pattern and the second auxiliary pattern is designed not to be displayed on the silicon chip, and the linear pattern is designed to be displayed on the silicon chip.

Compared with the prior art, the present invention can further improve the depth of focus, widen the process window and increase the resolution. In addition, resolution and critical dimension uniformity are also improved due to improved image contrast and mask error enhancement factor. Furthermore, the position and quantity of the staircase-shaped auxiliary pattern can be changed according to the design requirements, so it is applicable to the lithography equipment currently used in the industry without increasing the cost due to the change of process equipment.

Description of drawings

FIG. 1 is a schematic diagram of a photomask disclosed in US Pat. No. 5,242,770;

2 is a schematic diagram of a lithography system;

Fig. 3 (a) is the partially enlarged view of the photomask of the first embodiment of the present invention;

Figure 3(b) is a partial enlarged view of the mask of US Patent No. 5,242,770;

Fig. 4 shows the exposure intensity distribution diagram of the photomask of the present invention on the photoresist layer;

Figure 5(a) shows the process window of the photomask of the present invention;

Figure 5(b) shows the process window of the photomask of US Pat. No. 5,242,770;

Figure 6(a) shows the mask error enhancement coefficient of the mask of the present invention;

FIG. 6(b) shows the mask error enhancement factor of the mask of US Pat. No. 5,242,770;

Figure 7(a) shows the image comparison of the photomask of the present invention;

Figure 7(b) shows the image comparison of the reticle of US Patent No. 5,242,770; and

FIG. 8 is a partially enlarged view of a photomask according to a second embodiment of the present invention.

Detailed ways

FIG. 2 is a schematic diagram of a lithography system 40 . The lithography system 40 includes an exposure beam 42 , a mask 50 and a silicon chip 44 for forming shallow trench isolation on the silicon chip 44 . The silicon chip 44 includes a substrate 45 and a photoresist layer 46 . The mask 50 includes a quartz substrate 51 and a pattern formed on the quartz substrate 51 , wherein the pattern is formed by a light absorbing layer 53 . The pattern formed by the light absorbing layer 53 corresponds to the shallow trench isolation to be formed on the silicon chip 44 and is transferred to the photoresist layer 46 on the substrate 45 through a lithography process.

FIG. 3( a ) is a schematic diagram of a photomask 50 according to the first embodiment of the present invention, which is used to fabricate a 0.12 micron shallow trench isolation. The pattern of the mask 50 includes a plurality of linear patterns 52 , a plurality of sets of first auxiliary patterns 60 and a plurality of second auxiliary patterns 70 . Each group of first auxiliary patterns 60 is disposed between two linear patterns 52 , and the second auxiliary patterns 70 are disposed between the linear patterns 52 and the first auxiliary patterns 60 . Each linear pattern 52 corresponds to a shallow trench isolation to be formed on the silicon chip 44 . The first auxiliary pattern 60 is rectangular, and its width 62 perpendicular to the direction of the line pattern 52 is greater than its width 64 parallel to the direction of the line pattern 52 . Since the first auxiliary pattern 60 is arranged in the manner of the vertical line pattern 52 to form a stair-like appearance, it is called a staircase-shaped auxiliary pattern.

The size design of the first auxiliary pattern 60 and the second auxiliary pattern 70 must avoid being imaged on the photoresist layer 46 of the silicon chip 44, while the linear pattern 52 is designed to be imaged on the light of the silicon chip 44. Resistance layer 46. In order to avoid transfer to the photoresist layer 46 during the lithography process, the width 64 of the first auxiliary pattern 60 is preferably less than two-fifths of the wavelength of the exposure beam 42 emitted by the lithography system 40, but greater than this wavelength. a quarter of. The distance between two adjacent first auxiliary patterns 60 is equal to or greater than the width 64 of the first auxiliary patterns 60 . Similarly, in order to avoid transfer to the photoresist layer 46 during the lithography process, the width 72 of the second auxiliary pattern 70 is preferably less than two-fifths of the wavelength of the exposure beam 42 emitted by the lithography system 40, but greater than a quarter of that wavelength. The distance 56 between the linear pattern 52 and the second auxiliary pattern 70 is equal to or greater than the width 54 of the linear pattern 52, and the distance 74 between the first auxiliary pattern 60 and the second auxiliary pattern 70 is equal to or greater than the width 54 of the linear pattern 52. The width of the second auxiliary pattern is 72. The width 72 of the second auxiliary pattern 70 is substantially equal to the width 64 of the first auxiliary pattern 60 .

FIG. 3( b ) is a partially enlarged view of the mask 100 disclosed in US Pat. No. 5,242,770, which is used to fabricate a 0.12 micron shallow trench isolation. The difference between FIG. 3( a ) and FIG. 3( b ) is that the mask 50 of the present invention includes the first auxiliary patterns 60 disposed between the second auxiliary patterns 70 .

FIG. 4 shows the exposure intensity distribution diagram of the present invention on the photoresist layer 46 . Theoretically, the middle of the pattern should have the maximum exposure intensity, for example, the middle position of the linear pattern 52 has the maximum exposure intensity. However, the position having the maximum exposure intensity on the second auxiliary pattern 70 has shifted from its middle position. In addition, the exposure intensity at the middle position of the first auxiliary pattern 60 is the smallest one. This phenomenon is caused by the destructive interference of the exposure beam 42 emitted by the lithography system 40 on the photoresist layer 46 . If the exposure intensity of the photoresist layer 46 is set to the intensity indicated by the straight line 78, only the linear pattern 52 will be developed and imaged on the photoresist layer 46 after the lithography process, and the first auxiliary pattern 60 And the second auxiliary pattern 70 will not be developed and imaged.

FIG. 5( a ) shows the process window 80 of the mask 50 of the present invention, and FIG. 5( b ) shows the process window 20 of the mask 100 of US Pat. No. 5,242,770. As shown in the figure, the depth of focus of the conventional photomask 100 is only 0.49 microns, while the depth of focus of the photomask 50 of the present invention is increased to 0.58 micrometers. In other words, the present invention can improve the depth of focus. In addition, comparing FIG. 5(a) with FIG. 5(b), it can be clearly found that the process window 80 is larger than the process window 20, that is, the present invention can improve and enhance the process window and focus depth (or resolution).

FIG. 6( a ) shows the mask error enhancement coefficient of the reticle 50 of the present invention, and FIG. 6( b ) shows the mask error enhancement coefficient of the reticle 100 of US Pat. No. 5,242,770. As shown in the figure, the mask error enhancement factor of the mask 50 of the present invention is only 2.05, while the mask error enhancement factor of the conventional mask 100 is as high as 2.19. In other words, the present invention can reduce the mask error enhancement factor value.

FIG. 7( a ) shows the image comparison of the reticle 50 of the present invention, and FIG. 7( b ) shows the image comparison of the reticle 100 of US Pat. No. 5,242,770. As shown in the figure, the image contrast value of the photomask 50 of the present invention is as high as 1.94, while the image contrast value of the conventional photomask 100 is only 1.78. In other words, the present invention can improve image contrast and enhance resolution.

FIG. 8 is a partially enlarged view of a photomask 50 according to the second embodiment of the present invention, which is used to fabricate a 0.12 micron shallow trench isolation. The pattern of the mask 50 includes a plurality of linear patterns 52 and multiple sets of third auxiliary patterns 90 , wherein each set of third auxiliary patterns 90 is disposed between two linear patterns 52 . The first auxiliary pattern 90 is rectangular, and its width 98 perpendicular to the direction of the line pattern 52 is larger than the width 94 parallel to the direction of the line pattern 52 . In order to avoid transferring to the photoresist layer 46 during the lithography process, the distance 92 between the line pattern 52 and the third auxiliary pattern is greater than the width 54 of the line pattern 52 . The width 94 of the third auxiliary pattern 90 is preferably less than two-fifths of the wavelength of the exposure beam 42 emitted by the lithography system 40 but greater than one-fourth of the wavelength. The distance 96 between two adjacent third auxiliary patterns 90 is equal to or greater than the width 94 of the third auxiliary patterns 90 . Comparing the designs of Fig. 3 and Fig. 8, it can be seen that the position and quantity of the staircase-shaped auxiliary patterns (i.e., the first auxiliary pattern 60 and the third auxiliary pattern 90) of the present invention can be changed according to the design requirements, so it is suitable for the current industrial use. Lithography equipment, without increasing costs due to changes in process equipment.

The technical content and technical features of the present invention have been disclosed above, but those skilled in the art may still make various substitutions and modifications based on the teaching and disclosure of the present invention without departing from the spirit of the present invention. Therefore, the protection scope of the present invention should not be limited to the contents disclosed in the embodiments, but should include various replacements and modifications that do not depart from the present invention, and are covered by the scope of the following patent applications.

Claims (10)

1. light cover for decreasing optical approaching effect, it is characterized in that: described light shield comprises:

A plurality of linear pattern; And

Many group first auxiliary patterns, wherein each to organize first auxiliary patterns be to be arranged between the two wire patterns, described first auxiliary patterns is a rectangle, and the width of its vertical described linear pattern direction is greater than the width of parallel described linear pattern direction.

2. light cover for decreasing optical approaching effect as claimed in claim 1 is characterized in that: the spacing of described linear pattern and described first auxiliary patterns is greater than the width of described linear pattern.

3. light cover for decreasing optical approaching effect as claimed in claim 1 is characterized in that: 2/5ths of the wavelength of the exposing light beam that the width of described first auxiliary patterns sends less than a microlithography system, but greater than 1/4th of described wavelength.

4. light cover for decreasing optical approaching effect as claimed in claim 1 is characterized in that: the spacing of two adjacent first auxiliary patterns is greater than the length of described auxiliary patterns.

5. light cover for decreasing optical approaching effect as claimed in claim 1 is characterized in that: a plurality of second auxiliary patterns, wherein each second auxiliary patterns is to be arranged between a linear pattern and one group of first auxiliary patterns.

6. light cover for decreasing optical approaching effect as claimed in claim 5 is characterized in that: the width of described second auxiliary patterns equals the width of the parallel described linear pattern direction of described first auxiliary patterns.

7. light cover for decreasing optical approaching effect as claimed in claim 5 is characterized in that: distance is greater than the width of described second auxiliary patterns between described first auxiliary patterns group and described second auxiliary patterns.

8. light cover for decreasing optical approaching effect as claimed in claim 5 is characterized in that: the spacing of described linear pattern and described second auxiliary patterns is greater than the width of described linear pattern.

9. light cover for decreasing optical approaching effect as claimed in claim 5 is characterized in that: the width of described second auxiliary patterns is less than 2/5ths of the wavelength of an exposure light source, but greater than 1/4th of described wavelength.

10. light cover for decreasing optical approaching effect as claimed in claim 5 is characterized in that: described linear pattern is to be used to form on the chip shallow isolating trough.

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