CN100339756C - Multilayer diffusion barrier layer structure and manufacturing method of thin film transistor liquid crystal display - Google Patents
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- 230000004888 barrier function Effects 0.000 title claims abstract description 100
- 239000010409 thin film Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 16
- 239000012535 impurity Substances 0.000 claims abstract description 37
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 30
- 238000009832 plasma treatment Methods 0.000 claims abstract description 7
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- 238000000034 method Methods 0.000 claims description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 229910004205 SiNX Inorganic materials 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 230000000694 effects Effects 0.000 description 10
- 230000000903 blocking effect Effects 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
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- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 238000005224 laser annealing Methods 0.000 description 3
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Abstract
Description
技术领域technical field
本发明涉及一种薄膜晶体管液晶显示器的制造技术,尤其涉及经过了改良的低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层结构及其改良的制造方法。The invention relates to a manufacturing technology of a thin film transistor liquid crystal display, in particular to an improved multi-level diffusion barrier layer structure of a low temperature polysilicon (LTPS) thin film transistor liquid crystal display and an improved manufacturing method thereof.
背景技术Background technique
随着薄膜晶体管(thin-film transistors;TFTs)制造技术的飞速进步,具备了轻薄、省电和无辐射线等优点的液晶显示器(liquid crystal display;LCD)已大量应用于计算机、个人数码助理器(PDA)、手表、笔记型电脑、数码相机、液晶显示器和无绳电话等各式电子产品。加之业界积极投入的研发以及采用工业化的生产设备,使液晶显示器的生产成本不断下降,更令液晶显示器的需求量大增。With the rapid progress of thin-film transistors (TFTs) manufacturing technology, liquid crystal displays (liquid crystal displays; LCDs), which have the advantages of thinness, lightness, power saving, and no radiation, have been widely used in computers and personal digital assistants. (PDA), watches, notebook computers, digital cameras, LCD monitors and cordless phones and other electronic products. Coupled with the industry's active investment in research and development and the adoption of industrialized production equipment, the production cost of liquid crystal displays has been continuously reduced, and the demand for liquid crystal displays has also increased significantly.
目前市面上的TFT面板,大多属于传统的非晶矽薄膜晶体管液晶显示器(a-Si TFT LCD)技术,由于低温多晶矽(LTPS)薄膜晶体管液晶显示器具有解析度、亮度、尺寸及抗电磁干扰等各方面的优势,使得液晶显示器厂商的研发重心正逐步向此领域转移。基于薄膜品质和产量需求的考虑,低温多晶矽制造过程通常采用准分子雷射退火技术(Excimer LaserAnnealing),即利用准分子雷射作为热源,雷射光经过投射系统后,会产生能量均匀分布的雷射光束,投射在非晶矽结构的玻璃基板上,当非晶矽结构玻璃基板吸收准分子雷射的能量后会转变成为多晶矽结构,整个处理过程都是在600℃以下完成,所以一般玻璃基板皆可适用。Most of the TFT panels currently on the market belong to the traditional amorphous silicon thin film transistor liquid crystal display (a-Si TFT LCD) technology. Due to the low temperature polysilicon (LTPS) thin film transistor liquid crystal display has various advantages such as resolution, brightness, size and anti-electromagnetic interference. Advantages in this field make the research and development focus of LCD manufacturers gradually shift to this field. Based on the consideration of film quality and output requirements, the low-temperature polysilicon manufacturing process usually adopts Excimer Laser Annealing technology (Excimer Laser Annealing), that is, using excimer laser as a heat source. After the laser light passes through the projection system, it will produce laser with uniform energy distribution. The light beam is projected on the glass substrate of the amorphous silicon structure. When the glass substrate of the amorphous silicon structure absorbs the energy of the excimer laser, it will transform into a polysilicon structure. The whole process is completed below 600°C, so the general glass substrate is applicable.
在低温多晶矽制程中,当以雷射照射方式使非晶矽转换为多晶矽时,除了矽膜被加热之外,在该矽膜下方的玻璃基板表面亦会因吸收该矽膜的热量而使其温度上升。此时,该玻璃基板中的杂质就会因高温而扩散至该矽膜中,于是破坏了该矽膜的电性,使其失去了半导体的性能。为了解决该问题,可在矽膜与玻璃基板之间先沉积一扩散障碍层(bufferlayer)来阻挡杂质扩散。In the low-temperature polysilicon process, when the amorphous silicon is converted into polysilicon by laser irradiation, in addition to the heating of the silicon film, the surface of the glass substrate under the silicon film will also absorb the heat of the silicon film. The temperature rises. At this time, the impurities in the glass substrate will diffuse into the silicon film due to the high temperature, thus destroying the electrical properties of the silicon film and making it lose the performance of semiconductor. In order to solve this problem, a diffusion barrier layer (buffer layer) can be deposited between the silicon film and the glass substrate to block the diffusion of impurities.
现有技术在扩散障碍层的制造过程中,一般是通过增加扩散障碍层薄膜本身的致密性(density)来降低扩散系数,增强阻挡杂质扩散的效果。然而,增加薄膜致密度会产生应力增加的副作用。另外,也有藉由提高扩散障碍层薄膜厚度用来增加阻挡杂质扩散效果,但该方法通常会降低生产能力(throughput)。In the prior art, in the manufacturing process of the diffusion barrier layer, the diffusion coefficient is generally reduced by increasing the density of the diffusion barrier film itself, and the effect of blocking impurity diffusion is enhanced. However, increasing film density has the side effect of increased stress. In addition, increasing the film thickness of the diffusion barrier layer is also used to increase the effect of blocking impurity diffusion, but this method usually reduces throughput.
因此,急需改良现有的低温多晶矽制程中扩散障碍层的制造方法,以有效增加扩散障碍层阻挡杂质扩散的效果。Therefore, there is an urgent need to improve the existing manufacturing method of the diffusion barrier layer in the low-temperature polysilicon process, so as to effectively increase the effect of the diffusion barrier layer in blocking impurity diffusion.
发明内容Contents of the invention
本发明的主要目的是提供一种低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层结构,通过增加多层次扩散障碍层各层之间的不连续结构,达到提高扩散障碍层阻挡杂质扩散的效果的目的。The main purpose of the present invention is to provide a multi-level diffusion barrier layer structure of a low-temperature polysilicon (LTPS) thin film transistor liquid crystal display. purpose of the effect.
本发明还提供了上述可实现有效阻挡杂质扩散的低温多晶矽薄膜晶体管的多层次扩散障碍层的制造方法。The present invention also provides a method for manufacturing the multi-level diffusion barrier layer of the low-temperature polysilicon thin film transistor that can effectively block impurity diffusion.
根据本发明的技术方案,首先提供了一种低温多晶矽薄膜晶体管的多层次扩散障碍层结构,所述结构形成于该薄膜晶体管的绝缘基板与多晶矽膜之间,其包括至少二层扩散障碍层,且各扩散障碍层之间设有不连续结构,从而达到有效阻挡杂质扩散的目的。根据本发明,所述各扩散障碍层之间的不连续结构是指任何能够实现吸收或捕获杂质原子的结构或处理结果,例如,可以是对扩散障碍层上表面进行电浆处理使产生许多凹陷,增加其表面粗糙度,用以捕捉杂质原子,也可以是低密度多孔性构造的杂质原子收集层。According to the technical solution of the present invention, a multilayer diffusion barrier layer structure of a low-temperature polysilicon thin film transistor is firstly provided, the structure is formed between the insulating substrate and the polysilicon film of the thin film transistor, and includes at least two diffusion barrier layers, Moreover, a discontinuous structure is provided between each diffusion barrier layer, so as to achieve the purpose of effectively blocking impurity diffusion. According to the present invention, the discontinuous structure between the diffusion barrier layers refers to any structure or treatment result that can absorb or trap impurity atoms, for example, it may be that plasma treatment is performed on the upper surface of the diffusion barrier layer to produce many depressions , to increase its surface roughness to capture impurity atoms, and it can also be a low-density porous structure for collecting impurity atoms.
根据本发明的优选方案,所提供的低温多晶矽薄膜晶体管的多层次扩散障碍层形成于该薄膜晶体管的绝缘基板与多晶矽膜之间,并包括第一扩散障碍层以及第二扩散障碍层,其中,该第一扩散障碍层形成于该绝缘基板上表面,并经电浆处理过以增加其粗糙度;而该第二扩散障碍层形成在该第一扩散障碍层上表面。第二扩散障碍层可以由SiNx、SiOx和SiOxNy的材质所构成。According to a preferred solution of the present invention, the multi-level diffusion barrier layer of the provided low-temperature polysilicon thin film transistor is formed between the insulating substrate of the thin film transistor and the polysilicon film, and includes a first diffusion barrier layer and a second diffusion barrier layer, wherein, The first diffusion barrier layer is formed on the upper surface of the insulating substrate, and is treated with plasma to increase its roughness; and the second diffusion barrier layer is formed on the upper surface of the first diffusion barrier layer. The second diffusion barrier layer can be made of SiNx, SiOx and SiOxNy.
本发明还提供了该低温多晶矽薄膜晶体管的多层次扩散障碍层的另一个优选实施方案。该多层次扩散障碍层结构形成于该薄膜晶体管的绝缘基板与多晶矽膜之间,包括第一扩散障碍层、第一杂质原子收集层以及第二扩散障碍层。其中,该第一扩散障碍层形成于该绝缘基板上表面;该第一杂质原子收集层形成于该第一扩散障碍层上表面,且为低密度多孔性构造;而该第二扩散障碍层是在该第一杂质原子收集层上表面形成的。The present invention also provides another preferred embodiment of the multi-level diffusion barrier layer of the low temperature polysilicon thin film transistor. The multi-level diffusion barrier layer structure is formed between the insulating substrate of the thin film transistor and the polysilicon film, including a first diffusion barrier layer, a first impurity atom collection layer and a second diffusion barrier layer. Wherein, the first diffusion barrier layer is formed on the upper surface of the insulating substrate; the first impurity atom collection layer is formed on the upper surface of the first diffusion barrier layer, and is a low-density porous structure; and the second diffusion barrier layer is formed on the upper surface of the first impurity atom collection layer.
根据本发明的另一方面,是提供上述低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层提高多层次扩散障碍层阻挡杂质扩散的效果的制造方法,包括:在绝缘基板上表面形成第一扩散障碍层;对该第一扩散障碍层进行电浆处理,使该第一扩散障碍层的表面产生凹陷;以及在该第一扩散障碍层上表面形成第二扩散障碍层。According to another aspect of the present invention, it is to provide a method for manufacturing the multi-level diffusion barrier layer of the above-mentioned low-temperature polysilicon (LTPS) thin film transistor liquid crystal display to improve the effect of the multi-level diffusion barrier layer blocking the diffusion of impurities, including: forming a first layer on the upper surface of the insulating substrate A diffusion barrier layer; performing plasma treatment on the first diffusion barrier layer to cause depressions on the surface of the first diffusion barrier layer; and forming a second diffusion barrier layer on the upper surface of the first diffusion barrier layer.
根据本发明提供的另一种低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层结构的制造方法,包括:在二层扩散障碍层之间生成低密度多孔性(porous)杂质原子收集层,同样达到提高该扩散障碍层阻挡杂质扩散的效果。According to the manufacturing method of another low-temperature polysilicon (LTPS) thin film transistor liquid crystal display multi-level diffusion barrier layer structure provided by the present invention, comprising: generating a low-density porous (porous) impurity atom collection layer between the two diffusion barrier layers , also achieve the effect of improving the diffusion barrier layer blocking impurity diffusion.
附图说明Description of drawings
图1为本发明的一种低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层结构剖面图;Fig. 1 is a kind of low temperature polysilicon (LTPS) thin film transistor liquid crystal display of the present invention multi-level diffusion barrier layer structural sectional view;
图2为具有图1结构的杂质浓度分布图;Fig. 2 is the impurity concentration distribution diagram having the structure of Fig. 1;
图3为另一种低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层结构剖面图。FIG. 3 is a cross-sectional view of another low-temperature polysilicon (LTPS) thin film transistor liquid crystal display with a multi-level diffusion barrier layer structure.
附图中的标记说明:Explanation of the marks in the attached drawings:
1——绝缘基板1——insulating substrate
2——第一扩散障碍层2——The first diffusion barrier layer
3——第二扩散障碍层3—Second Diffusion Barrier Layer
4——多晶矽膜层4——Polysilicon film layer
5——杂质原子5 - impurity atoms
2’——第一扩散障碍层的上表面2' - the upper surface of the first diffusion barrier layer
6——杂质原子收集层6——Impurity atom collection layer
具体实施方式Detailed ways
以下结合附图及实施方案的详细描述来说明本发明的技术内容和诸多优点,但不能构成对本发明的限定。The technical content and many advantages of the present invention will be described below in conjunction with the detailed description of the accompanying drawings and embodiments, but they cannot be construed as limiting the present invention.
参见图1,该图为本发明的低温多晶矽(LTPS)薄膜晶体管液晶显示器的多层次扩散障碍层结构的优选实施方式的剖面示意图,以具有两层结构的扩散障碍层为例,来详细说明本发明。Referring to Fig. 1, this figure is the cross-sectional schematic diagram of the preferred embodiment of the multi-level diffusion barrier layer structure of the low-temperature polysilicon (LTPS) thin film transistor liquid crystal display of the present invention, taking the diffusion barrier layer with two-layer structure as an example, describe this in detail invention.
首先,如图1所示,在透光绝缘基板1上,以化学气相沉积法(CDV)或溅镀法(sputtering)沉积第一扩散障碍层2。一般而言,此透光绝缘基板1可由玻璃、石英或类似材质来构成。该第一扩散障碍层2可以由SiNX、SiOX或SiOXNY等材质所构成。First, as shown in FIG. 1 , on a light-transmitting
然后,对该第一扩散障碍层2进行腐蚀性电浆处理(可使用NF3或SF6的气体)以增加该第一扩散障碍层2的粗糙度,并在该第一扩散障碍层2的上表面2’上产生许多凹陷,这些凹陷会捕捉从绝缘基板1因后续受热扩散而来的杂质原子5,使其不再继续向上扩散,从而能有效阻挡杂质防止其扩散至该多晶矽薄膜晶体管的多晶矽膜层4。接着,再沉积第二扩散障碍层3。如此即形成了具有两层结构的该多层次扩散障碍层。之后,再沉积非晶矽膜层,并以准分子雷射退火技术使该非晶矽膜层转变成多晶矽其间的杂质浓度分布如图2所示,杂质原子将累积在该第一扩散障碍层与该第二扩散障碍层之间的界面上。若该多层次扩散障碍层具有两层以上,则可视实际需要,在该多层次扩散障碍层的其他层之间,重复上述电浆处理步骤,以达成所需的阻挡效果。Then, the first
本发明的另一实施方式,如图3所示,在第一扩散障碍层2与第二扩散障碍层3之间生成一层低密度多孔性(porous)杂质原子收集层6,例如低密度的SiOX膜层。此杂质原子收集层6提供了可捕捉杂质原子的环境,因为其本身构造疏松并且有许多空间可供杂质原子停留。In another embodiment of the present invention, as shown in FIG. 3 , between the first
可藉由调整制程参数来形成杂质原子收集层6,例如,若需形成低密度的SiOX膜层,可调整反应物SiN4与N2O的比例,或是反应物四乙基邻矽酸酯(TEOS,即Tetra-Ethyl-ortho-Silicate)与O2或O3的比例。通常,SiN4的含量越大,SiOX膜层的多孔性质越增加;而氧含量越小,SiOX膜层的密度越小。同样地,若上述多层次扩散障碍层具有两层以上,则可视实际需要,在该多层次扩散障碍层的其他层之间形成其他杂质原子收集层,以达成所需的阻挡效果。The impurity
从以上所述可以看出,通过本发明所制造的多层次扩散障碍层结构,不但能有效提高扩散障碍层阻挡杂质扩散的效果,而且不会产生如现有技术出现的副作用。From the above, it can be seen that the multi-level diffusion barrier layer structure manufactured by the present invention can not only effectively improve the effect of the diffusion barrier layer in blocking impurity diffusion, but also not produce side effects as in the prior art.
以上描述了本发明优选实施方式,然其并非用以限定本发明。本领域技术人员对在此公开的实施方案可进行并不偏离本发明范畴和精神的改进和变化。The preferred embodiments of the present invention have been described above, but they are not intended to limit the present invention. Modifications and changes to the embodiments disclosed herein may be made by those skilled in the art without departing from the scope and spirit of the invention.
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CN107919270A (en) * | 2017-11-03 | 2018-04-17 | 惠科股份有限公司 | Method for manufacturing low-temperature polycrystalline silicon thin film and transistor |
US11205712B2 (en) | 2017-11-03 | 2021-12-21 | HKC Corporation Limited | Methods of manufacturing low-temperature polysilicon thin film and transistor |
US11309407B2 (en) | 2017-11-03 | 2022-04-19 | HKC Corporation Limited | Methods of manufacturing low-temperature polysilicon thin film and transistor |
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JP2000091584A (en) * | 1998-09-08 | 2000-03-31 | Matsushita Electric Ind Co Ltd | Thin film transistor |
JP2001217428A (en) * | 2000-01-25 | 2001-08-10 | Samsung Electronics Co Ltd | Low temperature polycrystalline silicon thin film transistor and method of manufacturing the same |
CN1388571A (en) * | 2001-05-24 | 2003-01-01 | 矽统科技股份有限公司 | Etching Process of Dielectric Layer |
-
2003
- 2003-03-11 CN CNB031197701A patent/CN100339756C/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000091584A (en) * | 1998-09-08 | 2000-03-31 | Matsushita Electric Ind Co Ltd | Thin film transistor |
JP2001217428A (en) * | 2000-01-25 | 2001-08-10 | Samsung Electronics Co Ltd | Low temperature polycrystalline silicon thin film transistor and method of manufacturing the same |
CN1388571A (en) * | 2001-05-24 | 2003-01-01 | 矽统科技股份有限公司 | Etching Process of Dielectric Layer |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107919270A (en) * | 2017-11-03 | 2018-04-17 | 惠科股份有限公司 | Method for manufacturing low-temperature polycrystalline silicon thin film and transistor |
US11205712B2 (en) | 2017-11-03 | 2021-12-21 | HKC Corporation Limited | Methods of manufacturing low-temperature polysilicon thin film and transistor |
US11309407B2 (en) | 2017-11-03 | 2022-04-19 | HKC Corporation Limited | Methods of manufacturing low-temperature polysilicon thin film and transistor |
Also Published As
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CN1530719A (en) | 2004-09-22 |
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