CH646289A5 - CIRCUIT TO RELEASE A MICRO PROCESSOR. - Google Patents

Description

The invention has for its object to provide a reset circuit of the type mentioned, in which not only the failure and return of the supply voltage, but also any disturbance in the normal course of the program of the microprocessor or the supply voltage drops below the level where the functioning of the nP is disturbed, a signal which triggers the reset is generated. This should serve as a reset signal for the initialization of the microprocessor when the supply voltage is switched on again. The duration of the reset signal after switching on the supply voltage should be selectable.

The invention is defined in claim 1. Further advantageous embodiments are specified in the remaining claims.

The invention is explained for example with the aid of a drawing.

Show it:

Figure 1 is a block diagram for a reset circuit of a microprocessor.

Fig. 2 shows a detailed circuit for the circuit of FIG. 1 and

Fig. 3 voltage / time diagrams.

The block circuit according to FIG. 1 shows an oscillator circuit 2 which can be influenced by a monitoring circuit 1 and which contains a capacitor 3 and which can cause a microprocessor (not shown) to be reset. The monitoring circuit 1 is controlled during normal program execution in the microprocessor by rectangular pulses UE generated by it. In this case, the monitoring circuit 1 generates voltages which influence the periodically changing charge of the capacitor 3 in the oscillator circuit 2 which oscillates freely after reaching an adjustable threshold and thereby suppress the generation of a reset signal R = L at its output. On the other hand, when the supply voltage is switched on and off and the rectangular pulses UE of the microprocessor fail to appear, a reset signal R = L is generated by the oscillator circuit 2 before the microprocessor resumes its normal activity.

2 shows a detailed circuit for generating the reset signal R = L, which shows the individual parts of the monitoring circuit 1 and the oscillator circuit 2. The monitoring circuit 1 consists of a capacitor 4 connected to the input, a resistor 5 and a diode 6. The resistor is on the one hand with the connection point between the capacitor 4 and the diode 6 and on the other hand with the line for the supply

voltage Vcc connected. The line connected to the anode of the diode 6 is connected to the input of the oscillator circuit 2.

The oscillator circuit 2 contains a semiconductor element in the form of a comparator 7 with an “open collector” output, the output line 8 of which can output the reset signal R = L. A voltage divider formed by resistors 9 and 10 between the voltage supply line Vcc and the zero line 0 is connected to a non-inverting + input of the comparator 7. An inverting input of the comparator 7 is connected to the connection point 11 of a resistor 12 connected to the diode 6 with the capacitor 3 connected on one side to the voltage supply line Vcc and a further resistor 13 connected to the output of the comparator 7. Another resistor 14 connects the non-inverting + input to the output of the comparator 7. Finally, a resistor 15 is connected between the output of the comparator 7 and the line for the supply voltage VCc.

The function of the circuits according to FIGS. 1 and 2 is explained in more detail below with reference to the diagrams according to FIG. 3. The comparator 7 forms an astable multivibrator with its switching elements. Its repetition frequency is determined by the time constant x of, for example, 30 ms of the capacitor 3 and essentially by the resistor 13 and the threshold voltage Us. The oscillator 2 oscillates when the supply voltage VCc is switched on as soon as the voltage U between the zero line 0 and the connection point 11 connected to the capacitor 3 to the inverting input of the comparator 7 exceeds a certain limit value. As a result, the charge on the capacitor 3 is changed continuously. As long as the oscillator circuit 2 oscillates undisturbed, a signal R = H is continuously present at the output of the comparator 7. When the microprocessor is working undisturbed, after the normal duration of the reset signal R = L, the microprocessor generates a square-wave voltage UE with a repetition frequency that is a multiple of that of the oscillator circuit 2. The square-wave pulses UE fed to the input of the monitoring circuit 1 generate an output signal in the latter, which prevents the output of a reset signal R = L in the oscillator circuit 2. Different states can be distinguished, as will be explained below with reference to the three phases A, B and C of FIG. 3.

When the supply voltage Vcc is switched on, the voltage U] at the connection point 11 of the capacitor 3 with the inverting - input of the comparator 7 and the threshold voltage Us at the non-inverting + input increase in phase A. The reset line 8 remains deep during this phase. As soon as the voltage U [falls below the voltage Us, the oscillations of the oscillator circuit 2 start, by means of which the capacitor 3 periodically changes its charge. The reset signal R = L appears at the output of the comparator 7 with a duration of 30 ms, for example. After the undisturbed oscillation of the clock voltages of the microprocessor has started, the microprocessor begins to work, which is caused by the appearance of the rectangular pulses UE at its

646 289

monitoring circuit 1 connected output is displayed. These are differentiated by the capacitor 4 in the monitoring circuit 1, rectified by the diode 6 and they generate at the output of the correspondingly polarized diode 6 voltages that the AC voltages U! interfere at the capacitor 3 of the oscillating comparator. As a result, the capacitor 3 is charged by a certain amount with each input pulse UE. As a result, a sufficiently high voltage U is no longer achieved by the comparator 7 for the generation of the reset signal R = L, as long as the undisturbed program sequence of the microprocessor is ensured. During this period, the threshold voltage Us is increased by a small additional amount via the voltage Uj.

If the supply voltage Vcc drops briefly below a critical value at the beginning of phase B in FIG. 3, the acknowledgment signals from the microprocessor are absent. As a result, the comparator 7 generates the reset signal R = L, which is maintained for the duration x = 30 ms. This locks the microprocessor. If, in the meantime, the supply voltage VCc has risen again to the normal value, the microprocessor is released again after the duration x = 30 ms by the disappearance of the reset signal R = L. If the program runs correctly, it generates the square-wave signals UE at its output. The signals from the monitoring circuit 1 periodically lower the voltage Uj and the threshold voltage Us is increased to such an extent that the generation of the reset signal R = L by the comparator 7 is prevented.

If, on the other hand, the voltage interruption lasts longer, all circuits including the microprocessor are shut down and the capacitor 3 discharges completely in a short time. After the return of the supply voltage Vcc, there is a new reset as at the beginning of phase A and then the normal execution of the program of the microprocessor.

In the event of a fault in the program flow of the microprocessor, according to phase C of FIG. 3, the voltage U! at the capacitor 3 via the threshold voltage Us. The comparator 7 thus triggers the reset signal R = L, which continues as long as the fault in the microprocessor persists. After their end after phase C, the square-wave pulses UE reappear, the voltage Ui is lowered below the threshold voltage Us and the generation of the reset signal R = L is suppressed by the comparator 7 until the next disturbance.

1 and 2 thus enable a reset signal "Et = L to be generated for the connected microprocessor each time the supply voltage Vcc is switched on and disappears below a certain value and every time the microprocessor runs the program. The reset signal R = L is long enough so that the clock voltage in the microprocessor can start to flawlessly and its program run after this period.

3rd

5

10th

15

20th

25th

30th

35

40

45

50

55

c

1 sheet of drawings

Claims (6)

646289 PATENT CLAIMS 1. Circuit for triggering the reset of a microprocessor, in which the reset is triggered by the charging of a capacitor, characterized in that the charge in the capacitor (3) is changed periodically when a supply voltage (Vcc) is reached after a limit value has been reached, and thereby a reset signal (R) of a certain duration (x) is generated and that after the duration (x) the reset signal (R) is suppressed by a voltage counteracting the charging of the capacitor (3) as long as there is no disturbance in the supply voltage (Vcc) or normal Program flow of the microprocessor occurs. 2. Circuit according to claim 1, characterized in that it comprises a monitoring circuit (1) and an oscillator circuit (2) containing the capacitor (3). 3. Circuit according to claim 2 for a micro-processor, which emits rectangular pulses (UE) when the program is running normally, characterized in that the monitoring circuit (1) is generated by the rectangular pulses generated by the microprocessor during the normal running of the program (UE) is controlled and that this circuit emits pulses generated at its output by differentiation and rectification of these rectangular pulses (UE). 4. Circuit according to claim 2, characterized in that the capacitor (3) in the oscillator circuit (2) is part of a comparator (7) containing circuit of an astable multivibrator and that the periodic charging of this capacitor (3) counteracting voltage at the output the monitoring circuit (1) is removed. 5. Circuit according to claim 4, characterized in that a threshold voltage (Us) for the comparator (7) is generated by a voltage divider from two resistors (9, 10) between the lines for the voltage supply and the connection point between the resistors (9, 10) is connected to a non-inverting (+) input of the comparator (7). 6. Circuit according to claim 5, characterized in that the repetition frequency of the oscillations of the oscillator circuit (2) and the duration of the reset signal (R) by the time constant of an inverting (-) input of the comparator (7) connected and one-sided to the line with the supply voltage (VCc) connected capacitor (3) and essentially by a resistor connected to this (13) and the threshold voltage (Us) is determined. 25th 35 45 50 As is known, microprocessors have to be reset during commissioning and every time the supply voltage is switched on, in order to put their central unit in a defined initial state. This is particularly important for fully autonomous devices that are difficult to access. For this purpose, the microprocessors have a reset input, in which the reset process can be initiated by an input signal with a suitable level 60. A circuit according to the preamble of claim 1 is already known from the magazine ELEKTRONIK 1979, issue 24, page 76, in which the only weakly screened supply voltage is tapped off before the stabilizing means of a resistor and is transferred to a capacitor. When the supply voltage is switched on, a first transistor responds and switches a third 65 Transistor through, which in turn generates the reset signal. When the supply voltage drops below an adjustable level, a second transistor is turned on, which turns on the third transistor, so that the central processing unit of the microprocessor can be reset before the control inputs of the memories can change. Micro-processors are also optionally available, which are reset when the supply voltage falls below the normal value or when they return. However, this is dangerous in many cases, especially if a reset occurs with only a slight drop in the supply voltage below the tripping threshold, thereby interrupting or even making important functions of the controls impossible. Finally, it is also known in mini-computers to generate a reset signal if a signal generated by a "watch dog" ("watchdog") circuit is not acknowledged. The high effort required for this purpose is out of the question for microprocessors.