CA936624A - Method of making an integrated circuit - Google Patents
Method of making an integrated circuitInfo
- Publication number
- CA936624A CA936624A CA118326A CA118326A CA936624A CA 936624 A CA936624 A CA 936624A CA 118326 A CA118326 A CA 118326A CA 118326 A CA118326 A CA 118326A CA 936624 A CA936624 A CA 936624A
- Authority
- CA
- Canada
- Prior art keywords
- making
- integrated circuit
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
- H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP45062437A JPS50278B1 (en) | 1970-07-16 | 1970-07-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA936624A true CA936624A (en) | 1973-11-06 |
Family
ID=13200155
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA118326A Expired CA936624A (en) | 1970-07-16 | 1971-07-15 | Method of making an integrated circuit |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPS50278B1 (en) |
CA (1) | CA936624A (en) |
GB (1) | GB1309502A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2543739B1 (en) * | 1983-03-30 | 1986-04-18 | Radiotechnique Compelec | METHOD FOR PRODUCING A HIGH VOLTAGE BIPOLAR TRANSISTOR |
CN118091384B (en) * | 2024-04-29 | 2024-08-20 | 杭州广立微电子股份有限公司 | SDB isolation test structure generation method, SDB isolation test structure and storage medium |
-
1970
- 1970-07-16 JP JP45062437A patent/JPS50278B1/ja active Pending
-
1971
- 1971-07-15 GB GB3321971A patent/GB1309502A/en not_active Expired
- 1971-07-15 CA CA118326A patent/CA936624A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB1309502A (en) | 1973-03-14 |
JPS50278B1 (en) | 1975-01-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA926034A (en) | Method of manufacturing thick-film hybrid integrated circuits | |
CA920721A (en) | Method of making thermo-compression-bonded semiconductor device | |
CA934456A (en) | Encapsulating of electronic components | |
CA978661A (en) | Method of manufacturing an mos integrated circuit | |
CA932074A (en) | Manufacture of printed circuits | |
CA949300A (en) | Printed circuit armature and method of making | |
CA929674A (en) | Manufacture of printed circuits | |
CA953822A (en) | Circuit board and method of making the same | |
CA965881A (en) | Method of integrated circuit fabrication | |
CA936624A (en) | Method of making an integrated circuit | |
CA832196A (en) | Method of manufacture of an integrated circuit | |
CA952127A (en) | Method of making alpha-omega-diiodoperfluoroalkanes | |
CA858137A (en) | Printed circuit structure and method of making same | |
AU449030B2 (en) | Method of producing an integrated solid-state circuit | |
CA847548A (en) | Method of making printed circuit | |
AU2301470A (en) | Method of producing an integrated solid-state circuit | |
CA831687A (en) | Integrated circuit and method of making the same | |
CA836788A (en) | Integrated circuit structure and method of making the same | |
CA957071A (en) | Method of altering circuit element characteristics | |
CA955690A (en) | Integrated circuit and method of manufacturing same | |
CA858138A (en) | Methods of manufacturing electrical circuits | |
CA891175A (en) | Method of making integrated circuits | |
CA859343A (en) | Method of producing printed circuits | |
CA805848A (en) | Method of making large scale integrated circuit | |
CA937338A (en) | Circuit board and method of making |