CA929675A - Fabrication of beam leads - Google Patents
Fabrication of beam leadsInfo
- Publication number
- CA929675A CA929675A CA929675A CA929675DA CA929675A CA 929675 A CA929675 A CA 929675A CA 929675 A CA929675 A CA 929675A CA 929675D A CA929675D A CA 929675DA CA 929675 A CA929675 A CA 929675A
- Authority
- CA
- Canada
- Prior art keywords
- fabrication
- beam leads
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
- H01L23/4822—Beam leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA134841 | 1972-02-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA929675A true CA929675A (en) | 1973-07-03 |
Family
ID=4092355
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA929675A Expired CA929675A (en) | 1972-02-16 | 1972-02-16 | Fabrication of beam leads |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS4895180A (en) |
CA (1) | CA929675A (en) |
DE (1) | DE2307021A1 (en) |
FR (1) | FR2172242A1 (en) |
NL (1) | NL7215385A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2352468A1 (en) * | 1976-05-17 | 1977-12-16 | Philips Nv | ELEMENTARY PLATE EQUIPPED WITH A MICRO-CIRCUIT AND ELECTROLYTICALLY SHAPED WELDING SPHERULES, AND PROCESS FOR THE MANUFACTURE OF THIS PLATE |
FR2388064A1 (en) * | 1977-04-18 | 1978-11-17 | Philips Nv | PROCESS FOR REINFORCING BY GALVANIC A BASIC CONDUCTIVE PATTERN AND DEVICE OBTAINED BY THIS PROCEDURE |
-
1972
- 1972-02-16 CA CA929675A patent/CA929675A/en not_active Expired
- 1972-11-09 JP JP11169872A patent/JPS4895180A/ja active Pending
- 1972-11-14 NL NL7215385A patent/NL7215385A/xx unknown
-
1973
- 1973-02-13 DE DE19732307021 patent/DE2307021A1/en active Pending
- 1973-02-14 FR FR7305222A patent/FR2172242A1/fr not_active Withdrawn
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2352468A1 (en) * | 1976-05-17 | 1977-12-16 | Philips Nv | ELEMENTARY PLATE EQUIPPED WITH A MICRO-CIRCUIT AND ELECTROLYTICALLY SHAPED WELDING SPHERULES, AND PROCESS FOR THE MANUFACTURE OF THIS PLATE |
FR2388064A1 (en) * | 1977-04-18 | 1978-11-17 | Philips Nv | PROCESS FOR REINFORCING BY GALVANIC A BASIC CONDUCTIVE PATTERN AND DEVICE OBTAINED BY THIS PROCEDURE |
Also Published As
Publication number | Publication date |
---|---|
NL7215385A (en) | 1973-08-20 |
DE2307021A1 (en) | 1973-09-13 |
FR2172242A1 (en) | 1973-09-28 |
JPS4895180A (en) | 1973-12-06 |
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