CA2241684A1 - Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating same - Google Patents
Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating sameInfo
- Publication number
- CA2241684A1 CA2241684A1 CA002241684A CA2241684A CA2241684A1 CA 2241684 A1 CA2241684 A1 CA 2241684A1 CA 002241684 A CA002241684 A CA 002241684A CA 2241684 A CA2241684 A CA 2241684A CA 2241684 A1 CA2241684 A1 CA 2241684A1
- Authority
- CA
- Canada
- Prior art keywords
- region
- drain
- channel
- source
- drain field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0278—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline channels on wafers after forming insulating device isolations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/637—Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
A Fermi-FET includes a drain field termination region between the source and drain regions, to reduce and preferably prevent injection of carriers from the source region into the channel as.a result of drain bias.
The drain field terminating region prevents excessive drain induced barrier lowering while still allowing low vertical field in the channel. The drain field terminating region is preferably embodied by a buried counterdoped layer between the source and drain regions, extending beneath the substrate surface from the source region to the drain region. The buried counterdoped layer may be formed using a three tub structure which produces three layers between the spaced apart source and drain regions. The drain field terminating region may also be used in a conventional MOSFET. The channel region is preferably formed by epitaxial deposition, so that the channel region need not be counterdoped relative to the drain field terminating region. Higher carrier mobility in the channel may thereby be obtained for a given doping level.
The drain field terminating region prevents excessive drain induced barrier lowering while still allowing low vertical field in the channel. The drain field terminating region is preferably embodied by a buried counterdoped layer between the source and drain regions, extending beneath the substrate surface from the source region to the drain region. The buried counterdoped layer may be formed using a three tub structure which produces three layers between the spaced apart source and drain regions. The drain field terminating region may also be used in a conventional MOSFET. The channel region is preferably formed by epitaxial deposition, so that the channel region need not be counterdoped relative to the drain field terminating region. Higher carrier mobility in the channel may thereby be obtained for a given doping level.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/597,711 US5698884A (en) | 1996-02-07 | 1996-02-07 | Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating same |
US08/597,711 | 1996-02-07 | ||
PCT/US1997/002108 WO1997029519A1 (en) | 1996-02-07 | 1997-02-04 | Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating same |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2241684A1 true CA2241684A1 (en) | 1997-08-14 |
CA2241684C CA2241684C (en) | 2006-08-01 |
Family
ID=36764337
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002241684A Expired - Fee Related CA2241684C (en) | 1996-02-07 | 1997-02-04 | Short channel fermi-threshold field effect transistors including drain field termination region and methods of fabricating same |
Country Status (1)
Country | Link |
---|---|
CA (1) | CA2241684C (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109936355A (en) * | 2018-02-28 | 2019-06-25 | 恩智浦美国有限公司 | RF switches, integrated circuits and devices, and methods of making the same |
-
1997
- 1997-02-04 CA CA002241684A patent/CA2241684C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109936355A (en) * | 2018-02-28 | 2019-06-25 | 恩智浦美国有限公司 | RF switches, integrated circuits and devices, and methods of making the same |
CN109936355B (en) * | 2018-02-28 | 2023-04-25 | 恩智浦美国有限公司 | RF switch, integrated circuit and device and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
CA2241684C (en) | 2006-08-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |