CA1155981A - Data transmission system - Google Patents

Abstract

DATA TRANSMISSION SYSTEM

ABSTRACT OF THE DISCLOSURE

A system for the transmission of data in which the transmitting station transmits in the form of batches numerical data originating from several channels. The batches from the different channels are time multiplexed and each batch includes a prefix containing, apart from standard synchronization and channel identification code signals, a batch format signal indicating the length of the sequence of the data which follows the prefix. The transmitting station includes as many couplers as channels, each coupler including an input circuit whose input is connected to the output of the channel associated with the coupler and whose output is connected to the input of a data memory whose output can be connected to a multiplexing circuit under control of a control circuit common to all the couplers, and a counter fed at a predetermined rate. An inhibition signal for the input circuit is given, either as soon as the memory is full, or as soon as the counter has reached a predetermined number. The format signal in the prefix has the value of the contents of the memory at the moment in time of the inhibition signal, after which the memory can be connected, via the control circuit, to the multiplexing circuit when the latter is free.
The memory is then emptied, the counter cleared and the inhibition signal cancelled. The transmitting station includes a register arranged to count the data introduced into the data memory, the register having an adjustable maximum capacity depending on the standard of the broadcasting network over which the data is transmitted, the register initiating the inhibition signal of the input circuit when the level of the data reaches the maximum capacity.

Description

03 The present invention relates to modifications, changes 04 and impro~ements to the unidireckional data transmission system 05 described in the French Patent Application No. 75 18319 filed on 06 6th June 1975 in the names of Etablissement Public de Diffusion 07 dit: "Telediffusion de France"; Etat Francais, represente par le 08 Secretaire d'Etat aux Postes et Telecommunications (Centre 09 ~ational d'Etudes des Telecommunications) and, in particular, to such a system using the Hertzian infrastructures of standard 11 television systems.

13 In the system for the unidirectinal transmission or 14 data broadcasting of the above mentioned patent application, ~he data transmitted is arranged in batches, each batch having, at 16 the most, the active duration of one line of a teleYision 17 picture. The batches are inserted either in place of the picture 18 signals, or in the frame return lines, between the standard 19 television line synchronization signals.
21 In transmission systems of this kind, available before 22 that described in the patent application mentioned above, the 23 data relative to the text appearing on the screen of the receiver 24 is placed in the active duration of each line and, in order to reduce the number of page arrangement facilities the positioning 26 of data in the said active duration is made to correspond 27 reciprocally with its positioning on the line of writing 28 appearing on the screen of the televsion set. ~part from the 29 constraints imposed by these provisions with regard to the page arrangement of the documents to be transmitted, as the data is 31 used immediately a~ter reception, a close connection exists , ' .. ~

_ 2 ~ $ ~

between the space occupied by one character on its line of writing and the period of time occupied by the corresponding data contained in its period o~ time of the said active duration of the line transmitted. ~or a gi~en modulation standard, such as for ex~mple9 "non-clearing"
modulation, this involves a bit frequency in direct relation to the number of characters per line of writin~.
If this number, which depends on the clarity of the characters on the screen of the television set~ forms the subject of a standard~ the bit frequency becomes flxed, without any relation to the standard adopted for the braodcasting of television signals, and may even be incompatible with the bandwidth assigned to the television transmitters of the system. It is known in ~nother connec-tion that the ~tandard bandwidths in different countries are effectively very different, varying fronl 6.o M~lz in France to 4.2 Mliz in the United States, which indicates that the above-mentioned incornpatability may be encountered in practice.

An object of the present invention consists in providin~ a data broadcasting system in which simple methods allow -this incompatability to be overcome in every case.

Another object of the pre~ent lnvention consists in providing such a system which derives with simple modifi-cations from the system described in ~rench Patent 03 Application No. 75 18319 mentioned above.

05 Moreover, in French Patent Application ~o. 76 27212 06 ~iled on 6th September 1976 in the joint names of the 07 Etahlissement Public de Di-Efusion, called "Telediffusion de 08 France", Mlle. Le Le Marouille and Mo Fournier~ a system for the 09 ~ransmission and display oE texts on a television screen is described in which a transl~itting station broadcasts batches of 11 data which originate from several channels and which are time 12 multiplexed, the total number of batches from one channel 13 constituting a magazine formed from several pages, the data of 14 one page beginning with a page symbol and the data on each page being grouped into rows (or page lines~, the data in each row 16 being preceded by a row symbol, followed by the number of the 17 row, and followed by a row symbolO The number of the row 18 detected after each row symbol defines the address at which the 19 data in the row must be stored in a memory. In published French Patent Application No. 76 29034, filecl on 22nd September 1976 in 21 the joint names oE Etablissement Public de Diffusion dit:
22 "TeledifEusion de France"; Etat Francais, represente par le 23 Secretaire d'Etat aux Postes et Telecommunications (Centre 24 National d'Etudes des Telecommunications), there is described a system for the display of the data in the rows stored in the 26 memory mentioned above using a character generator feeding the 27 television screen of a visual display unit.

29 It must be understood that, by using a row symbol Eor each row, it becomes possible to broadcast batches of data in a 31 scanning line without the latter having to correspond to the 32 number of the row in which this data is displayed.

': ' , , 01 ~ 4 03 Another object of the present invention consists in 04 providing a system for data broadcasting which uses the ~05 possibility indicated above, but in which the means necessary to 06 pass from a television channel of one standard to another channel 07 of another standard are provided.

~09 In the data broadcasting system of the Etablissement Public de Difusion dit: "Telediffusion de France"; Etat 11 Francais, represente par le Secretaire d'Etat aux Postes et 12 Telecommunications ~Centre National d'Etudes des ~13 Telecommunications) patent application 75 1~319 referred to below 14 as the main patent application, the broadcasting station broadcasts, in the form of batches, digital data originating from ~16 several channels, batches from the different channels being time 17 multiplexed. Each batch includes a prefix containing, in 13 addition to the standard synchronization signals and channel ~19 identification codes, a batch format signal indicating the length ~20 of the series of data which follows the prefix. The broadcasting ~21 station includes as many couplers as there are channels. Each 22 coupler includes an input circuit whose input is connected to the 23 output of the channel associated with the coupler and whose ~;24 output is connected to the input of a data memory whose output ; 25 may be connected to a multiplexing circuit under the control of a - 26 control circuit common to all of the couplers. Each coupler ~27 includes in addition a counter fed at a predetermined rate~ The 28 inhibition signal of the input circuit is given either as soon as 29 the memory is full, or as soon as the counter has reached a pre-determined count, the format signal introduced in the batch ~31 prefix having the value of the content of the memory at the moment ~32 of the inhibition signal. When the multiplexing circuit is free, ~,~.

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the control circuit may th~n connect the me~ory to the multiplexing circuit. Th~ memory is then emptied, the counter is cleared and the inhibition sig~al is cancelled.
The predete~mined rate of the counter is determined depending on the operating speed of the receiving equipmentO

I~ the receiving equipment, the signals which follow the prefix, when the said equipment accepts lt, are sent to a buffer memory whose output is connected to an output circuit. The receiving equipment includes1 in addition, a format signal register storlng the format signal of the prefi~ of each batch received and a register fed by a clock signal at the bit frequency of the data, which9 when it has reached its maximum count, causes the first input data series in the said buffer ~emory to be emptied towards the said output circuit, the length of this series being determined by the value registered in the format register, the following signals being unused.

According to a characteristic of the present invention, -~
a register counting the data introduced into the data memory is provided at the broadcastin~ station, thc said register having an adjustable maximum capacity which is a function of the standard of the telediffu~ion network throllgh which the data is broadcast, the said register initiating the said inhibition sig~nal o~ the said input circuit when thc count of the said data reaches the said maximum capacity~

~1~9 02 According to another characteristic, the counter of the 03 receiving equipment fed by the clock signal at the bit rate has 04 an adjustable ma~imum capacity, equal to that of the register of 05 the broadcasting station, the regulation of the said maximum 06 capacity being carried out directly by the television channel 07 switch.

09 According to another characteristic, the bit rate recovery circuit of the receiving equipment includes a tuned 11 circuit incorporating an adjustable impedance component whose 12 value is directly regulated by the position of the television 13 channel switch.
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According to another characteristic, the said 16 adjustable impedance component is a varicap.

18 The invention according to its preferred embodiment is 19 a system for broadcasting sets o digital data through a television broadcasting network having transmission standards 21 which are set by a regulatory agencyO The system is comprised oE
22 a plurality of sources of the digital data, each set of the 23 digital data comprising a prefix, synchronism signals which are 24 conventional for the TV network used to broadcast the digital data, an identiEication signal of the pertinen' source of the 26 data, and a size signal identifying the length of the data signal 27 which follows the prefix. A memory and a coupling apparatus are 28 individually associated with each source of data for transferring 29 data from the associated source to the memory. Apparatus governing the coupling assembles data from the source. Counter 31 circuitry operates at a predetermined clock rate selectively 32 inhibiting the coupling apparatus responsive to either a 33 predetermined count fixed by the size signal or a full count 34 fixed by the capacity of the counter apparatus. Apparatus responsive to the inhibitation by the counter apparatus enables 36 the memory to transfer its stored data to the data bus, the data 37 bus combining the assembled data. A first register circuit 01 ~ 6a -03 controls data introduced into the memory, the register having a 04 maximum capacity which is a function of the transmission 05 standards of the network. Circuitry responsive to the register 06 controls the inhibition by the counter apparatus. Accordingly 07 the data-broadcasting system is coordinated with the transmission 08 standards of the network by the capacity of the first register 09 apparatus.
11 The characteristics of the present invention mentioned 12 above, in additlon to others, will appear more clearly from the 13 following description of an embodiment, the said description 14 being made with reference to the accompanying drawings in which:
Fig. 1 represents the block diagram of a data 16 transmitting system in which the improvements of the invention 17 are included;
18 Fig. 2 is a diagram of data batches for use in 19 illustrating the operation of the system of Fig. 1 FigO 3 is a diagram of a particular batch of data shown 21 as an example;

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~ - 7 -Fig. 4 i5 a block diagram of the logic part of thetransmitting equipment;
Fig. 5 is a block diagram of data reception apparatus.

The data transmitting system shown in Fig. 1 includes a broadcasting station incorporating a transmitter apparatus 41 and a broadcasting aerial 42, as well as a plurality of subscriber receivers including a receiving aerial 43, a television receiver 44 and a data recei~ing apparatus 45.

The transmitter apparatus 41 includes a unit 46 called the "master" 9 which is arranged to t;me multiplex the data messages originating from a series of data sources which, in the example described~ is assumed to be limited to seven sources 47 to 53. The apparatus 41 includes 9 in addition, a modulator portion 54 which receives, on the one hand, the signals transmit:ted by the "master" and, on the other hand, video signals via a link 55, and which transmits signals to a standard transmitter, which i5 not shown, which reeds the aerial 42. Afi an example, the description of a modula-tor por~ on 54 which is not a feature of the present in~ention, can be found in the ~`rench Patent Application No. 75 18319, already mentioned~
and, in particular, with rererence to ~ig. 4 o~ ~he latter~

The data transmitted by the "master'l 46 is arranged in batches, In the modulator portion 54, the batches are inserted in place of the plcture signals, between the 3 ~

01 - ~ -03 standard synchroni~ation signals of the television lines.

05 FigO 2 shows an example of batches of data transmitted 06 by the "master" 46, then, after modulation, by the aerial 42.

08 The batch has a maximum length of Nmax eight bit words 09 numbered from 1 to Nmax and is composed of two parts. The first part, cal]ed a prefix, is prepared under the control of the 11 "master" 46 and is constituted from the first eight bit words 1 12 to 8. The second part, constituted from the eight bit words 9 to 13 Nmax, constitutes the actual data of the batch. The number Nmax 14 may vary, depending on the standard of the television broadcasting network, and may be determined by optimisation, 16 taking into consideration of the length of the useful television 17 line and of the bandwidth. Thus, in the French standard of 625 18 lines, Nmax may reach 32, which corresponds to the L standard 19 recommended by the CCIR, (International Radio Consulative Committee). In the American standard of 525 lines, given the 21 limited bandwidth~ Nmax <32.

23 In the prefix, the two eighl: bit words 1 and 2 are re-24 served for the synchronization of the bits in a batch and are each ;25 made up, for example, of the sequence of binary digits 10101010.
26 The eight bit words 3 called the "starti' allows standard octet by 27 octet synchronization to be carrier out and may correspond to the ~28 sequence 11100111. The eight bit words 4, 5 and 6 are reserved for 29 the identification of the service and are prepared in coded ~' . .~ .
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g form by the "master" 46. The ei~ht bit word 7 called the continulty octet enable~ the counting of the numbers or indlces of the batches from 1 to 127 and therefore account to be taken in the receiving equipment of batch omisxions or errors. ~inally, the eight bit word 8 indicates the format of the batch, that is to say, when a batch does not contaln the number Nmax of octets, the number of the last octet havi~ a significance~

By way of example 9 Fig. 3 shows a batch which only contains three octets 9 to 11 of useful data, in which the octet 8 has the value 3.

It must be understood that the standard uscd allows a choice to be made of the number Nmax of the transmissable octets in one line, as well as the bit frequency, which, in a modulation standard of the "non-clearing" or "non-return to ~ero" type, is simply deduced from t~e 1010~..
sequences of the octets 1 and 2. In addition the batch format octet allows independent transmission of the batches on television line~ and the display of rows of characters on a visual display unlt to be made.

Again with reference to ~ig. 19 the televisi.on receiver 44 transmits the video signals via its vldeo output to the apparatus 45. This latter contains a demodulation section 569 a logic section 57 and a reader 58 of a coded base 59.
The demodulation section 56 passes to 57 a bit frequency ~1~5~3~
~ ~ 10 -sienal (ebs) via 60 and the (N - 3) ~ 8 last ebs of the batch of N octets via 61. The information read by the reader 58 is permanently applied to 57. With regard to the function of tile coded hase 59, it would be useful to refer to the main patent application. The receiving section 57 passes via 62 the octets of the data of the batch to an appropriate tern.inal such as 639 while the video signal emitted by 44 is still available on 64.

~ ig. 3 shows a bus line 6~, a control circuit 66 and one of several couplers 67 connecting the sources 47 to 53 to the line 65. In practice, the line 65, the circuit 66 and the couplers 67 constitute the "master" 46, ~ig~ 1 The control circuit 66 is connected to 65 and may in~t~ct the couplers 67 to connect themsel~es to 65. The circuit 66 will not be described in any more detail as it is assumed to be identical to the circuit 76 of ~igo 3 of the main patent applicatlon. A reminder will simply be given that the circuit 66 gives out, in the form of addresse~, enquirles to~ards the couplers in order to collect the identities of the couplers which are ready to emit, and then emits successi~ely transmission order to these couplers.

- In the coupler 67, the enquiries originating from 66 enter via the link 68 connected to an address identification circuit 69 incorporatlng the components 90, 9Z arld 126 of ~lg. 3 of the main patent application. The circult 69 has its output connected to the first input of an AND gate .

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03 111 whose output is connected to 6S.

OS rrhe data originating from the source connected to the 06 coupler 67 are transmitted via a junction 70 of the kind described 07 in the French Patent Application No. 74 13136 filed on 16th April 08 1974 in the joint names of Etablissement Public de Diffusion dit:
09 "Telediffusion de France"; Etat Francais, represente par le Secretaire d'Etat aux Postes et Telecommunications (Centre National 11 d'Etudes des Telecommunications) and entitled "Apparatus for 12 Standardized Interface of Communications". Via the junction 70, 13 the data enters in parallel octets into a logic input circuit 71 14 whose output is connected to a buf:Eer data memory 72. In addition, the "go" service wire of the link 70, which transmits a change in 16 condition :~or each octet transmitted by 70, is connected at the 17 input of an octet counter 73, whose output is connected to a 18 register 74 which contains the number of octets transmitted by 71 lg to the bu:Efer memory 72. The register 74 has one clearing ~nput (RAZ) connected to line 65, an output connected to the first i.nput 21 of an AND gate 75 and an output connec~ed to the memory 7~.

23 The buffer memory 72 contains two parts, the first 76 in 24 which the octets of the batch prefix are recorded and the other 77 in which the octets of the data originating from the source 71 are 26 recorded~ The part 76 has a first input connected to a memory 78 27 which contains ~he synchronization and start octets 1 to 3, a 28 second input connected to a memory 79 which contains the three 29 octets 4 to 6 for the identification of each batch prefix, a third input connected to a batch counter 80~ which gives `~r ',.
. . ~ ' ' ' ~ - 12 ~ 3 ~ B ~

the nurnber of the batch, that is to say, the continuity octet, and a fourth input connected to the register 74 which gives9 at the moment of transmi.ssion, the number of octets contained in the pi~t 77, that is to say, the format octet.

~ n output of the register 74 is also cor~ected to the first i.nput of a comparator 81 whose second input is connected to the output of a memory 8Z containing the number (Nmax - 8), whic}l corresponds to the maxi.mum number of data octets uhich cnn be tran~smitted in a bat h. The output of 81 i9 con~ected, on the one h~nd, to an input of an OR gate o3 and, on the other hand, to the first input of an AND gate 84~ The output of the OR gate 83 is connected to an inhibition input of circuit 71.

The coupler 67 includes, in addition, a simulation circuit 85, which receives an indi.cation of speed origin-ating from 66 via 65 and a link 86~ This indication of speed de~nds on the speed of operation of the receiving equi.pment capable of receiving the data from the source connected to the coupler. With this speed information9 the simulator 85 simulates the ernptying of the buffer memory 7Z, this emptying being counted in a counter 87 connected to the output of 85. The outputs 1 to 4 of 87g corresponding to the counts 1 to 4, are cor~lected to the inputs of an 0~ gate 88 .hose output is connected to the ~:

second input of the AND gate 840 In ~ddition~ the output .

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~ ~ 13 -4 of 87 is connected to the second input of the AND gat~75. The outputs of the A~D gates 84 and 75 are connected to the inputs of an O~ gate 89 whose output i9 connected to the second input of the ~ND gate 111. The output of the ~ND gate 75 ls, in addition9 connected to an inp~lt of the OR gate 83.

The output of the memory 72 is connected to a logic transmission circuit 90 which r~ceives from 65 via the linX 91, the bit fr~uency signal and, via the link 92, the transmission instruction originating from the control circuit 66. The output of the circuit 90 is connected to the line 65 via the wire 93 which transmits the batch in series, eb by eb9 towards the modulation part of the transmission equipmsnt. The link 92 is also connected to the input of th~ counter 80 which is thus able to count the batches transmitted by the coupler 67.

The operation of the coupler 67 is practically the same as that of the coupler 77 o~ ~ig. 3 of the main patent application where the same components may also be found, except ~ith r~gard to the msmory 82 which, instead of containing the number 32; contains the number Nmax - 8.
:tn ef`fect~ as seen above, the number Nmax ~aries dependi.ng on ~le standard of the transmitting system. In the French standard with 625 lines, the bandwidth of ths video signal is 6MI~z which allows ~lO oct~ts to be placed in the nominal d~ration of one line of 64 microseconds, This .

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is ~hy, in the main patent application, a memory containing the nwnber 32 had been provided. According to the present invention, the fact that the number Nmax must be able to vary is provided for~ For this reason a link gLI between the lines 65 and 82 is provided which allows modification of the content of 82 from the control circuit 66.

It must be noted, in addition; that the operator of the source connected to the coupler always transmits only si~lificant data and that he does not need to be concerned ~ith the number Nmax~ nor with the transmlssion frequency of bits that the circuit 66 can also control via 91.

The demodulatlon part of a subscriber~s receiving apparatus is shown in Fig. 5. The video signals from the television receiver 41~ are applied to an impedance~
adaptation circuit 95 whose output signal is applied~ on thP one lland, to a circuit 96 for the rccovery of the bit frequency and, on the other hand, to a synchroniz~tion circuit ~7. The synchronization circuit 97 inchdes the circuits bearing the numerical reference 152 to 161 in ~;
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~ig. 5 of the main patent application and ser~es mainly for the recognition of the starting octet, 90 that only the fourth octet of each batch and those fcllo~ing ~ill be transmitted to the logic part 57y ~ia the lir.k 617 ~hich corresponds to 65 i~l the main patent application. The circuit 96 il~cludes~ as in standard circuits for the recovery of the bit frequellcy, a tuned circuit including :: : .

, . 1 5 ~ , 9 ~ 1 a variable impedance component 98, which may be a varicap, the impedance of which i5 controlled by the televi~ion channel selector 99. The circuit 96 passes the bit frc~uency signal9 on the one hand, to the synchronization circuit 97 a~d, on -the o~ler hand, to the circuit 57 v.ia the lir~ 60.

In the circuit 57, the s~gnal at the ebs frequency is applied, on the one hand, to an octet register 100, and on the other, to a divide-by eight circuit 101 whose OUtpllt i5 connec$ed to the input of an octet counter 102.
The ebs of the batch are applied in series via 61 to the data input of the octet reglster 100, which transmits the octets in parallel to ~ switching circuit 103. The octet counter 102 has its first six outputs~ c~rresponding to the first six octets reccived in 57, that is to ~ay, to the octets 4 to 9 colmected to the control inputs of the circuit 103 wllose ~uccesslvely activated inputs have t~e effect of orientating successively the octets of th~ batch towards a validation circuit 106 for the octets 4, 5, 6 and 7, towards a format re~ister 104 for the octet 8 ~nd towards a data buffer mc~lory 105 A validation circuit 106 can include the circuits 167, 179, 166, 171, 168 sho~rl in Fig. 6 of the ~ai~ patent application, and, if need be, the circuits 173 and 174 of that applicatioll.

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The output of t~e buffer memory 105 is connected to the input of a ~witching clrcuit 107 ~hich can be activated via a 1~nk 108 from 106. The output of 107 is connected to a junction lead 62, of thc same type as the junction lead 70 of Fig. 4, which is con~lected to the user equipment 63. A wire from the junction lead 62 is connected to the input of a counter 109 which counts the octets trans~nitted by 107 and whose output is connected to an input of a comparator 110, whose other input is connected to the output of the format re~ister 104 and wllose output is connected to an inhibition input of the circuit 107. Finally, the output of the octet counter 102 is connected to a validation input of the circuit 107 :.

The octet counter 102 activates its output when it has reached the number Nmax At this moment, the buffer memory 105 has received Nma~ octets of which possibly only N batch octets are valid, N representing the batch format Assumin~ that the clrcuit 106 validates the batch, as soon as the counter 102 valida.tes its output, the octets can be transferred from 105 to 62 through the intermediary of 107 As soon as N Octets ha~-e been thus transferred~ the inputs of the comparator 110 have equRl values and the output of 110 prevents further transmission from 105 to 62 for the television line under consideration, which seI~es as base for the batch.

The counter 102 is provided with several outputs ~hich .

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may be activated, corresponding to several possible values of Nmax. One of these outputs can be selected by me~ns of tlle television channel selector 99 at the same time as the value of -the varicap 98.

Thus it appears that wlth very simple means9 a varicap and a counter output selector, the receivcr c~n be immediately adapted for data reception, whatever the standard of` the data transmission network~

The processing equipment may be of the type described in the Frence Patent Appli.cation No. 76 27212 already mentioned, ~hich allows the display of characters~ whose positions on the screen are detel~ni.ned by page and row symbols, to be made independen1 of the position of the octets in the respective television lines ~hic`h have served to transmit them ~' , :

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Claims (6)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A system for the transmission of data in which a transmitting station transmits in the form of batches numerical data originating from several channels the batches from the different channels being time multiplexed and each batch including a prefix containing, apart from standard synchronization and channel identification code signals, a batch format signal indicating the length of the sequence of the data which follows the prefix, the trans-mitting station including as many couplers as channels, each coupler including an input circuit whose input is connected to the output of the channel associated with the coupler and whose output is connected to the input of a data memory whose output can be connected to a multiplexing circuit under control of a control circuit common to all the couplers, and a counter fed at a predetermined rate, an inhibition signal for the input circuit being given, either as soon as the memory is full, or as soon as the counter has reached a pre-determined number, the format signal in the prefix having the value of the contents of the memory at the moment in time of the inhibition signal, after which the memory can be connected, via the control circuit, to the multiplexing circuit when the latter is free, the memory being then emptied, the counter cleared and the inhibition signal canceled, in which the transmitting station includes a register arranged to count the data introduced into the data memory, the said register having an adjustable maximum capacity depending on the standard of a broadcasting network over which the data is transmitted, the said register initiating the said inhibition signal of the said input circuit when the level of the said data reaches the said maximum capacity.

2. A data transmission system as claimed in claim 1 includ-ing a receiving apparatus, the signals which follow the prefix, when this is accepted by the said receiving apparatus, being fed to a buffer memory whose output is connected to an output circuit, the receiving apparatus incorporating a format signal register storing the format signal of the prefix of each received batch and a counter fed by a clock signal at the bit rate of the data which, when it has reached its maximum level, causes the emptying of the sequence of the first input data in the said buffer memory, the length of the sequence being determined by the value registered in the said register, towards the said output circuit, in which the counter has an adjustable maximum capacity equal to that of. the transmitting station register, the regulation of the said maximum capacity being directly carried out by a television channel switch.

3. A data transmission system as claimed in claim 2 in which a circuit for the recovery of the bit frequency of the receiving equipment incorporates a tuned circuit contain-ing an adjustable impedance component whose value is directly regulated by the position of the television channel switch.

4. A data transmission system as claimed in claim 3 in which the said adjustable impedance component is a varicap.

5. A system for broadcasting sets of digital data through a television broadcasting network having transmission standards which are set by a regulatory agency, the system comprising a plurality of sources of said digital data; each set of said digital data comprising a prefix, synchronism signals which are conventional for the TV network used to broadcast the digital data, an identification signal of the pertinent source of said data, and a size signal identifying the length of the data signal which follows the prefix, memory means and a coupling means individually associated with each source of data for transferring data from the associated source to said memory means, means governing said coupling means for assembling data from said source, counter means operating at a predetermined clock rate for selectively inhibiting said coupling means responsive to either a predetermined count fixed by said size signal or a full count fixed by the capacity of said counter means, data bus means, means responsive to said inhibition by said counter means for enabling said memory means to transfer its stored data to said data bus means, said data bus means combining said assembled data, first register means for controlling data introduced into said memory means, said register means having a maximum capacity which is a function of the transmission standards of said network, and means responsive to said first register means for controlling said inhibition by said counter means, whereby said data-broadcasting system is coordinated with the transmission standards of said network by the capacity of said first register means.

6. The system of claim 5 and receiver means for picking up signals broadcast by said television network, means for separating said picked up signal responsive to said prefix, buffer memory means for storing said separated signals identified by said prefix, said first register means comprising a size signal register means for storing said size signal responsive to said prefix, clock-controlled counter means responsive to said stored size signal for periodically emptying said memory means and means for adjusting the capacity of said clock-controlled counting means to correspond to the capacity of said first register means, thereby coordinating said receiver to said transmission standards.