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BR8801487A - Sistema de computador e processo - Google Patents

Sistema de computador e processo

Info

Publication number
BR8801487A
BR8801487A BR8801487A BR8801487A BR8801487A BR 8801487 A BR8801487 A BR 8801487A BR 8801487 A BR8801487 A BR 8801487A BR 8801487 A BR8801487 A BR 8801487A BR 8801487 A BR8801487 A BR 8801487A
Authority
BR
Brazil
Prior art keywords
computer
process system
Prior art date
Application number
BR8801487A
Other languages
English (en)
Inventor
Gary Bischoff
Dag Reidar Blokkum
Antonio Leon Penaloza Iii
David Lawrence Peterson
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR8801487A publication Critical patent/BR8801487A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
  • Memory System (AREA)
BR8801487A 1987-04-01 1988-03-30 Sistema de computador e processo BR8801487A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/034,255 US4827406A (en) 1987-04-01 1987-04-01 Memory allocation for multiple processors

Publications (1)

Publication Number Publication Date
BR8801487A true BR8801487A (pt) 1988-11-08

Family

ID=21875260

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8801487A BR8801487A (pt) 1987-04-01 1988-03-30 Sistema de computador e processo

Country Status (5)

Country Link
US (1) US4827406A (pt)
EP (1) EP0284981B1 (pt)
JP (1) JPS63251848A (pt)
BR (1) BR8801487A (pt)
DE (1) DE3885780T2 (pt)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5293597A (en) * 1987-03-09 1994-03-08 At&T Bell Laboratories Concurrent context memory management unit
US5404476A (en) * 1989-02-10 1995-04-04 Nec Corporation Multiprocessing system having a single translation lookaside buffer with reduced processor overhead
DE69033262T2 (de) 1989-04-13 2000-02-24 Sandisk Corp., Santa Clara EEPROM-Karte mit Austauch von fehlerhaften Speicherzellen und Zwischenspeicher
JPH031260A (ja) * 1989-05-30 1991-01-07 Hitachi Ltd 計算機方式
DE69032418T2 (de) * 1989-09-08 1999-02-25 Digital Equipment Corp., Maynard, Mass. Privatspeicher für Fäden in einem multifaden digitalen Datenverarbeitungssystem
JPH04270440A (ja) * 1991-02-26 1992-09-25 Fujitsu Ltd アクセス方式
US5414821A (en) * 1991-12-17 1995-05-09 Unisys Corporation Method of and apparatus for rapidly loading addressing environment by checking and loading multiple registers using a specialized instruction
US5584017A (en) * 1991-12-19 1996-12-10 Intel Corporation Cache control which inhibits snoop cycles if processor accessing memory is the only processor allowed to cache the memory location
US5572695A (en) * 1994-05-31 1996-11-05 International Business Machines Corporation Transparent memory mapping mechanism for a digital signal processing system
US5734817A (en) * 1995-03-01 1998-03-31 Unisys Corporation Method for making a data base available to a user program during data base recovery
US5761740A (en) * 1995-11-30 1998-06-02 Unisys Corporation Method of and apparatus for rapidly loading addressing registers
US6049854A (en) * 1997-05-09 2000-04-11 Vlsi Technology, Inc. System and method for sharing physical memory among distinct computer environments
JPH10333977A (ja) * 1997-05-28 1998-12-18 Oki Electric Ind Co Ltd マイクロコントローラ装置
GB2329984B (en) * 1997-10-01 2002-07-17 Thomson Training & Simulation A Multi-Processor Computer System
US6094699A (en) * 1998-02-13 2000-07-25 Mylex Corporation Apparatus and method for coupling devices to a PCI-to-PCI bridge in an intelligent I/O controller
US6081881A (en) * 1998-02-20 2000-06-27 Unisys Corporation Method of and apparatus for speeding up the execution of normal extended mode transfer instructions
US6108761A (en) * 1998-02-20 2000-08-22 Unisys Corporation Method of and apparatus for saving time performing certain transfer instructions
US6631480B2 (en) 1999-11-10 2003-10-07 Symantec Corporation Methods and systems for protecting data from potential corruption by a crashed computer program
US6662310B2 (en) 1999-11-10 2003-12-09 Symantec Corporation Methods for automatically locating url-containing or other data-containing windows in frozen browser or other application program, saving contents, and relaunching application program with link to saved data
US6630946B2 (en) 1999-11-10 2003-10-07 Symantec Corporation Methods for automatically locating data-containing windows in frozen applications program and saving contents
US7139849B2 (en) * 2002-08-07 2006-11-21 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4173783A (en) * 1975-06-30 1979-11-06 Honeywell Information Systems, Inc. Method of accessing paged memory by an input-output unit
US4481573A (en) * 1980-11-17 1984-11-06 Hitachi, Ltd. Shared virtual address translation unit for a multiprocessor system
US4648035A (en) * 1982-12-06 1987-03-03 Digital Equipment Corporation Address conversion unit for multiprocessor system
US4622631B1 (en) * 1983-12-30 1996-04-09 Recognition Int Inc Data processing system having a data coherence solution
US4669043A (en) * 1984-02-17 1987-05-26 Signetics Corporation Memory access controller
JPS6147350A (ja) * 1984-08-02 1986-03-07 株式会社　柴崎製作所 ピルフア−プル−フ部材付キヤツプの製造方法
US4618946A (en) * 1984-09-17 1986-10-21 Motorola, Inc. Dual page memory system having storage elements which are selectively swapped between the pages

Also Published As

Publication number Publication date
EP0284981B1 (en) 1993-11-24
DE3885780T2 (de) 1994-05-19
US4827406A (en) 1989-05-02
JPS63251848A (ja) 1988-10-19
EP0284981A2 (en) 1988-10-05
DE3885780D1 (de) 1994-01-05
EP0284981A3 (en) 1990-08-01

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Legal Events

Date Code Title Description
KF Request for proof of payment of annual fee
FD5 Application fees: dismissal - article 86 of industrial property law