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BR8105470A - UPDATE AND SYNCHRONIZATION UNIT - Google Patents

UPDATE AND SYNCHRONIZATION UNIT

Info

Publication number
BR8105470A
BR8105470A BR8105470A BR8105470A BR8105470A BR 8105470 A BR8105470 A BR 8105470A BR 8105470 A BR8105470 A BR 8105470A BR 8105470 A BR8105470 A BR 8105470A BR 8105470 A BR8105470 A BR 8105470A
Authority
BR
Brazil
Prior art keywords
update
synchronization unit
synchronization
unit
Prior art date
Application number
BR8105470A
Other languages
Portuguese (pt)
Inventor
A Pezzotta
Original Assignee
Italtel Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Italtel Spa filed Critical Italtel Spa
Publication of BR8105470A publication Critical patent/BR8105470A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored programme control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G06F11/1645—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
BR8105470A 1980-09-05 1981-08-27 UPDATE AND SYNCHRONIZATION UNIT BR8105470A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8003503A IT8003503A0 (en) 1980-09-05 1980-09-05 UPDATE AND SYNCHRONIZATION UNIT OF THE CENTRAL CONTROL OF A MULTIPLE PERIPHERAL USERS

Publications (1)

Publication Number Publication Date
BR8105470A true BR8105470A (en) 1982-05-11

Family

ID=11108593

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8105470A BR8105470A (en) 1980-09-05 1981-08-27 UPDATE AND SYNCHRONIZATION UNIT

Country Status (3)

Country Link
BR (1) BR8105470A (en)
FR (1) FR2490054A1 (en)
IT (1) IT8003503A0 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT8003501A0 (en) * 1980-09-05 1980-09-05 Sits Soc It Telecom Siemens CENTRAL CONTROL OF A MULTIPLE OF PERIPHERAL USERS
US4926320A (en) * 1987-04-07 1990-05-15 Nec Corporation Information processing system having microprogram-controlled type arithmetic processing unit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1269827B (en) * 1965-09-09 1968-06-06 Siemens Ag Method and additional device for the synchronization of data processing systems working in parallel
US3810119A (en) * 1971-05-04 1974-05-07 Us Navy Processor synchronization scheme
FR2144912A5 (en) * 1971-07-02 1973-02-16 Cerci
IT1036311B (en) * 1975-06-17 1979-10-30 Cselt Centro Studi Lab Telecom DUPLICATE SYSTEM FOR SUPERVISION AND CONTROL OF DUPLICATED TELECOMMUNICATION SYSTEMS
IT8003501A0 (en) * 1980-09-05 1980-09-05 Sits Soc It Telecom Siemens CENTRAL CONTROL OF A MULTIPLE OF PERIPHERAL USERS

Also Published As

Publication number Publication date
FR2490054A1 (en) 1982-03-12
IT8003503A0 (en) 1980-09-05

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