[go: up one dir, main page]

AU9024682A - Deriving clock signal from received digital signal - Google Patents

Deriving clock signal from received digital signal

Info

Publication number
AU9024682A
AU9024682A AU90246/82A AU9024682A AU9024682A AU 9024682 A AU9024682 A AU 9024682A AU 90246/82 A AU90246/82 A AU 90246/82A AU 9024682 A AU9024682 A AU 9024682A AU 9024682 A AU9024682 A AU 9024682A
Authority
AU
Australia
Prior art keywords
received digital
signal
clock signal
digital signal
deriving clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU90246/82A
Inventor
John Malcolm Hale
Michael Geoffrey Vry
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of AU9024682A publication Critical patent/AU9024682A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AU90246/82A 1981-11-09 1982-11-08 Deriving clock signal from received digital signal Abandoned AU9024682A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8133687 1981-11-09
GB08133687A GB2110020A (en) 1981-11-09 1981-11-09 Deriving a clock signal from a received digital signal

Publications (1)

Publication Number Publication Date
AU9024682A true AU9024682A (en) 1983-05-19

Family

ID=10525729

Family Applications (1)

Application Number Title Priority Date Filing Date
AU90246/82A Abandoned AU9024682A (en) 1981-11-09 1982-11-08 Deriving clock signal from received digital signal

Country Status (4)

Country Link
EP (1) EP0079107A1 (en)
JP (1) JPS5888943A (en)
AU (1) AU9024682A (en)
GB (1) GB2110020A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU573502B2 (en) * 1984-07-26 1988-06-09 Philips Electronics N.V. Clock signal recovery from angle modulation carrier
AU583921B2 (en) * 1985-05-15 1989-05-11 Philips Kommunikations Industrie A.G. Circuit arrangements for recovering the clock rate of an isochronous binary signal

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2123258A (en) * 1982-06-25 1984-01-25 Philips Electronic Associated Digital duplex communication system
US4808937A (en) * 1986-07-15 1989-02-28 Hayes Microcomputer Products, Inc. Phase-locked loop for a modem
JPH04286248A (en) * 1991-03-14 1992-10-12 Fujitsu Ltd Base band differential detector
DE4221476A1 (en) * 1992-06-30 1994-01-05 Siemens Ag Method and arrangement for the regeneration of a binary signal

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4333060A (en) * 1980-07-10 1982-06-01 E-Systems, Inc. Phase locked loop for recovering data bit timing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU573502B2 (en) * 1984-07-26 1988-06-09 Philips Electronics N.V. Clock signal recovery from angle modulation carrier
AU583921B2 (en) * 1985-05-15 1989-05-11 Philips Kommunikations Industrie A.G. Circuit arrangements for recovering the clock rate of an isochronous binary signal

Also Published As

Publication number Publication date
JPS5888943A (en) 1983-05-27
EP0079107A1 (en) 1983-05-18
GB2110020A (en) 1983-06-08

Similar Documents

Publication Publication Date Title
AU540565B2 (en) Digital signal time base connection
GB2077467B (en) Processing digital signals
AU567160B2 (en) Digital signal processing
ZA815231B (en) Digital signal transmitting system
AU546592B2 (en) Digital burst signal transmission
JPS5752950A (en) Digital signal processor
AU554713B2 (en) Digital receiver calling
AU541389B2 (en) Digital signal processor
AU551972B2 (en) Receiver synchronizing signal circuit
JPS5761358A (en) Digital signal synchronizing system
DE3266081D1 (en) Digital signal receiver
GB8312021D0 (en) Digital transmitter
GB2106743B (en) Digital signal demodulator
AU567689B2 (en) Digital signal coring
GB2112236B (en) Digital device for clock signal synchronization
AU549337B2 (en) Television signal digital transcoder
DE3361784D1 (en) Digital signal receiver
GB8507816D0 (en) Digital video signal processor
AU9024682A (en) Deriving clock signal from received digital signal
AU577127B2 (en) Digital signal processor
GB2109135B (en) Digital signal processing
JPS57111151A (en) Digital signal transmittng method
AU548643B2 (en) Pcm tv signal processing
JPS56156040A (en) Digital signal processor
JPS57176477A (en) Digital signal processor