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AU726748B2 - Preamble for estimating the channel impulse response in an antenna diversity system - Google Patents

Preamble for estimating the channel impulse response in an antenna diversity system Download PDF

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Publication number
AU726748B2
AU726748B2 AU67305/96A AU6730596A AU726748B2 AU 726748 B2 AU726748 B2 AU 726748B2 AU 67305/96 A AU67305/96 A AU 67305/96A AU 6730596 A AU6730596 A AU 6730596A AU 726748 B2 AU726748 B2 AU 726748B2
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AU
Australia
Prior art keywords
preamble
transmission system
digital signal
sequences
pulse response
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Ceased
Application number
AU67305/96A
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AU6730596A (en
Inventor
Weilin Liu
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Ascom Systec AG
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Ascom Systec AG
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Assigned to ASCOM SYSTEC AG reassignment ASCOM SYSTEC AG Alteration of Name(s) of Applicant(s) under S113 Assignors: ASCOM TECH AG
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Publication of AU726748B2 publication Critical patent/AU726748B2/en
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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/0224Channel estimation using sounding signals
    • H04L25/0226Channel estimation using sounding signals sounding signals per se
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0802Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection
    • H04B7/0805Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with single receiver and antenna switching
    • H04B7/0808Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with single receiver and antenna switching comparing all antennas before reception
    • H04B7/0811Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with single receiver and antenna switching comparing all antennas before reception during preamble or gap period
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042Detectors therefor, e.g. correlators, state machines

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Radio Transmission System (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Description

1 PREAMBLE FOR ESTIMATING THE CHANNEL IMPULSE RESPONSE IN AN ANTENNA DIVERSITY SYSTEM Technical Field The invention relates to a preamble in a digital signal transmission system. The invention also relates to a transmitter, a receiver, and a method for a digital signal transmission system with a preamble of the type referred to above.
State of the Art It is known in the art that with regard to the transmission of blocks of data (burst signalling) the preamble, required for clock and packet synchronization and located at the beginning of the block, is also used to make 15 antenna selections for the purpose of switching diversity.
In this context, during the reception of the preamble, the signal strength for the available antennas is measured, and the antenna signal with the best output is used for the data detection.
20 P. E. Mogensen et al. propose such a receiver structure for DECT, for example, in the publication IEEE VTC-95, pp. 514-519, "Evaluation of a Advanced Receiver o Concept for DECT," and define the conditions for operating this system (DECT) in such a way that the occurrence of intersymbol interference is precluded (at most there is fading).
ETS 300 652 (ETSI 1995) defines the technical features for a wireless local high performance network (HIgh PErformance Radio Local Area Network HIPERLAN).
HIPERLAN is a short range communication subsystem with a high data transfer rate which typically has an occurrence of intersymbol interference.
Description of the Invention An object of the invention is to formulate a preamble which is useful for clock and packet synchronization, as well as for antenna diversity, preferably for estimating the frequency offset.
H:\Emna\Keep\Specis\657305.96-2.doc 15/09/00 2 Furthermore, the preamble should also be easily ready for use in an environment with intersymbol interference.
According to one aspect, this invention provides a preamble in a digital signal transmission system, which is used both for packet synchronization and channel estimation, characterized by several different autocorrelation bit sequences, each of which is repeated numerous times.
Another aspect of the invention provides a digital signal transmission system with a transmitter and a receiver, including: read-only memory in the transmitter with a memorized bit sample to generate and transmit a preamble; S. several antennae in the receiver as well as a 15 switch for sequential dial-up of the antennae; a channel pulse response estimating device to determine a channel pulse response by evaluating at least one bit sequence of the transmitting preamble; an evaluating device to determine the best channel pulse response to later be able to detect a data division via the antenna with the best reception; and a circuit to execute the packet synchronization based on the transmitted preamble, characterized in that the preamble is formed by several different autocorrelation bit sequences, each of which is repeated multiple times.
Another aspect of the invention provides a transmitter for a digital signal transmission system with read-only memory with a memorized bit sample or a circuit to generate and transmit a preamble whose purpose consists of being utilized both for packet synchronization and for channel estimation in a receiver, characterized in that the preamble is formed by several different autocorrelation bit sequences, each of which is repeated numerous times.
Another aspect of the invention provides a procedure for the operation of a digital signal transmission system in which: TSF a preamble is transmitted from a transmitter to a H: \Ema\Keep\Specis\67305 96-2. doc 15/09/00 2a receiver along with data; the receiver sequentially switches between several antennae during reception of the preamble; a channel pulse response is determined for each antennae; the antennae with the best channel pulse response is selected for successive detection of data; and the transmitted preamble is utilized for the execution of packet synchronization, characterized in that: the preamble is formed by several differnet autocorrelation bit sequences, each of which is repeated several times; a channel pulse response is determined based on each sequence; and 15 with a complete sequence being measured for each SO'o antenna.
A signal according to the invention contains several different bit sequences, and each sequence is suited for clock and packet synchronization as well as 20 channel estimations.
Contrary to systems known in the art, the selected preamble as such does not feature optimal *autocorrelation characteristics. Instead, the preamble consists of several short sequences optimized for specific purposes. Each of these sequences has good autocorrelation properties. Consequently, a sequential antenna selection (sequential antenna diversity) can be successfully realized.
According to a preferred embodied example, the bit sequences are so-called m-sequences maximum length sequences that can be generated, for example, with suitable feedback shift registers). A useful sequence length for the HIPERLAN standard is e.g. m 31. However, shorter m 15) or longer m 63) sequences are also easily possible. Moreover, synchronization bit patterns, known, for example, from the GSM standard, can ks also be used instead of m-sequences.
H: \Erma\Keep\Spec \6 7 l05. 96-2 doc 15/09/00 2b Preferably each sequence is repeated several times. The advantage here is the wide flexibility when calipering the sequences. In fact, it is not important with which bit the scanning process is initiated as long as the border between two different sequences is not crossed. For example, if the sequences are repeated three times, the receiver circuit has sufficient time to select and evaluate one complete bit pattern of the m-sequence. Naturally, it is not necessary to obtain the number of repetitions of the sequences in whole numbers. It is possible to discontinue the repetition process earlier (for example, after 1 or 2 S 2 repetitions the user may proceed with the next sequence).
If a standard calls for a preamble to be of a certain length HIPERLAN requires 450 bits), the repetition 15 process can be discontinued after the prescribed bit number has been reached.
It is not required that all sequences be repeated equally often. The number of repetitions can depend on the available overall length for the preamble, and on the 4 20 purpose or function allocated to a certain sequence.
The receiver for the evaluation of the signal e:e: preamble according to the invention has several at .o least two), in particular, three different antennas at its disposal. Said antennas can be physically completely separate, or constructively partially connected. For example, there are diversity antenna arrangements with minimal distances of less than X/2.
In addition, a circuit is envisioned in the receiver in order to determine the best antenna signal.
Thus, the channel burst response is estimated for each antenna in order to find, for example, the antenna signal with the shortest burst response for the actual data detection. A short burst response has the advantage that, with respect to data detection, it is possible to work with less complex equalizers. Alternatively or in addition, the overall energy contained in the taps of the burst response can also be taken into consideration.
H:\Emma\Keep\Specis\6 730 5.96-2.doc 15/09/00 Depending on the kind of subsequent data processing, the sequences of the preamble can also be evaluated with a suitable frequency offset estimation. This can be carried out, for example, in combination with an estimation of the channel burst response. It is essential for a frequency offset evaluation, which is developed based on channel burst responses, that at least two burst responses be estimated with a predetermined time interval between estimations.
Generation of the preamble according to the invention on the transmitter end can take place, for example, by reading out the predetermined bit pattern from the read-only memory (ROM, EPROM, etc.) If m-sequences are used, several linear feedback shift registers (LFSR Linear Feedback Shift Register) can be envisioned, which are called up one after the other by means of a switch. The repetition of an m-sequence results automatically when the end of a bit interval is reached and the shift register continues to be clocked.
Processing of the preamble according to the invention occurs as follows in the receiver: First, the different antenna signals are evaluated, one after the other, by scanning, respectively, a complete m-sequence, and by estimating the channel burst response.
For further signal processing by setting a switch the antenna with the best reception is selected.
Now follows the estimation of the burst response of the selected antenna and of the frequency offset, still in the context of the preamble. The result of this step will be the basis for the detection of the subsequent data.
The estimation of the channel burst response in connection with selecting an antenna as well as regarding the frequency offset) in the embodied example referred to above is repeated because for the preferred frequency offset estimation, it is necessary to conduct 2 channel estimations with a strictly predetermined time interval between the two. Also, the estimation that is conducted for the antenna selection does not require as high a level of accuracy as does the later one for the data detection.
Based on the following detailed description and the entirety ofthe patent claims, other advantageous embodied examples and characterizing feature combinations of the invention are possible.
Short Description of the Drawings The drawings which illustrate the embodied example show: Fig. 1: A schematic depiction of a preamble according to the invention; Fig. 2: A block diagram of a receiver circuit for processing the preamble according to the invention; Fig. 3 A block diagram of a circuit apparatus on the transmitter end for generating a preamble in accordance with the invention.
Ways to Realize the Invention Fig. 1 shows a preferred embodied example of the invention. Depicted is the preamble (specifically defined for the system) followed by a data part (which contains the user data), and which is not described in greater detail herein The preamble consists of 5 sections, al to a5. Each section is composed of three repetitions of an m-sequence, ml to m5. The length of the min-sequences is e.g.
31 bits. Therefore, a section has a length of 93 bits, and the total length is 465 bits. For use with HIPERLAN, where the preamble is 450 bits long by definition, the final 15 bits ofthe last m-sequence can be omitted.
Each section al to a5 contains a different maximum length sequence. Therefore, the periodicity of the overall sequence is minimal. The following succession is offered as an example (representation in the format of the generating polynomials): ml (x)=x 5 +x 2 +1 m2 (x)=x 5
+X
4 x 3+x 2 +1 m3 (x)=x 5 x 4 x 2 x+ 1 m4 (x)=x5+X3+ 1 x 3+x 2 x+ 1 The preamble according to fig. 1 is calipered in the receiver (which, naturally, must recognize the inmsequences ml to m5 and the entire format), for example, as follows: In the sections al to a3, one sequence S1 to S3, respectively, of the length 31 length of the inmsequences) is calipered; between these sequences it is switched from one antenna to the next. Since the m-sequences are repeated three times in each section al to a3, it is not necessary to begin scanning at a specific point in time that is predetermined by the preamble. Rather, it is sufficient to caliper the predetermined number of bits at any location inside a given section. Therefore, for example, the first sequence S1 can begin with bit 17, the second with bit 108, and the third with bit 199.
Evaluation of these three sequences S 1 to S3 results in the selection of the antenna with the best reception. Subsequently, with the assistance of sequences S4 and S5, the channel burst response, and the frequency offset is estimated for that antenna. The distance between the latter sequences S4 and is selected so as to ensure good frequency offset estimations (the distance is e.g. 100 bits).
Fig. 2 is a schematic representation of a block diagram of a receiver. For example, the receiver has three antennas, 1, 2,3. With a switch 4 it is possible to switch from one antenna to another. Then follows a switch 5 which directs the data flow either to the channel estimator 6, an estimator 8 for the combined estimation of channel burst response and frequency offset, or a detector 9.
In a first step the antenna is selected. During this process the switch 4 is successively set for one antenna after the other, and one entire m-sequence (sequences S I to S3), respectively, is calipered.
With the channel estimator 6 the strongest taps are determined for each antenna 1, 2, 3. Hereafter, the antenna selector 7 selects the antenna with the most favorable transmission quality. Then the switch 4 is set accordingly to that antenna and remains at that setting for the subsequent processing of data.
The documented output contained in the taps is used, for example, as a criterion for the selection of the antenna and/or the (low) amount of echos.
With completion of the antenna selection, and in a second processing step, the switch 5 is set to the estimator 8. Now the two sequences S4 and S5 are calipered in order to obtain an estimation (preferably a combined estimation) of the channel burst response of the selected antenna, and of the frequency offset. The result of this estimation is during a third step in fact used in detector 9 for the detection of the data (which follow the preamble), and is directed toward detector 9 by setting the switch 5 correspondingly.
The implementation of the signal preamble shown in fig. 1 on the transmitter end can be accomplished with circuit elements known in the art. Fig. 3, for example, shows a block diagram of a possible circuit on the transmitter end. The 5 different m-sequences are generated with 5 linear feedback shift registers, 10.1 to 10.5 (The corresponding polynomial description was presented earlier). With a switch 11 Ithe m-sequences are called up, one after the other, and given out for signal modulation.
The switch position is maintained just long enough to give out the necessary number of repetitions.
Once the preamble is complete, the switch 13 is set to the data encoder 12 in order to transmit the user data.
Instead of linear feedback shift registers, the use of a read-only memory is also possible. Said readonly memory would contain the entire bit pattern of the preamble.
The invention is used, in particular, with HIPERLAN. However, other applications are conceivable; specifically, the length of the m-sequences and the number of repetitions can be established for individual applicable needs and/or requirements. M-sequences are preferred, in particular, because they are well suited for a combined estimation of channel burst response, and frequency offset.
Naturally, other sequences with good autocorrelation characteristics can also be used. The essential aspect for the invention is, however, that instead of a single, large synchronization sequence, several short ones are used. Thus different sequences with optimum properties for different functions can be utilized.
In summary, it can be stated that, with the bit pattern according to the invention, it is possible to optimally implement an antenna diversity with high data transmission rates and in the presence of intersymbol interference.

Claims (3)

1. Preamble in a digital signal transmission system, which is used both for packet synchronization and channel estimation, characterized by several different autocorrelation bit sequences, each of which is repeated numerous times.
2. Preamble according to claim 1, characterized in that the bit sequences are maximal length sequences in particular of a length of about
31. 3. Preamble according to claim 1 or 2, characterized 15 in that the bit sequences are repeated three times. *15 4. A digital signal transmission system with a transmitter and a receiver, including: read-only memory in the transmitter with a memorized bit sample to generate and transmit a preamble; 20 several antennae in the receiver as well as a 0switch for sequential dial-up of the antennae; a channel pulse response estimating device to determine a channel pulse response by evaluating at least one bit sequence of the transmitting preamble; an evaluating device to determine the best channel pulse response to later be able to detect a data division via the antenna with the best reception; and a circuit to execute the packet synchronization based on the transmitted preamble, characterized in that the preamble is formed by several different autocorrelation bit sequences, each of which is repeated multiple times. The digital signal transmission system as claimed in claim 4, characterized in that the evaluating device is designed to determine the shortest channel pulse response. 6. The digital signal transmission system as claimed \\melb-files\home$\Ema\Keep \Speci. 63 9.d 14/09/00 6 7 in claim 4 or 5, characterized by a circuit to determine the frequency offset. 7. A transmitter for a digital signal transmission system with read-only memory with a memorized bit sample or a circuit to generate and transmit a preamble whose purpose consists of being utilized both for packet synchronization and for channel estimation in a receiver, characterized in that the preamble is formed by several different autocorrelation bit sequences, each of which is repeated numerous times. at 0*04: 8. The transmitter as claimed in claim 7, a o characterized in that the bit sequences are m-sequences, in 15 particular of a length of 31. 9 A procedure for the operation of a digital signal transmission system in which: a preamble is transmitted from a transmitter to a 20 receiver along with data; the receiver sequentially switches between several antennae during reception of the preamble; a channel pulse response is determined for each antennae; the antennae with the best channel pulse response is selected for successive detection of data; and the transmitted preamble is utilized for the execution of packet synchronization, characterized in that: the preamble is formed by several differnet autocorrelation bit sequences, each of which is repeated several times; a channel pulse response is determined based on each sequence; and with a complete sequence being measured for each antenna. The procedure as claimed in claim 9, \\melb files\home\Ma\Kee\Specis\6 73 0.96.doc 14/09/00 7 8 characterized in that the antenna with the shorted channel pulse response is selected. 11. The procedure as claimed in claim 9 or characterized in that a frequency offset is determined on the basis of two estimations of the channel pulse response that are conducted at intervals. 12. Preamble in a digital signal transmission system, substantially as herein described with reference to the accompanying drawings. 13. A digital transmission system with a transmitter and a receiver, substantially as herein described with S* 15 reference to the accompanying drawings. 4 14. A transmitter for a digital signal transmission system, substantially as herein described with reference to the accompanying drawings. 15. A procedure for the operation of a digital signal o.. transmission system, substantially as herein described. C Dated this 15th day of September 2000 ASCOM SYSTEC AG By their Patent Attorneys GRIFFITH HACK Fellows Institute of Patent and Trade Mark Attorneys of Australia \\melb files\hom$\\KeeP\SPecis\ 73 9 6d 14/09/00 8
AU67305/96A 1996-09-04 1996-09-04 Preamble for estimating the channel impulse response in an antenna diversity system Ceased AU726748B2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CH1996/000302 WO1998010531A1 (en) 1996-09-04 1996-09-04 Preamble for the assessment of channel impulse response in a antenna diversity system

Publications (2)

Publication Number Publication Date
AU6730596A AU6730596A (en) 1998-03-26
AU726748B2 true AU726748B2 (en) 2000-11-16

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AU67305/96A Ceased AU726748B2 (en) 1996-09-04 1996-09-04 Preamble for estimating the channel impulse response in an antenna diversity system

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EP (1) EP0931389A1 (en)
JP (1) JP2001504648A (en)
AU (1) AU726748B2 (en)
CA (1) CA2264789A1 (en)
WO (1) WO1998010531A1 (en)

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GB2347831B (en) * 1999-03-06 2004-07-07 Nec Technologies Sychronisation in digital data transmission systems

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ATE301900T1 (en) 1999-06-04 2005-08-15 Broadcom Corp METHOD AND DEVICE FOR DETERMINING THE CHANNEL AND BUILD FREQUENCY OFFSET ESTIMATE USING A PREAMBLE WITH A REPEATING SEQUENCE
US6952454B1 (en) 2000-03-22 2005-10-04 Qualcomm, Incorporated Multiplexing of real time services and non-real time services for OFDM systems
US6473467B1 (en) * 2000-03-22 2002-10-29 Qualcomm Incorporated Method and apparatus for measuring reporting channel state information in a high efficiency, high performance communications system
US6661857B1 (en) * 2000-07-10 2003-12-09 Intersil Americas Inc. Rapid estimation of wireless channel impulse response
GB2412043B (en) * 2003-02-27 2006-02-15 Toshiba Res Europ Ltd Signal processing apparatus and methods
US20060190793A1 (en) * 2005-02-18 2006-08-24 Marlin Viss Establishing a reference bit in a bit pattern
DE602006014398D1 (en) 2006-08-21 2010-07-01 Sony Deutschland Gmbh Apparatus and method for selecting antennas in a radio communication system
EP4047893A1 (en) 2021-02-23 2022-08-24 Nokia Solutions and Networks Oy An equalizer and an equalizer training unit for data-dependent distortion compensation

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GB2272609A (en) * 1992-11-12 1994-05-18 Northern Telecom Ltd Method of introducing additional outstations into TDMA telecommunications systems
WO1995009494A1 (en) * 1993-09-30 1995-04-06 Pacific Communication Sciences, Inc. Multiple antenna home base for digital cordless telephones

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GB2272609A (en) * 1992-11-12 1994-05-18 Northern Telecom Ltd Method of introducing additional outstations into TDMA telecommunications systems
WO1995009494A1 (en) * 1993-09-30 1995-04-06 Pacific Communication Sciences, Inc. Multiple antenna home base for digital cordless telephones

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Publication number Priority date Publication date Assignee Title
GB2347831B (en) * 1999-03-06 2004-07-07 Nec Technologies Sychronisation in digital data transmission systems

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WO1998010531A1 (en) 1998-03-12
CA2264789A1 (en) 1998-03-12
JP2001504648A (en) 2001-04-03
EP0931389A1 (en) 1999-07-28
AU6730596A (en) 1998-03-26

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