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AU5126699A - Blind pin placement on circuit boards - Google Patents

Blind pin placement on circuit boards

Info

Publication number
AU5126699A
AU5126699A AU51266/99A AU5126699A AU5126699A AU 5126699 A AU5126699 A AU 5126699A AU 51266/99 A AU51266/99 A AU 51266/99A AU 5126699 A AU5126699 A AU 5126699A AU 5126699 A AU5126699 A AU 5126699A
Authority
AU
Australia
Prior art keywords
circuit boards
pin placement
blind pin
blind
placement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU51266/99A
Inventor
James Brunsch
Timothy C. Collins
Bo Pi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Star Equity Holdings Inc
Original Assignee
Digirad Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digirad Corp filed Critical Digirad Corp
Publication of AU5126699A publication Critical patent/AU5126699A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/1031—Surface mounted metallic connector elements
    • H05K2201/10318—Surface mounted metallic pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
AU51266/99A 1998-07-22 1999-07-22 Blind pin placement on circuit boards Abandoned AU5126699A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US9383398P 1998-07-22 1998-07-22
US60093833 1998-07-22
US35905799A 1999-07-21 1999-07-21
US35905899A 1999-07-21 1999-07-21
US09359058 1999-07-21
US09359057 1999-07-21
PCT/US1999/016745 WO2000005748A2 (en) 1998-07-22 1999-07-22 Blind pin placement on circuit boards

Publications (1)

Publication Number Publication Date
AU5126699A true AU5126699A (en) 2000-02-14

Family

ID=27377583

Family Applications (1)

Application Number Title Priority Date Filing Date
AU51266/99A Abandoned AU5126699A (en) 1998-07-22 1999-07-22 Blind pin placement on circuit boards

Country Status (2)

Country Link
AU (1) AU5126699A (en)
WO (1) WO2000005748A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4237966B2 (en) * 2002-03-08 2009-03-11 浜松ホトニクス株式会社 Detector
CN106501706B (en) * 2016-11-03 2019-06-04 昆山万像光电有限公司 A kind of blind hole detection method of printed circuit board

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5006922A (en) * 1990-02-14 1991-04-09 Motorola, Inc. Packaged semiconductor device having a low cost ceramic PGA package
US5485037A (en) * 1993-04-12 1996-01-16 Amkor Electronics, Inc. Semiconductor device having a thermal dissipator and electromagnetic shielding
US5483102A (en) * 1994-05-12 1996-01-09 Intel Corporation Employing on die temperature sensors and fan-heatsink failure signals to control power dissipation
US5615086A (en) * 1994-05-17 1997-03-25 Tandem Computers Incorporated Apparatus for cooling a plurality of electrical components mounted on a printed circuit board
MY112145A (en) * 1994-07-11 2001-04-30 Ibm Direct attachment of heat sink attached directly to flip chip using flexible epoxy
US5625166A (en) * 1994-11-01 1997-04-29 Intel Corporation Structure of a thermally and electrically enhanced plastic pin grid array (PPGA) package for high performance devices with wire bond interconnect
US5739584A (en) * 1995-06-07 1998-04-14 Lsi Logic Corporation Multiple pin die package

Also Published As

Publication number Publication date
WO2000005748A2 (en) 2000-02-03
WO2000005748A3 (en) 2000-05-04

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase