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AU2002228873A1 - Full-speed bist controller for testing embedded synchronous memories - Google Patents

Full-speed bist controller for testing embedded synchronous memories

Info

Publication number
AU2002228873A1
AU2002228873A1 AU2002228873A AU2887302A AU2002228873A1 AU 2002228873 A1 AU2002228873 A1 AU 2002228873A1 AU 2002228873 A AU2002228873 A AU 2002228873A AU 2887302 A AU2887302 A AU 2887302A AU 2002228873 A1 AU2002228873 A1 AU 2002228873A1
Authority
AU
Australia
Prior art keywords
full
bist controller
synchronous memories
testing embedded
embedded synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002228873A
Inventor
Wu-Tung Cheng
Christopher John Hill
Omar Kebichi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mentor Graphics Corp
Original Assignee
Mentor Graphics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mentor Graphics Corp filed Critical Mentor Graphics Corp
Publication of AU2002228873A1 publication Critical patent/AU2002228873A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders
    • G11C29/16—Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
AU2002228873A 2000-11-13 2001-11-09 Full-speed bist controller for testing embedded synchronous memories Abandoned AU2002228873A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US24833700P 2000-11-13 2000-11-13
US60/248,337 2000-11-13
US09/800,092 US6829728B2 (en) 2000-11-13 2001-03-05 Full-speed BIST controller for testing embedded synchronous memories
US09/800,092 2001-03-05
PCT/US2001/047079 WO2002039460A2 (en) 2000-11-13 2001-11-09 Full-speed bist controller for testing embedded synchronous memories

Publications (1)

Publication Number Publication Date
AU2002228873A1 true AU2002228873A1 (en) 2002-05-21

Family

ID=26939285

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002228873A Abandoned AU2002228873A1 (en) 2000-11-13 2001-11-09 Full-speed bist controller for testing embedded synchronous memories

Country Status (3)

Country Link
US (2) US6829728B2 (en)
AU (1) AU2002228873A1 (en)
WO (1) WO2002039460A2 (en)

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Also Published As

Publication number Publication date
US7721174B2 (en) 2010-05-18
US20050066247A1 (en) 2005-03-24
US6829728B2 (en) 2004-12-07
WO2002039460A2 (en) 2002-05-16
WO2002039460A3 (en) 2003-04-17
US20020059543A1 (en) 2002-05-16

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