AU1124500A - Approach for routing an integrated circuit - Google Patents

Approach for routing an integrated circuit

Info

Publication number: AU1124500A
Authority: AU; Australia
Prior art keywords: routing; approach; integrated circuit; integrated; circuit
Prior art date: 1998-10-19
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Abandoned

Application number

AU11245/00A

Inventor

David C. Chapman

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

DAVID C CHAPMAN

Original Assignee

DAVID C CHAPMAN

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1998-10-19

Filing date

1999-10-19

Publication date

2000-05-08

1999-10-19 Application filed by DAVID C CHAPMAN filed Critical DAVID C CHAPMAN

2000-05-08 Publication of AU1124500A publication Critical patent/AU1124500A/en

Status Abandoned legal-status Critical Current

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/394—Routing
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]

Landscapes

Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Physics & Mathematics (AREA)
Theoretical Computer Science (AREA)
Evolutionary Computation (AREA)
Geometry (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Computer Networks & Wireless Communication (AREA)
Design And Manufacture Of Integrated Circuits (AREA)

AU11245/00A 1998-10-19 1999-10-19 Approach for routing an integrated circuit Abandoned AU1124500A (en)

Applications Claiming Priority (5)

Application Number	Priority Date	Filing Date	Title
US10487298P	1998-10-19	1998-10-19
US60104872		1998-10-19
US13953299P	1999-06-16	1999-06-16
US60139532		1999-06-16
PCT/US1999/024454 WO2000023920A1 (en)	1998-10-19	1999-10-19	Approach for routing an integrated circuit

Publications (1)

Publication Number	Publication Date
AU1124500A true AU1124500A (en)	2000-05-08

Family

ID=26802032

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AU11245/00A Abandoned AU1124500A (en)	1998-10-19	1999-10-19	Approach for routing an integrated circuit

Country Status (8)

Country	Link
EP (1)	EP1131749A1 (en)
JP (1)	JP2002528795A (en)
KR (1)	KR100910421B1 (en)
AU (1)	AU1124500A (en)
CA (1)	CA2345443C (en)
IL (1)	IL142305A0 (en)
TW (1)	TW495686B (en)
WO (1)	WO2000023920A1 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US8266294B2 (en)	2003-08-13	2012-09-11	Microsoft Corporation	Routing hints
US7882251B2 (en)	2003-08-13	2011-02-01	Microsoft Corporation	Routing hints
JP2005115785A (en) *	2003-10-09	2005-04-28	Nec Electronics Corp	Method for wiring semiconductor device, method for producing semiconductor device, and semiconductor device
KR100674934B1 (en) *	2005-01-06	2007-01-26	삼성전자주식회사	Method of determining an optimized tile-switch (mapping) structure on an on-chip bus and a computer-readable recording medium recording the method
US7376927B2 (en) *	2005-06-13	2008-05-20	Advanced Micro Devices, Inc.	Manhattan routing with minimized distance to destination points
EP1907957A4 (en)	2005-06-29	2013-03-20	Otrsotech Ltd Liability Company	Methods and systems for placement
US7752588B2 (en)	2005-06-29	2010-07-06	Subhasis Bose	Timing driven force directed placement flow
US7681170B2 (en)	2006-02-09	2010-03-16	Qualcomm Incorporated	Method and apparatus for insertion of filling forms within a design layout
US8332793B2 (en)	2006-05-18	2012-12-11	Otrsotech, Llc	Methods and systems for placement and routing
US7840927B1 (en)	2006-12-08	2010-11-23	Harold Wallace Dozier	Mutable cells for use in integrated circuits
TWI403914B (en) *	2010-03-08	2013-08-01	Mstar Semiconductor Inc	Apparatus and method for preventing congestive placement
CN111159830B (en) *	2019-11-30	2024-06-07	浙江华云信息科技有限公司	Orthogonal line segment inflection point merging line layout method based on characteristic shape

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5258920A (en) *	1989-12-26	1993-11-02	General Electric Company	Locally orientation specific routing system
US5450331A (en) *	1992-01-24	1995-09-12	Vlsi Technology, Inc.	Method for verifying circuit layout design
JPH06196563A (en) *	1992-09-29	1994-07-15	Internatl Business Mach Corp <Ibm>	Computable overclowded region wiring to vlsi wiring design
US5550748A (en) *	1994-03-22	1996-08-27	Cadence Design Systems, Inc.	Region search for delay routing and signal net matching
JP3335250B2 (en) *	1994-05-27	2002-10-15	株式会社東芝	Semiconductor integrated circuit wiring method

1999
- 1999-10-18 TW TW088117993A patent/TW495686B/en not_active IP Right Cessation
- 1999-10-19 AU AU11245/00A patent/AU1124500A/en not_active Abandoned
- 1999-10-19 CA CA002345443A patent/CA2345443C/en not_active Expired - Fee Related
- 1999-10-19 KR KR1020017004914A patent/KR100910421B1/en not_active IP Right Cessation
- 1999-10-19 EP EP99955051A patent/EP1131749A1/en not_active Withdrawn
- 1999-10-19 JP JP2000577593A patent/JP2002528795A/en active Pending
- 1999-10-19 WO PCT/US1999/024454 patent/WO2000023920A1/en active Application Filing
- 1999-10-19 IL IL14230599A patent/IL142305A0/en unknown

Also Published As

Publication number	Publication date
TW495686B (en)	2002-07-21
KR100910421B1 (en)	2009-08-04
WO2000023920A1 (en)	2000-04-27
CA2345443C (en)	2009-09-15
IL142305A0 (en)	2002-03-10
CA2345443A1 (en)	2000-04-27
EP1131749A1 (en)	2001-09-12
KR20010087374A (en)	2001-09-15
JP2002528795A (en)	2002-09-03
WO2000023920A9 (en)	2000-09-14

Publication	Publication Date	Title
AU2481699A (en)	1999-09-06	Non-lot based method for assembling integrated circuit devices
AU2298199A (en)	1999-08-23	Integrated circuit device
AU9175898A (en)	1999-04-12	An integrated optical circuit
AU4394999A (en)	2000-01-17	Pll circuit
AU1405500A (en)	2000-07-03	An exsanguinator
AU5969398A (en)	1998-10-01	Integrated circuit device cooling structure
AU4801500A (en)	2000-11-10	Subgrid detailed routing
AU3509397A (en)	1998-03-26	An integrated circuit package
AU2934699A (en)	1999-10-18	Demoludator circuits
AU3113097A (en)	1998-01-05	Conductors for integrated circuits
AU2444299A (en)	1999-08-02	Multi-service circuit for telecommunications
AU1784401A (en)	2001-06-25	Method for making an integrated optical circuit
AU3643597A (en)	1998-03-26	An integrated circuit package
AU1122800A (en)	2000-05-08	Mid-trip stop for circuit breaker
AU5555199A (en)	2000-04-17	Current biasing circuit
AU1124500A (en)	2000-05-08	Approach for routing an integrated circuit
AU5911200A (en)	2001-01-30	Circuit
EP0817272A3 (en)	1998-05-06	Integrated circuit
AU5997300A (en)	2001-02-05	An optical circuit
AU3597697A (en)	1998-03-26	An integrated circuit package
AU1112699A (en)	1999-05-17	Integrated signal routing circuit
AU4805899A (en)	2000-02-01	Arrangement for establishing an alternative telecommunications path
GB9818630D0 (en)	1998-10-21	Optical/electrical inputs for an integrated circuit
AU6330399A (en)	2000-04-17	Semiconductor structure for semiconductor components
GB2337346B (en)	2001-04-11	Integrated circuit routing

Legal Events

Date	Code	Title	Description
2001-07-19	MK6	Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase