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ATE496374T1 - READING METHOD FOR NON-VOLATILE MEMORY WITH COMPENSATION OF THE FLOATING-GATE COUPLING - Google Patents

READING METHOD FOR NON-VOLATILE MEMORY WITH COMPENSATION OF THE FLOATING-GATE COUPLING

Info

Publication number
ATE496374T1
ATE496374T1 AT09015112T AT09015112T ATE496374T1 AT E496374 T1 ATE496374 T1 AT E496374T1 AT 09015112 T AT09015112 T AT 09015112T AT 09015112 T AT09015112 T AT 09015112T AT E496374 T1 ATE496374 T1 AT E496374T1
Authority
AT
Austria
Prior art keywords
memory cell
adjacent
coupling
floating
pass voltage
Prior art date
Application number
AT09015112T
Other languages
German (de)
Inventor
Nima Mokhlesi
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/384,057 external-priority patent/US7499319B2/en
Priority claimed from US11/377,972 external-priority patent/US7436733B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE496374T1 publication Critical patent/ATE496374T1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To account for this coupling, the read process for a particular memory cell will provide compensation to an adjacent memory cell in order to reduce the coupling effect that the adjacent memory cell has on the particular memory cell. For this, a read voltage is applied to the word line of the selected memory cell, a second pass voltage is applied to the word line of the memory cell adjacent to the selected memory cell and a first pass voltage is applied to the further word lines. Before reading the selected memory cell, the state of the adjacent memory cell is read and, according to this state, the second pass voltage is set.
AT09015112T 2006-03-03 2007-02-27 READING METHOD FOR NON-VOLATILE MEMORY WITH COMPENSATION OF THE FLOATING-GATE COUPLING ATE496374T1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US77885706P 2006-03-03 2006-03-03
US11/384,057 US7499319B2 (en) 2006-03-03 2006-03-17 Read operation for non-volatile storage with compensation for coupling
US11/377,972 US7436733B2 (en) 2006-03-03 2006-03-17 System for performing read operation on non-volatile storage with compensation for coupling

Publications (1)

Publication Number Publication Date
ATE496374T1 true ATE496374T1 (en) 2011-02-15

Family

ID=38229358

Family Applications (2)

Application Number Title Priority Date Filing Date
AT09015112T ATE496374T1 (en) 2006-03-03 2007-02-27 READING METHOD FOR NON-VOLATILE MEMORY WITH COMPENSATION OF THE FLOATING-GATE COUPLING
AT07751706T ATE494614T1 (en) 2006-03-03 2007-02-27 READ OPERATION FOR NON-VOLATILE MEMORY WITH FLOATING GATE COUPLING COMPENSATION

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT07751706T ATE494614T1 (en) 2006-03-03 2007-02-27 READ OPERATION FOR NON-VOLATILE MEMORY WITH FLOATING GATE COUPLING COMPENSATION

Country Status (8)

Country Link
EP (2) EP1991989B1 (en)
JP (1) JP4954223B2 (en)
KR (1) KR101015612B1 (en)
CN (1) CN101395673B (en)
AT (2) ATE496374T1 (en)
DE (2) DE602007012157D1 (en)
TW (1) TWI330848B (en)
WO (1) WO2007103038A1 (en)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7499319B2 (en) 2006-03-03 2009-03-03 Sandisk Corporation Read operation for non-volatile storage with compensation for coupling
TWI335596B (en) * 2006-06-02 2011-01-01 Sandisk Corp Method and system for data pattern sensitivity compensation using different voltage
US7894269B2 (en) * 2006-07-20 2011-02-22 Sandisk Corporation Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells
CN101627443B (en) * 2006-12-29 2012-10-03 桑迪士克股份有限公司 Reading non-volatile memory cells by taking into account the stored states of neighboring memory cells
TWI380311B (en) * 2006-12-29 2012-12-21 Sandisk Technologies Inc Systems and methods for margined neighbor reading for non-volatile memory read operations including coupling compensation
US7518923B2 (en) 2006-12-29 2009-04-14 Sandisk Corporation Margined neighbor reading for non-volatile memory read operations including coupling compensation
US7606070B2 (en) 2006-12-29 2009-10-20 Sandisk Corporation Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation
KR101291667B1 (en) * 2007-08-20 2013-08-01 삼성전자주식회사 Non-volatile memory device and reading method of the same
US7652929B2 (en) * 2007-09-17 2010-01-26 Sandisk Corporation Non-volatile memory and method for biasing adjacent word line for verify during programming
US7663932B2 (en) * 2007-12-27 2010-02-16 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
KR101468149B1 (en) * 2008-09-19 2014-12-03 삼성전자주식회사 Flash memory device and systems and reading methods thereof
US8737129B2 (en) 2008-11-14 2014-05-27 Samsung Electronics Co., Ltd. Nonvolatile memory device and read method thereof
KR101490426B1 (en) * 2008-11-14 2015-02-06 삼성전자주식회사 Nonvolatile memory device and read method thereof
KR101618063B1 (en) 2009-06-10 2016-05-04 삼성전자주식회사 Non-volatile semiconductor memory device and method of reading the same
US8482975B2 (en) * 2009-09-14 2013-07-09 Micron Technology, Inc. Memory kink checking
JP4913191B2 (en) * 2009-09-25 2012-04-11 株式会社東芝 Nonvolatile semiconductor memory device
US8169822B2 (en) 2009-11-11 2012-05-01 Sandisk Technologies Inc. Data state-dependent channel boosting to reduce channel-to-floating gate coupling in memory
KR101678907B1 (en) 2010-06-01 2016-11-23 삼성전자주식회사 Nonvolatile memory device capable of reducing read disturbance and read method thereof
JP5198529B2 (en) * 2010-09-22 2013-05-15 株式会社東芝 Nonvolatile semiconductor memory device
JP5404685B2 (en) * 2011-04-06 2014-02-05 株式会社東芝 Nonvolatile semiconductor memory device
KR20130072084A (en) 2011-12-21 2013-07-01 에스케이하이닉스 주식회사 Reading method of nonvolatile memory device
US9001577B2 (en) * 2012-06-01 2015-04-07 Micron Technology, Inc. Memory cell sensing
JP6088751B2 (en) 2012-06-07 2017-03-01 株式会社東芝 Semiconductor memory
KR20160023305A (en) * 2014-08-22 2016-03-03 에스케이하이닉스 주식회사 Electronic apparatus
CN108109664A (en) * 2017-11-29 2018-06-01 深圳忆联信息系统有限公司 A kind of method alleviated MLC flash and read interference problem
CN110648710A (en) * 2018-06-26 2020-01-03 北京兆易创新科技股份有限公司 Method and device for applying word line voltage, electronic device and storage medium
CN110648714B (en) * 2018-06-26 2021-03-30 北京兆易创新科技股份有限公司 Data reading method and device, electronic equipment and storage medium
CN110689913B (en) * 2018-07-05 2024-07-26 三星电子株式会社 Non-volatile memory device
KR102211122B1 (en) 2018-12-20 2021-02-02 삼성전자주식회사 Storage device and storage system
CN110223724A (en) * 2019-05-10 2019-09-10 北京兆易创新科技股份有限公司 A kind of read operation method and device of NAND FLASH
CN111066087A (en) 2019-10-29 2020-04-24 长江存储科技有限责任公司 Method for programming a memory device
US11557350B2 (en) * 2020-10-16 2023-01-17 Western Digital Technologies, Inc. Dynamic read threshold calibration
US11670379B2 (en) * 2020-12-04 2023-06-06 Micron Technology, Inc. Sense line structures in capacitive sense NAND memory

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1312504A (en) 1919-08-05 Thermic
US1519904A (en) 1922-08-09 1924-12-16 Clifford L Cummings Combination bonnet lock and ignition-cut-off device for motor vehicles
US2653604A (en) 1950-12-19 1953-09-29 Jr George N Hein Injection device
KR960002006B1 (en) 1991-03-12 1996-02-09 가부시끼가이샤 도시바 Electrically Erasable and Programmable Nonvolatile Memory Device with Write Verification Controller Using Two Reference Levels
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5555204A (en) 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
KR0169267B1 (en) 1993-09-21 1999-02-01 사토 후미오 Nonvolatile Semiconductor Memory
US5903495A (en) 1996-03-18 1999-05-11 Kabushiki Kaisha Toshiba Semiconductor device and memory system
US6857099B1 (en) * 1996-09-18 2005-02-15 Nippon Steel Corporation Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
US5867429A (en) 1997-11-19 1999-02-02 Sandisk Corporation High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates
US6614070B1 (en) * 1998-04-16 2003-09-02 Cypress Semiconductor Corporation Semiconductor non-volatile memory device having a NAND cell structure
JP3829088B2 (en) * 2001-03-29 2006-10-04 株式会社東芝 Semiconductor memory device
US6522580B2 (en) 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US6456528B1 (en) 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
CN1215561C (en) * 2002-01-11 2005-08-17 力晶半导体股份有限公司 Random Programmable Non-Volatile Semiconductor Memory
US7327619B2 (en) 2002-09-24 2008-02-05 Sandisk Corporation Reference sense amplifier for non-volatile memory
US7046568B2 (en) 2002-09-24 2006-05-16 Sandisk Corporation Memory sensing circuit and method for low voltage operation
US7196931B2 (en) 2002-09-24 2007-03-27 Sandisk Corporation Non-volatile memory and method with reduced source line bias errors
JP3913704B2 (en) * 2003-04-22 2007-05-09 株式会社東芝 Nonvolatile semiconductor memory device and electronic device using the same
US7237074B2 (en) 2003-06-13 2007-06-26 Sandisk Corporation Tracking cells for a memory system
US6956770B2 (en) * 2003-09-17 2005-10-18 Sandisk Corporation Non-volatile memory and method with bit line compensation dependent on neighboring operating modes
US7372730B2 (en) * 2004-01-26 2008-05-13 Sandisk Corporation Method of reading NAND memory to compensate for coupling between storage elements
KR100626371B1 (en) * 2004-03-30 2006-09-20 삼성전자주식회사 Non-volatile memory device performing cache read operation, memory system including the same, and cache read method
US7120051B2 (en) 2004-12-14 2006-10-10 Sandisk Corporation Pipelined programming of non-volatile memories using early data
US20060140007A1 (en) 2004-12-29 2006-06-29 Raul-Adrian Cernea Non-volatile memory and method with shared processing for an aggregate of read/write circuits
US7187585B2 (en) * 2005-04-05 2007-03-06 Sandisk Corporation Read operation for non-volatile storage that includes compensation for coupling
US7196928B2 (en) 2005-04-05 2007-03-27 Sandisk Corporation Compensating for coupling during read operations of non-volatile memory
US9913305B2 (en) 2014-08-11 2018-03-06 Intel IP Corporation Systems, methods, and devices for congestion control on a mobile network

Also Published As

Publication number Publication date
EP2161723B1 (en) 2011-01-19
JP4954223B2 (en) 2012-06-13
ATE494614T1 (en) 2011-01-15
CN101395673B (en) 2011-09-21
JP2009528651A (en) 2009-08-06
EP1991989A1 (en) 2008-11-19
DE602007012157D1 (en) 2011-03-03
KR101015612B1 (en) 2011-02-17
TW200802389A (en) 2008-01-01
EP1991989B1 (en) 2011-01-05
TWI330848B (en) 2010-09-21
DE602007011736D1 (en) 2011-02-17
CN101395673A (en) 2009-03-25
WO2007103038A1 (en) 2007-09-13
KR20090026117A (en) 2009-03-11
EP2161723A1 (en) 2010-03-10

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