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ATE127598T1 - Verfahren zum modifizieren eines fehlertoleranten datenverarbeitungssystems. - Google Patents

Verfahren zum modifizieren eines fehlertoleranten datenverarbeitungssystems.

Info

Publication number
ATE127598T1
ATE127598T1 AT90201393T AT90201393T ATE127598T1 AT E127598 T1 ATE127598 T1 AT E127598T1 AT 90201393 T AT90201393 T AT 90201393T AT 90201393 T AT90201393 T AT 90201393T AT E127598 T1 ATE127598 T1 AT E127598T1
Authority
AT
Austria
Prior art keywords
processors
slow
cycle
bus clock
fast
Prior art date
Application number
AT90201393T
Other languages
English (en)
Inventor
Paul Theo Maria Reynders
Original Assignee
Bell Telephone Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bell Telephone Mfg filed Critical Bell Telephone Mfg
Application granted granted Critical
Publication of ATE127598T1 publication Critical patent/ATE127598T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
AT90201393T 1990-06-01 1990-06-01 Verfahren zum modifizieren eines fehlertoleranten datenverarbeitungssystems. ATE127598T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP90201393A EP0459035B1 (de) 1990-06-01 1990-06-01 Verfahren zum Modifizieren eines fehlertoleranten Datenverarbeitungssystems

Publications (1)

Publication Number Publication Date
ATE127598T1 true ATE127598T1 (de) 1995-09-15

Family

ID=8205025

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90201393T ATE127598T1 (de) 1990-06-01 1990-06-01 Verfahren zum modifizieren eines fehlertoleranten datenverarbeitungssystems.

Country Status (8)

Country Link
US (1) US5287492A (de)
EP (1) EP0459035B1 (de)
JP (1) JPH04232535A (de)
AT (1) ATE127598T1 (de)
AU (1) AU643287B2 (de)
CA (1) CA2043555C (de)
DE (1) DE69022221T2 (de)
ES (1) ES2079433T3 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6157967A (en) * 1992-12-17 2000-12-05 Tandem Computer Incorporated Method of data communication flow control in a data processing system using busy/ready commands
US6496940B1 (en) * 1992-12-17 2002-12-17 Compaq Computer Corporation Multiple processor system with standby sparing
JPH0773059A (ja) * 1993-03-02 1995-03-17 Tandem Comput Inc フォールトトレラント型コンピュータシステム
US5473771A (en) * 1993-09-01 1995-12-05 At&T Corp. Fault-tolerant processing system architecture
US5758132A (en) * 1995-03-29 1998-05-26 Telefonaktiebolaget Lm Ericsson Clock control system and method using circuitry operating at lower clock frequency for selecting and synchronizing the switching of higher frequency clock signals
DE19620622A1 (de) * 1996-05-22 1997-11-27 Siemens Ag Verfahren zur Synchronisation von Programmen auf unterschiedlichen Computern eines Verbundes
GB2359385B (en) * 2000-02-16 2004-04-07 Data Connection Ltd Method for upgrading running software processes without compromising fault-tolerance
US6687849B1 (en) 2000-06-30 2004-02-03 Cisco Technology, Inc. Method and apparatus for implementing fault-tolerant processing without duplicating working process
US9547328B2 (en) * 2014-02-12 2017-01-17 Ge-Hitachi Nuclear Energy Americas Llc Methods and apparatuses for reducing common mode failures of nuclear safety-related software control systems

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1269827B (de) * 1965-09-09 1968-06-06 Siemens Ag Verfahren und Zusatzeinrichtung zur Synchronisierung von parallel arbeitenden Datenverarbeitungsanlagen
NL153059B (nl) * 1967-01-23 1977-04-15 Bell Telephone Mfg Automatisch telecommunicatie-schakelstelsel.
SE347826B (de) * 1970-11-20 1972-08-14 Ericsson Telefon Ab L M
US3810119A (en) * 1971-05-04 1974-05-07 Us Navy Processor synchronization scheme
BE790654A (fr) * 1971-10-28 1973-04-27 Siemens Ag Systeme de traitement avec des unites de systeme
DE2701924C3 (de) * 1977-01-19 1987-07-30 Standard Elektrik Lorenz Ag, 7000 Stuttgart Steuereinrichtung für spurgebundene Fahrzeuge
US4569017A (en) * 1983-12-22 1986-02-04 Gte Automatic Electric Incorporated Duplex central processing unit synchronization circuit
DE3431169A1 (de) * 1984-08-24 1986-03-06 Standard Elektrik Lorenz Ag, 7000 Stuttgart Verfahren zur synchronisation mehrerer parallelarbeitender rechner
EP0236780B1 (de) * 1986-03-12 1992-02-19 Siemens Aktiengesellschaft Verfahren zum Betrieb einer fehlergesicherten und hochverfügbaren Multiprozessor-Zentraleinheit eines Vermittlungssystemes
US4797884A (en) * 1986-09-29 1989-01-10 Texas Instruments Incorporated Redundant device control unit
DE3638947C2 (de) * 1986-11-14 1995-08-31 Bosch Gmbh Robert Verfahren zur Synchronisation von Rechnern eines Mehrrechnersystems und Mehrrechnersystem
AU625293B2 (en) * 1988-12-09 1992-07-09 Tandem Computers Incorporated Synchronization of fault-tolerant computer system having multiple processors

Also Published As

Publication number Publication date
EP0459035B1 (de) 1995-09-06
CA2043555C (en) 1995-06-20
JPH04232535A (ja) 1992-08-20
DE69022221D1 (de) 1995-10-12
AU7807091A (en) 1991-12-05
CA2043555A1 (en) 1991-12-02
DE69022221T2 (de) 1996-04-04
US5287492A (en) 1994-02-15
ES2079433T3 (es) 1996-01-16
EP0459035A1 (de) 1991-12-04
AU643287B2 (en) 1993-11-11

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