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Chi Phạm Minh

    Chi Phạm Minh

    For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems should guarantee correct execution even when transactions... more
    For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems should guarantee correct execution even when transactions exceed scheduling quanta, overflow the capacity of hardware caches and physical memory, or include more independent nesting levels than what is supported in hardware. Existing proposals for TM virtualization are either incomplete or rely on complex hardware implementations, which are an overkill if virtualization is invoked infrequently in the common case.We present eXtended Transactional Memory (XTM), the first TM virtualization system that virtualizes all aspects of transactional execution (time, space, and nesting depth). XTM is implemented in software using virtual memory support. It operates at page granularity, using private copies of overflowed pages to buffer memory updates until the transaction commits and snapshots of pages to detect interfer...
    We analyze various characteristics of semantic transactional memory footprint (STMF) that consists of only the memory accesses the underlying hardware transactional memory (HTM) system has to manage for the correct execution of... more
    We analyze various characteristics of semantic transactional memory footprint (STMF) that consists of only the memory accesses the underlying hardware transactional memory (HTM) system has to manage for the correct execution of transactional programs. Our analysis shows that STMF can be significantly smaller than declarative transactional memory footprint (DTMF) that contains all memory accesses within transaction boundaries (i.e., only 8.3%
    ... Techniques for Parallel Cognitive Applications Woongki Baek, JaeWoong Chung, Chi Cao Minh, Christos Kozyrakis, and Kunle Olukotun Computer Systems Laboratory Stanford University {wkbaek, jwchung, caominh, kozyraki, kunle}@stanford.edu... more
    ... Techniques for Parallel Cognitive Applications Woongki Baek, JaeWoong Chung, Chi Cao Minh, Christos Kozyrakis, and Kunle Olukotun Computer Systems Laboratory Stanford University {wkbaek, jwchung, caominh, kozyraki, kunle}@stanford.edu ...
    We propose signature-accelerated transactional memory (SigTM), ahybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the read-set and write-set forpending transactions and perform... more
    We propose signature-accelerated transactional memory (SigTM), ahybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the read-set and write-set forpending transactions and perform conflict detection between concurrent threads. All other transactional functionality, including dataversioning, is implemented in software. Unlike previously proposed hybrid TM systems, SigTM requires no modifications to the hardware caches, which reduces hardware cost and simplifies support for nested transactions and multithreaded processor cores. SigTM is also the first hybrid TM system to provide strong isolation guarantees between transactional blocks and non-transactional accesses without additional read and write barriers in non-transactional code. Using a set of parallel programs that make frequent use of coarse-grain transactions, we show that SigTM accelerates software transactions by 30% to 280%. For certain workloads, SigTM can match the p...
    AB 5 type alloys of composition LaNi 4,3-x Co x Mn 0,4 Al 0,3 (x = 0, 0.25, 0.5, 0.75 and 1.0) are prepared and annealed to make ingot electrodes which allow to measure the impedance on its well defi ned fl at surface. From experimental... more
    AB 5 type alloys of composition LaNi 4,3-x Co x Mn 0,4 Al 0,3 (x = 0, 0.25, 0.5, 0.75 and 1.0) are prepared and annealed to make ingot electrodes which allow to measure the impedance on its well defi ned fl at surface. From experimental data of the impedance, the real part Zr and the capacitance C have been examined according to the applied corresponding frequencies and polarisation potentials. It is found that Zr, and hence suitable Co ratios x, are affected in the same time by applied potentials and impedance signal frequencies. There are two suitable Co ratios x = 0.5 and x = 0.75 correspond- ing to two opposite processes, one of charging at R = -1.2V and the other of discharging at -0.9 V, respectively. It was found that there are transitional frequencies and potentials for the passage of the fi rst suitable Co ratio to the second.
    Bratin Saha*, Ali-Reza Adl-Tabatabai*, Richard L. Hudson*, Chi Cao Minh**, Benjamin Hertzberg** * Programming System Lab Microprocessor Technology Lab Intel Corporation {Bratin.Saha, Ali-Reza.Adl-Tabatabai, Rick.Hudson} @Intel.com