2014 IEEE International Conference on Data Mining Workshop, 2014
Linking multiple data collections to create longitudinal data is an important research problem wi... more Linking multiple data collections to create longitudinal data is an important research problem with multiple applications. Longitudinal data allows analysts to perform studies that would be unfeasible otherwise. In our research we are interested in linking historical census collections to create longitudinal data that would allow tracking people overtime. The goal of the linking is to identify the same person in multiple census collections. A classification system is employed to make the decision if two people are the same or not, based on their characteristics. In this paper we present an empirical study where we explore the use of three different classifiers in a record linkage system and we evaluate their performance.
Special purpose instruction set processors (lSPS) challenge compilers because of instruction leve... more Special purpose instruction set processors (lSPS) challenge compilers because of instruction level par-allelism, small numbers of registers, and highly spe-cialized register capabilities. Many traditionally sepa-rate subproblems in code generation have been unified and jointly optimized within a single integer linear pro-gramming (ILP) model. ILP modeling provides a pow-erful methodology for for generating high-quality code for a variety of ISPS. 1
1. The problem of generating code for highly encoded instruction sets: to optimize or retarget? 2... more 1. The problem of generating code for highly encoded instruction sets: to optimize or retarget? 2. Our approach: make optimization more generic by ignoring some details until near the end 3. The idealized version of the processor (clean machine) 4. Quick tour of how we compile for the clean machine 5. Shake And Bake: the final mapping to the real processor 6. Inside Shake and Bake: enhanced genetic algorithms 7. Closing comments
In this paper, we present a method, that uses domain knowledge, to automatically discover and ass... more In this paper, we present a method, that uses domain knowledge, to automatically discover and assign household identifiers to individual historical records. We apply this algorithm on a full count real census (the 1891 Canadian census) to assign household identifiers to all the records.
2018 17th IEEE International Conference on Machine Learning and Applications (ICMLA)
Typically, the overall performance of a university professor is assessed based on three criteria:... more Typically, the overall performance of a university professor is assessed based on three criteria: teaching, research and service. The teaching component is based on students' ratings and comments. However, comments and ratings are highly subjective, thus making the assessment difficult, especially given conscious and unconscious bias. RateMyProfessor.com is a popular publicly accessible website where students rate professors. We use this large corpus to evaluate bias and answer the following questions: 1) what words do students use to describe their professors? 2) is there any correlation between the words used and the rating given? and, 3) are there significant differences across gender and discipline? To answer these questions, we model the reviews using Latent Dirichlet Allocation (LDA) to automatically identify topics and we run several regression models to analyze if there are statistically significant factors that influence the overall rating.
With rapid advances in integrated circuit technology, wirelength has become one of the most criti... more With rapid advances in integrated circuit technology, wirelength has become one of the most critical and important metrics in all phases of VLSI physical design automation, especially circuit placement. As the precise wirelength for a given placement can only be known after routing, accurate and fast-to-compute wirelength estimates are required by FPGA placement algorithms. In this paper, a new model, called star+, is presented for estimating wirelength during FPGA placement. The proposed model is continuously differentiable and can be used with both analytic and iterative-improvement placement methods. Moreover, the time required to calculate incremental changes in cost incurred by moving/swapping blocks can always be computed in O(1) time. Results show that when incorporated into the well-known VPR framework and tested using the 20 MCNC benchmarks, the star+ model achieves a 6-9% reduction in critical-path delay compared with the half-perimeter wirelength (HPWL) model, while requi...
2020 30th International Conference on Field-Programmable Logic and Applications (FPL)
The ability to quickly and accurately predict congestion has emerged as one of the most critical ... more The ability to quickly and accurately predict congestion has emerged as one of the most critical problems during placement. In this paper, we present DLCong, a deep learning congestion-estimation framework based on a convolutional encoder-decoder. Experimental results show that compared to MLCong, a state-of-the-art machine-learning based congestion-estimation model, DLCong achieves an almost 9% improvement in congestion accuracy, while exhibiting inference times of a few milliseconds. Moreover, the accuracy of DLCong scales better with increasing congestion compared to MLCong.
2017 29th International Conference on Microelectronics (ICM)
Supervised machine-learning algorithms require relatively large amounts of runtime to perform tra... more Supervised machine-learning algorithms require relatively large amounts of runtime to perform training and/or classification. Therefore, a need exists to accelerate their runtime, especially for real-time applications. In this paper, we propose and compare several hardware accelerators for the K-Nearest Neighbor (K-NN) classification algorithm. The accelerators are developed using Xilinx Vivado High-Level Synthesis (HLS) and represent examples of semi-tightly coupled architectures. Our experimental results, based on standard benchmarks, show speedups ranging from 48x-168x.
ACM Transactions on Design Automation of Electronic Systems
Placement for Field Programmable Gate Arrays (FPGAs) is one of the most important but time-consum... more Placement for Field Programmable Gate Arrays (FPGAs) is one of the most important but time-consuming steps for achieving design closure. This article proposes the integration of three unique machine learning models into the state-of-the-art analytic placement tool GPlace3.0 with the aim of significantly reducing placement runtimes. The first model, MLCong, is based on linear regression and replaces the computationally expensive global router currently used in GPlace3.0 to estimate switch-level congestion. The second model, DLManage, is a convolutional encoder-decoder that uses heat maps based on the switch-level congestion estimates produced by MLCong to dynamically determine the amount of inflation to apply to each switch to resolve congestion. The third model, DLRoute, is a convolutional neural network that uses the previous heat maps to predict whether or not a placement solution is routable. Once a placement solution is determined to be routable, further optimization may be avoi...
2019 29th International Conference on Field Programmable Logic and Applications (FPL)
The ability to accurately and efficiently estimate the routability of a circuit based on its plac... more The ability to accurately and efficiently estimate the routability of a circuit based on its placement is one of the most challenging and difficult tasks in the Field Programmable Gate Array (FPGA) flow. In this paper, we present a novel, deep-learning framework based on a Convolutional Neural Network model for predicting the routability of a placement. We also incorporate the deep-learning model into a state-of-the-art placement tool, and show how the model can be used to (1) avoid costly, but futile, place-and-route iterations, and (2) improve the placer's ability to produce routable placements for hard-to-route circuits using feedback based on routability estimates generated by the proposed model. The model is trained and evaluated using over 26K placement images derived from 372 benchmarks supplied by Xilinx Inc. Experimental results show that the proposed framework achieves a routability prediction accuracy of 97%, while exhibiting runtimes of only a few milliseconds.
Advances in Artificial Intelligence, Proceedings of 30th Canadian Conference on Artificial Intelligence, 2017
In this paper, we present a method, that uses domain knowledge, to automatically discover and ass... more In this paper, we present a method, that uses domain knowledge, to automatically discover and assign household identifiers to individual historical records. We apply this algorithm on a full count real census (the 1891 Canadian census) to assign household identifiers to all the records.
2016 IEEE 16th International Conference on Data Mining Workshops (ICDMW), 2016
Record linkage is the process of identifying and linking records that refer to the same entities ... more Record linkage is the process of identifying and linking records that refer to the same entities across several databases. In this paper we integrate three historical data sources (Canadian soldiers in the Canadian Expeditionary Force (CEF) who served in World War I, CEF casualties of World War I, and the Canadian census of 1901) to study the Canadian soldiers and casualties of World War I. We link the soldiers dataset to the casualties one to be able to identify the soldiers that died in WWI. In addition, we link the soldiers dataset to the Canadian census of 1901 to enrich the available attributes. The goal is to generate longitudinal data about the Canadian soldiers that would allow researchers to perform a systematic analysis of who lived and who died. The imprecision of historical data, along with the unavailability of expert links and a limited number of attributes make the linkage process a challenging task. We present in this paper methodology to integrate the three data sources and a preliminary analysis of the longitudinal data.
2016 28th International Conference on Microelectronics (ICM), 2016
Increasingly, machine-learning algorithms are playing an important role in the context of embedde... more Increasingly, machine-learning algorithms are playing an important role in the context of embedded and real-time systems. Applications such as wireless sensor networks, security, and commercial enterprises are increasingly relying on machine-learning algorithms to efficiently make predictive decisions based on the large volumes of data these systems collect. Therefore, there is a need to accelerate the runtime of these algorithms, especially for real-time applications. In this paper, we propose several Application Specific Instruction Processor (ASIP) architectures for the K-Nearest Neighbor (KNN) classification algorithm. Each ASIP is developed using Cadence Tensilica tools and represents a tightly-coupled architecture. Our experimental results, based on several benchmarks, show that proposed ASIPs achieve speedups of 86×-650× over the original software implementation.
2016 IEEE 21st International Workshop on Computer Aided Modelling and Design of Communication Links and Networks (CAMAD), 2016
Many packet classification algorithms with variable performances and capabilities are available. ... more Many packet classification algorithms with variable performances and capabilities are available. However, no single algorithm is guaranteed to outperform every other one in every case. Meta-Learning is a subfield in Machine Learning that aims to apply statistical techniques to automate the algorithm selection process. In this work, we propose a novel framework for efficient, automatic packet classification algorithm selection. By utilizing Meta-Learning and Artificial Neural Networks (ANNs) we are able to achieve an average accuracy of 90% when automatically choosing the most appropriate algorithm when applied to over a hundred different rulesets ranging in size from 1K to 5K.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17, 2017
Many of the key stages in the traditional FPGA CAD flow require substantial amounts of computatio... more Many of the key stages in the traditional FPGA CAD flow require substantial amounts of computational effort. Moreover, due to limited overlap among individual stages, poor decisions made in earlier stages will often adversely affect the quality of result in later stages. To help address these issues, we propose a machine-learning framework that uses training data to learn the underlying relationship between circuits and the CAD algorithms used to map them onto a particular FPGA device. The framework does not solve the problem at an arbitrary stage in the flow. Rather, it seeks to assist the designer or the tool to solve the problem. The potential capabilities of the framework are demonstrated by applying it to the placement stage, where it is used to recommend the best placement flow for circuits with different features, and to predict placement and routing results without actually performing placement and routing. Results show that when trained using 372 challenging benchmarks for a Xilinx UltraScale device, the classification models employed in the framework achieve average accuracies in the range 92% to 95%, while the regression models have an average error rate in the range of 0.5% to 3.6%.
2014 IEEE International Conference on Data Mining Workshop, 2014
Linking multiple data collections to create longitudinal data is an important research problem wi... more Linking multiple data collections to create longitudinal data is an important research problem with multiple applications. Longitudinal data allows analysts to perform studies that would be unfeasible otherwise. In our research we are interested in linking historical census collections to create longitudinal data that would allow tracking people overtime. The goal of the linking is to identify the same person in multiple census collections. A classification system is employed to make the decision if two people are the same or not, based on their characteristics. In this paper we present an empirical study where we explore the use of three different classifiers in a record linkage system and we evaluate their performance.
Special purpose instruction set processors (lSPS) challenge compilers because of instruction leve... more Special purpose instruction set processors (lSPS) challenge compilers because of instruction level par-allelism, small numbers of registers, and highly spe-cialized register capabilities. Many traditionally sepa-rate subproblems in code generation have been unified and jointly optimized within a single integer linear pro-gramming (ILP) model. ILP modeling provides a pow-erful methodology for for generating high-quality code for a variety of ISPS. 1
1. The problem of generating code for highly encoded instruction sets: to optimize or retarget? 2... more 1. The problem of generating code for highly encoded instruction sets: to optimize or retarget? 2. Our approach: make optimization more generic by ignoring some details until near the end 3. The idealized version of the processor (clean machine) 4. Quick tour of how we compile for the clean machine 5. Shake And Bake: the final mapping to the real processor 6. Inside Shake and Bake: enhanced genetic algorithms 7. Closing comments
In this paper, we present a method, that uses domain knowledge, to automatically discover and ass... more In this paper, we present a method, that uses domain knowledge, to automatically discover and assign household identifiers to individual historical records. We apply this algorithm on a full count real census (the 1891 Canadian census) to assign household identifiers to all the records.
2018 17th IEEE International Conference on Machine Learning and Applications (ICMLA)
Typically, the overall performance of a university professor is assessed based on three criteria:... more Typically, the overall performance of a university professor is assessed based on three criteria: teaching, research and service. The teaching component is based on students' ratings and comments. However, comments and ratings are highly subjective, thus making the assessment difficult, especially given conscious and unconscious bias. RateMyProfessor.com is a popular publicly accessible website where students rate professors. We use this large corpus to evaluate bias and answer the following questions: 1) what words do students use to describe their professors? 2) is there any correlation between the words used and the rating given? and, 3) are there significant differences across gender and discipline? To answer these questions, we model the reviews using Latent Dirichlet Allocation (LDA) to automatically identify topics and we run several regression models to analyze if there are statistically significant factors that influence the overall rating.
With rapid advances in integrated circuit technology, wirelength has become one of the most criti... more With rapid advances in integrated circuit technology, wirelength has become one of the most critical and important metrics in all phases of VLSI physical design automation, especially circuit placement. As the precise wirelength for a given placement can only be known after routing, accurate and fast-to-compute wirelength estimates are required by FPGA placement algorithms. In this paper, a new model, called star+, is presented for estimating wirelength during FPGA placement. The proposed model is continuously differentiable and can be used with both analytic and iterative-improvement placement methods. Moreover, the time required to calculate incremental changes in cost incurred by moving/swapping blocks can always be computed in O(1) time. Results show that when incorporated into the well-known VPR framework and tested using the 20 MCNC benchmarks, the star+ model achieves a 6-9% reduction in critical-path delay compared with the half-perimeter wirelength (HPWL) model, while requi...
2020 30th International Conference on Field-Programmable Logic and Applications (FPL)
The ability to quickly and accurately predict congestion has emerged as one of the most critical ... more The ability to quickly and accurately predict congestion has emerged as one of the most critical problems during placement. In this paper, we present DLCong, a deep learning congestion-estimation framework based on a convolutional encoder-decoder. Experimental results show that compared to MLCong, a state-of-the-art machine-learning based congestion-estimation model, DLCong achieves an almost 9% improvement in congestion accuracy, while exhibiting inference times of a few milliseconds. Moreover, the accuracy of DLCong scales better with increasing congestion compared to MLCong.
2017 29th International Conference on Microelectronics (ICM)
Supervised machine-learning algorithms require relatively large amounts of runtime to perform tra... more Supervised machine-learning algorithms require relatively large amounts of runtime to perform training and/or classification. Therefore, a need exists to accelerate their runtime, especially for real-time applications. In this paper, we propose and compare several hardware accelerators for the K-Nearest Neighbor (K-NN) classification algorithm. The accelerators are developed using Xilinx Vivado High-Level Synthesis (HLS) and represent examples of semi-tightly coupled architectures. Our experimental results, based on standard benchmarks, show speedups ranging from 48x-168x.
ACM Transactions on Design Automation of Electronic Systems
Placement for Field Programmable Gate Arrays (FPGAs) is one of the most important but time-consum... more Placement for Field Programmable Gate Arrays (FPGAs) is one of the most important but time-consuming steps for achieving design closure. This article proposes the integration of three unique machine learning models into the state-of-the-art analytic placement tool GPlace3.0 with the aim of significantly reducing placement runtimes. The first model, MLCong, is based on linear regression and replaces the computationally expensive global router currently used in GPlace3.0 to estimate switch-level congestion. The second model, DLManage, is a convolutional encoder-decoder that uses heat maps based on the switch-level congestion estimates produced by MLCong to dynamically determine the amount of inflation to apply to each switch to resolve congestion. The third model, DLRoute, is a convolutional neural network that uses the previous heat maps to predict whether or not a placement solution is routable. Once a placement solution is determined to be routable, further optimization may be avoi...
2019 29th International Conference on Field Programmable Logic and Applications (FPL)
The ability to accurately and efficiently estimate the routability of a circuit based on its plac... more The ability to accurately and efficiently estimate the routability of a circuit based on its placement is one of the most challenging and difficult tasks in the Field Programmable Gate Array (FPGA) flow. In this paper, we present a novel, deep-learning framework based on a Convolutional Neural Network model for predicting the routability of a placement. We also incorporate the deep-learning model into a state-of-the-art placement tool, and show how the model can be used to (1) avoid costly, but futile, place-and-route iterations, and (2) improve the placer's ability to produce routable placements for hard-to-route circuits using feedback based on routability estimates generated by the proposed model. The model is trained and evaluated using over 26K placement images derived from 372 benchmarks supplied by Xilinx Inc. Experimental results show that the proposed framework achieves a routability prediction accuracy of 97%, while exhibiting runtimes of only a few milliseconds.
Advances in Artificial Intelligence, Proceedings of 30th Canadian Conference on Artificial Intelligence, 2017
In this paper, we present a method, that uses domain knowledge, to automatically discover and ass... more In this paper, we present a method, that uses domain knowledge, to automatically discover and assign household identifiers to individual historical records. We apply this algorithm on a full count real census (the 1891 Canadian census) to assign household identifiers to all the records.
2016 IEEE 16th International Conference on Data Mining Workshops (ICDMW), 2016
Record linkage is the process of identifying and linking records that refer to the same entities ... more Record linkage is the process of identifying and linking records that refer to the same entities across several databases. In this paper we integrate three historical data sources (Canadian soldiers in the Canadian Expeditionary Force (CEF) who served in World War I, CEF casualties of World War I, and the Canadian census of 1901) to study the Canadian soldiers and casualties of World War I. We link the soldiers dataset to the casualties one to be able to identify the soldiers that died in WWI. In addition, we link the soldiers dataset to the Canadian census of 1901 to enrich the available attributes. The goal is to generate longitudinal data about the Canadian soldiers that would allow researchers to perform a systematic analysis of who lived and who died. The imprecision of historical data, along with the unavailability of expert links and a limited number of attributes make the linkage process a challenging task. We present in this paper methodology to integrate the three data sources and a preliminary analysis of the longitudinal data.
2016 28th International Conference on Microelectronics (ICM), 2016
Increasingly, machine-learning algorithms are playing an important role in the context of embedde... more Increasingly, machine-learning algorithms are playing an important role in the context of embedded and real-time systems. Applications such as wireless sensor networks, security, and commercial enterprises are increasingly relying on machine-learning algorithms to efficiently make predictive decisions based on the large volumes of data these systems collect. Therefore, there is a need to accelerate the runtime of these algorithms, especially for real-time applications. In this paper, we propose several Application Specific Instruction Processor (ASIP) architectures for the K-Nearest Neighbor (KNN) classification algorithm. Each ASIP is developed using Cadence Tensilica tools and represents a tightly-coupled architecture. Our experimental results, based on several benchmarks, show that proposed ASIPs achieve speedups of 86×-650× over the original software implementation.
2016 IEEE 21st International Workshop on Computer Aided Modelling and Design of Communication Links and Networks (CAMAD), 2016
Many packet classification algorithms with variable performances and capabilities are available. ... more Many packet classification algorithms with variable performances and capabilities are available. However, no single algorithm is guaranteed to outperform every other one in every case. Meta-Learning is a subfield in Machine Learning that aims to apply statistical techniques to automate the algorithm selection process. In this work, we propose a novel framework for efficient, automatic packet classification algorithm selection. By utilizing Meta-Learning and Artificial Neural Networks (ANNs) we are able to achieve an average accuracy of 90% when automatically choosing the most appropriate algorithm when applied to over a hundred different rulesets ranging in size from 1K to 5K.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays - FPGA '17, 2017
Many of the key stages in the traditional FPGA CAD flow require substantial amounts of computatio... more Many of the key stages in the traditional FPGA CAD flow require substantial amounts of computational effort. Moreover, due to limited overlap among individual stages, poor decisions made in earlier stages will often adversely affect the quality of result in later stages. To help address these issues, we propose a machine-learning framework that uses training data to learn the underlying relationship between circuits and the CAD algorithms used to map them onto a particular FPGA device. The framework does not solve the problem at an arbitrary stage in the flow. Rather, it seeks to assist the designer or the tool to solve the problem. The potential capabilities of the framework are demonstrated by applying it to the placement stage, where it is used to recommend the best placement flow for circuits with different features, and to predict placement and routing results without actually performing placement and routing. Results show that when trained using 372 challenging benchmarks for a Xilinx UltraScale device, the classification models employed in the framework achieve average accuracies in the range 92% to 95%, while the regression models have an average error rate in the range of 0.5% to 3.6%.
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