8000 Incorrect evaluation of signed comparisons involving ternary expressions and negation · Issue #6000 · verilator/verilator · GitHub
[go: up one dir, main page]
Skip to content

Incorrect evaluation of signed comparisons involving ternary expressions and negation #6000

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom
Closed
sdjasj opened this issue May 10, 2025 · 2 comments · Fixed by #6004
Closed

Incorrect evaluation of signed comparisons involving ternary expressions and negation #6000

sdjasj opened this issue May 10, 2025 · 2 comments · Fixed by #6004

Comments

@sdjasj
Copy link
Contributor
sdjasj commented May 10, 2025 •
edited
Loading

Here is the minimized code test.v that triggers the issue:

`timescale 1ns/1ps
`define stop   $stop
`define checkd(gotv, expv) \
  do if ((gotv) !== (expv)) begin \
       $write("%%Error: %s:%0d:  got=%0d exp=%0d\n", `__FILE__, `__LINE__, (gotv), (expv)); \
       `stop; \
     end while(0);

module top ();

    reg  in4;
    wire signed wire_2;
    wire out88;

    assign wire_2 = in4 ? 2'b10 : 0;
    assign out88 = (-(wire_2) <= wire_2 ? 1 : 0);

    initial begin
        in4 = 1'b0;
        #5;
        `checkd(out88, '1);
        $write("*-* All Finished *-*\n");
        $finish;
    end

endmodule

I ran the following commands:

verilator --binary -Wno-lint --timing test.v
./obj_dir/Vtest

Verilator produced the output 0:

%Error: test.v:21:  got=0 exp=1
%Error: test.v:21: Verilog $stop
Aborting...
Aborted (core dumped)

However, after manual analysis (in4 = 0 leads to wire_2 = 0, so out88 = 1) and comparing with Icarus Verilog, the expected result should be 1.

During further local debugging, I found that the issue disappears when using either -fno-dfg-peephole or -fno-dfg, suggesting that the problem may lie in this area.
@sdjasj sdjasj added the new New issue not seen by maintainers label May 10, 2025
@wsnyder wsnyder removed the new New issue not seen by maintainers label May 11, 2025
@wsnyder
Copy link
Member
wsnyder commented May 11, 2025

@gezalore if you could please take a look, passes with -fno-dfg. Note 1'sb1 = -1.

gezalore added a commit to gezalore/verilator that referenced this issue May 14, 2025
@gezalore
Fix folding of LteS in DfgPeephole
873540c 
Fixes verilator#6000
gezalore added a commit to gezalore/verilator that referenced this issue May 14, 2025
@gezalore
Fix folding of LteS in DfgPeephole
57f3b55 
Fixes verilator#6000
@gezalore gezalore mentioned this issue May 14, 2025
Merged
@gezalore
Copy link
Member

Nice find, thanks!

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging a pull request may close this issue.

Fix folding of LteS in DfgPeephole gezalore/verilator
3 participants
@wsnyder @gezalore @sdjasj
0