10000 Add decoder for RVV instructions by howjmay · Pull Request #501 · sysprog21/rv32emu · GitHub
[go: up one dir, main page]
Skip to content

Add decoder for RVV instructions #501

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 3 commits into from
Closed

Add decoder for RVV instructions #501

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
d4f9e0e
Add decoder for RVV instructions
howjmay Oct 17, 2024
2e8cf99
wip
howjmay Oct 27, 2024
7554c3b
wip
howjmay Dec 30, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Next Next commit
wip
  • Loading branch information
@howjmay
howjmay committed Dec 29, 2024
commit 2e8cf993644f71f425a89ddbde69c2036f82940f
21 changes: 20 additions & 1 deletion src/decode.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#include <stdlib.h>

#include "decode.h"
#include "encoding.h"
#include "riscv_private.h"

/* decode rd field
Expand Down Expand Up @@ -2138,7 +2139,7 @@ static inline bool op_mvx(rv_insn_t *ir, const uint32_t insn) {}
static inline bool op_v(rv_insn_t *ir, const uint32_t insn)
{
uint32_t funct3_mask = 0x7000;
switch (insn & funct3_mask) {
switch ((insn & funct3_mask) >> 7) {
case 0:
return op_ivv(ir, insn);
case 1:
Expand All @@ -2156,6 +2157,24 @@ static inline bool op_v(rv_insn_t *ir, const uint32_t insn)
default:
return false;
}

if ((insn & MASK_VSETVLI) == MATCH_VSETVLI) {
// vsetvli
ir->rd = (insn >> 7) & 0x1f;
ir->rs1 = (insn >> 15) & 0x1f;
ir->zimm = (insn >> 20) & 0x7ff;
} else if ((insn & MASK_VSETIVLI) == MATCH_VSETIVLI) {
// vsetivli
ir->rd = (insn >> 7) & 0x1f;
ir->uimm = (insn >> 15) & 0x1f;
ir->zimm = (insn >> 20) & 0x3ff; // zimm[9:0]

} else if ((insn & MASK_VSETVL) == MATCH_VSETVL) {
// vsetvl
ir->rd = (insn >> 7) & 0x1f;
ir->rs1 = (insn >> 15) & 0x1f;
ir->rs2 = (insn >> 20) & 0x1f;
}
}

/* handler for all unimplemented opcodes */
Expand Down
2 changes: 2 additions & 0 deletions src/decode.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -388,6 +388,8 @@ typedef struct rv_insn {

#if RV32_HAS(EXT_RVV)
uint8_t vm;
uint8_t zimm;
uint8_t uimm;
#endif
/* fuse operation */
int32_t imm2;
Expand Down
Loading
Loading
0