8000 move emu to mod and fix rep vs repe and fix adc/add8 by brandonros · Pull Request #73 · sha0coder/libscemu · GitHub
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move emu to mod and fix rep vs repe and fix adc/add8 #73

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merged 11 commits into from
Dec 26, 2024
Merged

move emu to mod and fix rep vs repe and fix adc/add8 #73

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25df7f6
move emu to mod and fix rep vs repe
brandonros Dec 25, 2024
f075c3c
comment
brandonros Dec 25, 2024
9bfd597
add exit logic
brandonros Dec 25, 2024
74df5ef
add exit logic
brandonros Dec 25, 2024
970d5a4
add8 change?
brandonros Dec 25, 2024
3a8dd4b
needs to be a separate flag?
brandonros Dec 25, 2024
eebe094
add8 adc did not work
brandonros Dec 25, 2024
8e902af
adc change?
brandonros Dec 25, 2024
38f5df8
fix add8
brandonros Dec 26, 2024
1c06b4d
lint
brandonros Dec 26, 2024
236e76e
gateway logs
brandonros Dec 26, 2024
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lint
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@brandonros
brandonros committed Dec 26, 2024
commit 1c06b4de7886c4f5f6e43bb3839ed606816abfcb
1 change: 0 additions & 1 deletion src/emu/constants.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,6 @@ pub const LIBS32_MAX: u64 = 0x7FFFFFFF;
pub const LIBS64_MIN: u64 = 0x7FF000000000;
pub const LIBS64_MAX: u64 = 0x7FFFFFFFFFFF;


pub const STATUS_SUCCESS: u64 = 0x00000000;
pub const STATUS_ACCESS_DENIED: u64 = 0xC0000022;
pub const STATUS_INVALID_HANDLE: u64 = 0xC0000008;
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9 changes: 1 addition & 8 deletions src/emu/mod.rs
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Expand Up @@ -818,7 +818,6 @@ impl Emu {

// base is setted by image base (if overlapps, alloc)
} else {

// user's program
if set_entry {
if pe64.opt.image_base >= constants::LIBS64_MIN as u64 {
Expand Down Expand Up @@ -3312,7 +3311,7 @@ impl Emu {
}
} else {
if self.seh == 0 {
log::info!("exception without any SEH handler nor vector configured.");
log::info!("exception without any SEH handler nor vector configured. pos = {}", self.pos);
if self.cfg.console_enabled {
self.spawn_console();
}
Expand Down Expand Up @@ -5138,9 +5137,6 @@ impl Emu {
None => return false,
};

let in_rflags = self.flags.clone();
log::info!("DEBUG: in: adc value0: 0x{:x}, value1: 0x{:x}, cf: 0x{:x}, rflags: 0x{:x}", value0, value1, cf, in_rflags.dump());

let res = match self.get_operand_sz(&ins, 1) {
64 => self.flags.add64(value0, value1, self.flags.f_cf, true),
32 => self.flags.add32((value0 & 0xffffffff) as u32, (value1 & 0xffffffff) as u32, self.flags.f_cf, true),
Expand All @@ -5149,9 +5145,6 @@ impl Emu {
_ => unreachable!("weird size"),
};

let out_rflags = self.flags.clone();
log::info!("DEBUG: out: adc res: 0x{:x}, rflags: 0x{:x} diff: {}", res, out_rflags.dump(), Flags::diff(in_rflags, out_rflags));

if !self.set_operand_value(&ins, 0, res) {
return false;
}
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0