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[ROCm] Improvements for vectorized elementwise kernels #143269
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e3551fb
Make "thread_work_size" as a parameter for jit loop codegen
jerrymannil 9d57ba7
Add support for thread_work_size and vec_size of 8 and 16
jerrymannil 7a9cf2d
Enable vec_size 8 for elemwise kernels
jerrymannil 19b04da
[ROCm] Enable vec_size of 16
jerrymannil 9103bce
[ROCm] Add vec_size of 16 for DropOut
jerrymannil d12b02c
[cosmetic chnage] Update at::cuda::jit::generate_code function signature
jerrymannil fdba03b
[cosmetic] Remove #if 0 code
jerrymannil c1cd3df
Update jit_utils.cpp
pruthvistony 9d93f62
review comments incorporated
jerrymannil fff09a9
Fix windows build failure and some minor cleanups
jerrymannil 3e47158
Merge branch
8000
9;main' into main
pruthvistony ff97c2a
Merge branch 'pytorch:main' into main
jerrymannil b779f2b
Merge branch 'pytorch:main' into main
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review comments incorporated
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commit 9d93f62f744a2d6054b1f10e11fdaa41519bdf15
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Outer loop will only run once for non-ROCM, since RAND_SIZE =1
Inner loop is basically same as old code.