8000 Add pinned memory support to sparse COO/CSR/CSC/BSR/BSC tensors by pearu · Pull Request #129645 · pytorch/pytorch · GitHub
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Add pinned memory support to sparse COO/CSR/CSC/BSR/BSC tensors #129645

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Add pinned memory support to sparse COO/CSR/CSC/BSR/BSC tensors #129645

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Add pinned memory support to sparse COO/CSR/CSC/BSR/BSC tensors
pearu Jun 27, 2024
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Update on "Add pinned memory support to sparse COO/CSR/CSC/BSR/BSC te… 
…nsors"

As in the title:

To register indices/values of a sparse XYZ tensor with CUDA, the following methods are supported
- `sparse_xyz_tensor(indices, values, pin_memory=True)`
- `sparse_xyz_tensor(indices, values).pin_memory()`
- `sparse_xyz_tensor(indices.pin_memory(), values.pin_memory())`

Fixes #115330




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pearu committed Jun 28, 2024
commit 2756f688e6e8105f89cd160bc324db5e121b4f3a
2 changes: 1 addition & 1 deletion aten/src/ATen/cuda/PinnedMemoryAllocator.cpp
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@@ -1,7 +1,6 @@
#include <ATen/cuda/PinnedMemoryAllocator.h>
#include <ATen/Context.h>
#include <ATen/Config.h>
#include <ATen/SparseCsrTensorUtils.h>
#include <ATen/TensorUtils.h>
#include <c10/core/Storage.h>
#include <ATen/ATen.h>
Expand Down Expand Up @@ -29,4 +28,5 @@ Tensor _pin_memory_cuda(const Tensor& self, std::optional<Device> device) {
return tensor;
}


} // namespace at::native
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