8000 GH-116134: JIT `aarch64-pc-windows-msvc` by brandtbucher · Pull Request #116130 · python/cpython · GitHub
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Clean things up, and use the small code model on aarch64-unknown-linu…
…x-gnu
  • Loading branch information
brandtbucher committed Feb 21, 2024
commit 05c2c47b6720b3e46bf79b768ae8f30880d3d7d2
119 changes: 61 additions & 58 deletions Python/jit.c
Original file line number Diff line number Diff line change
Expand Up @@ -212,15 +212,15 @@ patch(unsigned char *base, const Stencil *stencil, uint64_t *patches)
continue;
case HoleKind_R_X86_64_GOTPCRELX:
case HoleKind_R_X86_64_REX_GOTPCRELX:
case HoleKind_X86_64_RELOC_GOT:
case HoleKind_X86_64_RELOC_GOT:
case HoleKind_X86_64_RELOC_GOT_LOAD: {
// 32-bit relative address.
// Try to relax the GOT load into an immediate value:
uint64_t relaxed = *(uint64_t *)(value + 4) - 4;
if ((int64_t)relaxed - (int64_t)location >= -(1L << 31) &&
(int64_t)relaxed - (int64_t)location + 1 < (1LL << 31))
{
unsigned char prefix = loc8[-3];
// unsigned char prefix = loc8[-3];
unsigned char opcode = loc8[-2];
unsigned char suffix = loc8[-1];
if (opcode == 0x8B) {
Expand All @@ -240,32 +240,31 @@ patch(unsigned char *base, const Stencil *stencil, uint64_t *patches)
value = relaxed;
}
else if (opcode == 0xFF && suffix == 0x25) {
// jmp *foo@GOTPCREL(%rip) -> jmp foo; nop
// jmp *foo@GOTPCREL(%rip) -> nop; jmp foo
assert(hole->kind == HoleKind_R_X86_64_GOTPCRELX);
loc8[-2] = 0xE9;
loc8[3] = 0x90;
loc32 = (uint32_t *)(location - 1);
value = relaxed + 1;
}
else if (opcode == 0x85) {
// test %reg, foo@GOTPCREL(%rip) -> test $foo, %reg
assert(0);
loc8[-3] = (prefix & ~0x4) | (prefix & 0x4) >> 2;
loc8[-2] = 0xF7;
loc8[-1] = 0xC0 | (suffix & 0x38) >> 3;
value = relaxed;
}
else if (hole->kind != HoleKind_X86_64_RELOC_GOT) {
// binop foo@GOTPCREL(%rip), %reg -> binop $foo, %reg
assert(hole->kind == HoleKind_R_X86_64_REX_GOTPCRELX);
loc8[-3] = (prefix & ~0x4) | (prefix & 0x4) >> 2;
loc8[-2] = 0x81;
loc8[-1] = 0xC0 | ((suffix & 0x38) >> 3) | (opcode & 0x3C);
loc8[-2] = 0x90;
loc8[-1] = 0xE9;
value = relaxed;
}
// else if (opcode == 0x85) {
// // test %reg, foo@GOTPCREL(%rip) -> test $foo, %reg
// assert(0);
// loc8[-3] = (prefix & ~0x4) | (prefix & 0x4) >> 2;
// loc8[-2] = 0xF7;
// loc8[-1] = 0xC0 | (suffix & 0x38) >> 3;
// value = relaxed;
// }
// else if (hole->kind != HoleKind_X86_64_RELOC_GOT) {
// // binop foo@GOTPCREL(%rip), %reg -> binop $foo, %reg
// assert(hole->kind == HoleKind_R_X86_64_REX_GOTPCRELX);
// loc8[-3] = (prefix & ~0x4) | (prefix & 0x4) >> 2;
// loc8[-2] = 0x81;
// loc8[-1] = 0xC0 | ((suffix & 0x38) >> 3) | (opcode & 0x3C);
// value = relaxed;
// }
}
// Fall through...
}
// Fall through...
case HoleKind_R_X86_64_GOTPCREL:
case HoleKind_R_X86_64_PC32:
case HoleKind_X86_64_RELOC_SIGNED:
Expand Down Expand Up @@ -317,47 +316,50 @@ patch(unsigned char *base, const Stencil *stencil, uint64_t *patches)
assert(get_bits(loc32[0], 21, 2) == 3);
set_bits(loc32, 5, value, 48, 16);
continue;
case HoleKind_ARM64_RELOC_GOT_LOAD_PAGE21: {
case HoleKind_ARM64_RELOC_GOT_LOAD_PAGE21:
case HoleKind_R_AARCH64_ADR_GOT_PAGE: {
// 21-bit count of pages between this page and an absolute address's
// page... I know, I know, it's weird. Pairs nicely with
// ARM64_RELOC_GOT_LOAD_PAGEOFF12 (below).
assert(i + 1 < stencil->holes_size);
const Hole *next_hole = &stencil->holes[i + 1];
assert(next_hole->kind == HoleKind_ARM64_RELOC_GOT_LOAD_PAGEOFF12);
assert(next_hole->offset == hole->offset + 4);
assert(next_hole->symbol == hole->symbol);
assert(next_hole->addend == hole->addend);
assert(next_hole->value == hole->value);
assert(IS_AARCH64_ADRP(loc32[0]));
unsigned char rd = get_bits(loc32[0], 0, 5);
assert(IS_AARCH64_LDR_OR_STR(loc32[1]));
unsigned char rt = get_bits(loc32[1], 0, 5);
unsigned char rn = get_bits(loc32[1], 5, 5);
assert(rd == rn && rn == rt);
uint64_t relaxed = *(uint64_t *)value;
if (relaxed < (1UL << 16)) {
loc32[0] = 0xD503201F;
loc32[1] = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | rd;
i++;
continue;
}
if (relaxed < (1ULL << 32)) {
loc32[0] = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | rd;
loc32[1] = 0xF2A00000 | (get_bits(relaxed, 16, 16) << 5) | rd;
i++;
continue;
}
relaxed = (uint64_t)value - (uint64_t)location - 4;
if ((relaxed & 0x3) == 0 &&
(int64_t)relaxed >= -(1L << 19) &&
(int64_t)relaxed < (1L << 19))
if (i + 1 < stencil->holes_size &&
(next_hole->kind == HoleKind_ARM64_RELOC_GOT_LOAD_PAGEOFF12 ||
next_hole->kind == HoleKind_R_AARCH64_LD64_GOT_LO12_NC) &&
next_hole->offset == hole->offset + 4 &&
next_hole->symbol == hole->symbol &&
next_hole->addend == hole->addend &&
next_hole->value == hole->value)
{
loc32[0] = 0xD503201F;
loc32[1] = 0x58000000 | (get_bits(relaxed, 2, 19) << 5) | rd;
i++;
continue;
assert(IS_AARCH64_ADRP(loc32[0]));
unsigned char rd = get_bits(loc32[0], 0, 5);
assert(IS_AARCH64_LDR_OR_STR(loc32[1]));
unsigned char rt = get_bits(loc32[1], 0, 5);
unsigned char rn = get_bits(loc32[1], 5, 5);
assert(rd == rn && rn == rt);
uint64_t relaxed = *(uint64_t *)value;
if (relaxed < (1UL << 16)) {
loc32[0] = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | rd;
loc32[1] = 0xD503201F;
i++;
continue;
}
if (relaxed < (1ULL << 32)) {
loc32[0] = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | rd;
loc32[1] = 0xF2A00000 | (get_bits(relaxed, 16, 16) << 5) | rd;
i++;
continue;
}
relaxed = (uint64_t)value - (uint64_t)location - 4;
if ((relaxed & 0x3) == 0 &&
(int64_t)relaxed >= -(1L << 19) &&
(int64_t)relaxed < (1L << 19))
{
loc32[0] = 0x58000000 | (get_bits(relaxed, 2, 19) << 5) | rd;
loc32[1] = 0xD503201F;
i++;
continue;
}
}
assert(0);
// Number of pages between this page and the value's page:
value = (value >> 12) - ((uint64_t)location >> 12);
// Check that we're not out of range of 21 signed bits:
Expand All @@ -370,6 +372,7 @@ patch(unsigned char *base, const Stencil *stencil, uint64_t *patches)
continue;
}
case HoleKind_ARM64_RELOC_GOT_LOAD_PAGEOFF12:
case HoleKind_R_AARCH64_LD64_GOT_LO12_NC:
// 12-bit low part of an absolute address. Pairs nicely with
// ARM64_RELOC_GOT_LOAD_PAGE21 (above).
assert(IS_AARCH64_LDR_OR_STR(loc32[0]) || IS_AARCH64_ADD_OR_SUB(loc32[0]));
Expand Down
2 changes: 2 additions & 0 deletions Tools/jit/_schema.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,10 @@
"IMAGE_REL_AMD64_ADDR64",
"IMAGE_REL_I386_DIR32",
"R_AARCH64_ABS64",
"R_AARCH64_ADR_GOT_PAGE",
"R_AARCH64_CALL26",
"R_AARCH64_JUMP26",
"R_AARCH64_LD64_GOT_LO12_NC",
"R_AARCH64_MOVW_UABS_G0_NC",
"R_AARCH64_MOVW_UABS_G1_NC",
"R_AARCH64_MOVW_UABS_G2_NC",
Expand Down
25 changes: 0 additions & 25 deletions Tools/jit/_stencils.py
Original file line number Diff line number Diff line change
Expand Up @@ -124,25 +124,6 @@ def emit_aarch64_trampoline(self, hole: Hole) -> None:
):
self.holes.append(hole.replace(offset=base + 4 * i, kind=kind))

def emit_x86_64_trampoline(self, hole: Hole) -> None:
"""Emit an x86_64 trampoline to the given symbol."""
base = len(self.body)
where = slice(hole.offset, hole.offset + 4)
self.body[where] = (base - hole.offset - 4).to_bytes(4, sys.byteorder)
# Load the 64-bit address of the symbol into rax and jump to it:
self.disassembly += [
f"{base + 0:x}: 48 b8 00 00 00 00 00 00 00 00 movabsq $0x0, %rax",
f"{base + 0:016x}: R_X86_64_64 {hole.symbol}",
f"{base + 10:x}: ff e0 jmpq *%rax",
]
for code in [
b"\x48\xB8\x00\x00\x00\x00\x00\x00\x00\x00",
b"\xFF\xE0",
]:
self.body.extend(code)
assert hole.addend == -4, hole.addend
self.holes.append(hole.replace(offset=base + 2, kind="R_X86_64_64", addend=0))


@dataclasses.dataclass
class StencilGroup:
Expand Down Expand Up @@ -181,12 +162,6 @@ def process_relocations(self, *, alignment: int = 1) -> None:
):
self.code.emit_aarch64_trampoline(hole)
continue
elif (
hole.kind in {"X86_64_RELOC_BRANCH"}
and hole.value is HoleValue.ZERO
):
self.code.emit_x86_64_trampoline(hole)
continue
holes.append(hole)
stencil.holes[:] = holes
self.code.pad(alignment)
Expand Down
10 changes: 6 additions & 4 deletions Tools/jit/_targets.py
Original file line number Diff line number Diff line change
Expand Up @@ -108,7 +108,7 @@ async def _compile(
o = tempdir / f"{opname}.o"
args = [
f"--target={self.triple}",
"-DPy_BUILD_CORE",
"-DPy_BUILD_CORE_MODULE",
"-D_DEBUG" if self.debug else "-DNDEBUG",
f"-D_JIT_OPCODE={opname}",
"-D_PyJIT_ACTIVE",
Expand All @@ -124,7 +124,7 @@ async def _compile(
# SET_FUNCTION_ATTRIBUTE on 32-bit Windows debug builds:
"-fno-jump-tables",
"-fno-plt",
"-fpic" if self.pic else "-fno-pic",
# "-fpic" if self.pic else "-fno-pic",
# Don't make calls to weird stack-smashing canaries:
"-fno-stack-protector",
# We have three options for code model:
Expand Down Expand Up @@ -293,7 +293,9 @@ def _handle_relocation(
"Offset": offset,
"Symbol": {"Value": s},
"Type": {
"Value": "R_X86_64_GOTPCREL"
"Value": "R_AARCH64_ADR_GOT_PAGE"
| "R_AARCH64_LD64_GOT_LO12_NC"
| "R_X86_64_GOTPCREL"
| "R_X86_64_GOTPCRELX"
| "R_X86_64_REX_GOTPCRELX" as kind
},
Expand Down Expand Up @@ -426,7 +428,7 @@ def get_target(host: str) -> _COFF | _ELF | _MachO:
if re.fullmatch(r"aarch64-apple-darwin.*", host):
return _MachO(host, alignment=8, pic=True, prefix="_")
if re.fullmatch(r"aarch64-.*-linux-gnu", host):
return _ELF(host, alignment=8)
return _ELF(host, alignment=8, pic=True)
if re.fullmatch(r"i686-pc-windows-msvc", host):
return _COFF(host, prefix="_")
if re.fullmatch(r"x86_64-apple-darwin.*", host):
Expand Down
0