Verilog version of Z-scale, a microarchitectural implementation of the 32-bit RISC-V ISA (RV32IM).
Attention! This code base is outdated, not maintained and should only be used for experimenting with hardware/software development tools.
Since verilator translates verilog code into C++ and given that various C++ libraries (see external directory) are integrated into the verilator build, CMake has been used as build system.
As the result, vscale with verilator can be built like any other cmake project with the following commands:
$ cmake -B _build
$ cmake --build _build
After building, the vscale executable can be found in the build directory.
Additionally, the check target (e.g., cmake --build _build --target check) can be used to perform a quick functionality check.
To execute your own software in hex or elf format on vscale, the following command can be used:
$ ./_build/vscale --loadmem <path-to-hex-or-elf-file>