8000 rp2/spi: Allow omitting of unused pins by msalau · Pull Request #16428 · micropython/micropython · GitHub
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rp2/spi: Allow omitting of unused pins #16428

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msalau
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@msalau msalau commented Dec 16, 2024

Summary

The change makes it possible to omit unused SPI pins.
This can be achieved by setting a pin as None.

Testing

The change as been tested on a custom RP2040 board with only SCK and MOSI used to drive a SPI IC.

Trade-offs and Alternatives

The commit changes behavior if the constructor method.
Previously if a pin was set as None the default pin number for this interface has been used.

The change makes it possible to omit unused SPI pins.
This can be achieved by setting a pin as `None`.
The commit changes behavior if the constructor method.
Previously if a pin was set as `None` the default pin number
for this interface has been used.

Signed-off-by: Maksim Salau <maksim.salau@gmail.com>
@msalau msalau force-pushed the rp2/omit-unused-spi-pins branch from e2272b9 to 98ac90b Compare December 16, 2024 21:18
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Code size report:

   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
     mimxrt:    +0 +0.000% TEENSY40
        rp2:   +72 +0.008% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

@dpgeorge
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This is a good feature to have, but we need to check how other ports handle this case (of omitting pins) so the API is the same across all ports.

@Gadgetoid
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Missed that I had effectively duplicated this here: #16922

In most cases users would be disabling MISO, for the reasons given in my PR, but it's feasible that MISO or MOSI could be disabled for single direction SPI (read a read only device, write a write only device). Not to be confused for half duplex mode.

sck though? That's a tough sell!

@robert-hh
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It seems that a similar change was merged today: commit dd7a950.

@dpgeorge
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Ahh, sorry, I forgot about this PR!

@msalau if you want to update this PR to make all pins optional, please follow the logic used in dd7a950

sck though? That's a tough sell!

Disabling SCK is potentially useful, if you want to generate a specific bit stream on MOSI, eg to drive a Neopixel.

@robert-hh
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Disabling SCK is potentially useful, if you want to generate a specific bit stream on MOSI,

I made a HX711 driver once which uses MOSI to create the clock signal of 25-27 clock pulses. So the SPI SCK was not used. But applications are rare, and it this case using GPIO bit banging was better. The only advantage of using SPI was a reliable timing.
As far as I recall, I tried once to use SPI/MOSI to drive a Neopixel, taking advantage of the fact, that only the leading high pulses duration is important. The low period can be extended. So you can use 4 clock periods per Neopixel bit. But it needs 12 or 16 byte data per Neopixel, so it's not memory-efficient.

@msalau
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msalau commented Mar 27, 2025

Thanks for pointing out that similar feature is already in repo.
I need only to skip MISO but added other pins 'just in case' :)
I'm closing the pull request then.

@msalau msalau closed this Mar 27, 2025
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