8000 Next80 merge test by adalava · Pull Request #9 · llvm/llvm-project · GitHub
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Next80 merge test #9

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70f25eb
luporl, adalava pending patches !!!!!!!!!
adalava Mar 20, 2019
31247e3
adalava: change default powerpc64 ABI to ELFv2 on FreeBSD >= 13.0
adalava Mar 22, 2019
6b293b1
[PPC64][libunwind] Fix r2 not properly restored
Mar 21, 2019
2b112d8
Addressed review comments
Mar 25, 2019
46ef371
Merge branch 'next80' of github.com:PPC64/llvm-project into next80
Mar 27, 2019
9f2bdd2
adalava - implement PPC64::getThunkSectionSpacing() as workaround to …
adalava Mar 27, 2019
a994896
Fixed regression and ELFv1 ASM functions
Mar 29, 2019
a9e7e34
adalava: add comment to 9f2bdd2f7da10a49f1cece341b20a17ed97ca88b
adalava Apr 2, 2019
5efb305
Merge branch 'next80' of github.com:PPC64/llvm-project into next80
adalava Apr 2, 2019
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36 changes: 20 additions & 16 deletions libunwind/src/DwarfInstructions.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -235,23 +235,27 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
#endif

#if defined(_LIBUNWIND_TARGET_PPC64)
// If the instruction at return address is a TOC (r2) restore
// then r2 was saved and needs to be restored
if (R::getArch() == REGISTERS_PPC64 && returnAddress != 0 &&
addressSpace.get32(returnAddress)
#if defined(_CALL_ELF) && _CALL_ELF == 2
== 0xe8410018 // ld r2,24(r1)
#else
== 0xe8410028 // ld r2,40(r1)
#endif
) {
#define PPC64_ELFV1_R2_LOAD_INST_ENCODING 0xe8410028u // ld r2,40(r1)
#define PPC64_ELFV1_R2_OFFSET 40
#define PPC64_ELFV2_R2_LOAD_INST_ENCODING 0xe8410018u // ld r2,24(r1)
#define PPC64_ELFV2_R2_OFFSET 24
// If the instruction at return address is a TOC (r2) restore,
// then r2 was saved and needs to be restored.
// ELFv2 ABI specifies that the TOC Pointer must be saved at SP + 24,
// while in ELFv1 ABI it is saved at SP + 40.
if (R::getArch() == REGISTERS_PPC64 && returnAddress != 0) {
pint_t sp = newRegisters.getRegister(UNW_REG_SP);
#if defined(_CALL_ELF) && _CALL_ELF == 2
pint_t r2 = addressSpace.get64(sp + 24);
#else
pint_t r2 = addressSpace.get64(sp + 40);
#endif
newRegisters.setRegister(UNW_PPC64_R2, r2);
pint_t r2 = 0;
switch (addressSpace.get32(returnAddress)) {
case PPC64_ELFV1_R2_LOAD_INST_ENCODING:
r2 = addressSpace.get64(sp + PPC64_ELFV1_R2_OFFSET);
break;
case PPC64_ELFV2_R2_LOAD_INST_ENCODING:
r2 = addressSpace.get64(sp + PPC64_ELFV2_R2_OFFSET);
break;
}
if (r2)
newRegisters.setRegister(UNW_PPC64_R2, r2);
}
#endif

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22 changes: 20 additions & 2 deletions libunwind/src/assembly.h
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Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,20 @@
#define SEPARATOR ;
#endif

#if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1)
#define PPC64_OPD1 .section .opd,"aw",@progbits SEPARATOR
#define PPC64_OPD2 SEPARATOR \
.p2align 3 SEPARATOR \
.quad .Lfunc_begin0 SEPARATOR \
.quad .TOC.@tocbase SEPARATOR \
.quad 0 SEPARATOR \
.text SEPARATOR \
.Lfunc_begin0:
#else
#define PPC64_OPD1
#define PPC64_OPD2
#endif

#define GLUE2(a, b) a ## b
#define GLUE(a, b) GLUE2(a, b)
#define SYMBOL_NAME(name) GLUE(__USER_LABEL_PREFIX__, name)
Expand Down Expand Up @@ -97,13 +111,17 @@
.globl SYMBOL_NAME(name) SEPARATOR \
EXPORT_SYMBOL(name) SEPARATOR \
SYMBOL_IS_FUNC(SYMBOL_NAME(name)) SEPARATOR \
SYMBOL_NAME(name):
PPC64_OPD1 \
SYMBOL_NAME(name): \
PPC64_OPD2

#define DEFINE_LIBUNWIND_PRIVATE_FUNCTION(name) \
.globl SYMBOL_NAME(name) SEPARATOR \
HIDDEN_SYMBOL(SYMBOL_NAME(name)) SEPARATOR \
SYMBOL_IS_FUNC(SYMBOL_NAME(name)) SEPARATOR \
SYMBOL_NAME(name):
PPC64_OPD1 \
SYMBOL_NAME(name): \
PPC64_OPD2

#if defined(__arm__)
#if !defined(__ARM_ARCH)
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