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  • Experiments streaming data to memories - not mature

    TeX MIT License Updated Nov 4, 2024
  • A test design to see how the Tri-mode Ethernet MAC can be used in a small FPGA design.

    Verilog 4 2 MIT License Updated Nov 1, 2024
  • alinx Public

    some files to test the new ALINX AXU2CG-E development board

    SystemVerilog 5 2 MIT License Updated Oct 29, 2024
  • heater Public

    An FPGA "heater" design to use LFSR data to toggle logic for the purpose of stressing the power supply.

    Tcl 6 1 MIT License Updated Oct 28, 2024
  • iir_filter Public

    IIR digital filter implemented using Vivado HLS and C++

    SystemVerilog 7 2 MIT License Updated Oct 24, 2024
  • miscellaneous fpga experiments to support other projects

    SystemVerilog 1 MIT License Updated Oct 20, 2024
  • my_kicad Public

    Miscellaneous KiCad work

    Tcl 1 1 MIT License Updated Sep 26, 2024
  • A test of the new RiscV version of the Xilinx Microblaze processor.

    Tcl MIT License Updated Sep 4, 2024
  • Verilog I2C interface for FPGA implementation (from alexforenchich!)

    Verilog MIT License Updated Aug 8, 2024
  • A project to demonstrate Xilinx MPSOC running Ubuntu

    Tcl 20 12 MIT License Updated Jul 19, 2024
  • pg_prng Public

    A very light weight fpga pseudorandom number generator.

    SystemVerilog MIT License Updated Jul 15, 2024
  • A little project to provide the fpga design for a PCIe board being done in KiCad.

    TeX 3 MIT License Updated Jun 21, 2024
  • Tcl 1 MIT License Updated Jun 7, 2024
  • zuboard Public

    Some fpga and software logic to test out the new Avnet ZUBoard.

    SystemVerilog 3 1 MIT License Updated Mar 22, 2024
  • pcie_fpga_kicad Public template

    Forked from lucanastasio/PCIexpress-KiCad

    PCI express libraries and templates for KiCad

    Updated Jan 24, 2024
  • fftw_test Public

    This is a little program to run fftw on various machines as a crude benchmarking tool.

    C 1 1 MIT License Updated Jan 4, 2024
  • This is a project to understand data streaming under FreeRTOS on the Xilinx ZynqMP.

    C 1 MIT License Updated Jan 4, 2024
  • gps_sim Public

    An attempt to synthesize GPS signals in FPGA logic.

    Tcl 17 2 MIT License Updated Jan 4, 2024
  • AD7946 Public

    logic to control the TI AD7946

    SystemVerilog 1 MIT License Updated Jan 4, 2024
  • ne10_test Public

    A project to demonstrate the use of the Arm libNE10.a scientific computing librar.

    C 1 MIT License Updated Jan 4, 2024
  • An attempt to use the synchronous fifo mode of the FTDI FT2232H USB transceiver.

    SystemVerilog 1 MIT License Updated Jan 4, 2024
  • kria_ubuntu Public

    Ubuntu for FPGA control on Kria Vision AI Kit

    Tcl 3 1 MIT License Updated Jan 4, 2024
  • Experimenting with ideas about controlling embedded hardware with a web interface.

    HTML MIT License Updated Jan 4, 2024
  • petazed Public

    A project to show Petalinux booting from QSPI on the MicroZed board.

    Tcl 2 MIT License Updated Jan 4, 2024
  • i2c_simple Public

    An attempt to write a very simple IIC interface for use in fpga designs.

    SystemVerilog MIT License Updated Dec 14, 2023
  • experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.

    Tcl 22 MIT License Updated Dec 14, 2023
  • I need to test the ddr3 interface on a board. Maybe I can then run Linux on a Microblaze.

    Tcl MIT License Updated Nov 30, 2023
  • KiCad project for Kintex 7 PCIe board

    ANTLR Apache License 2.0 Updated Aug 29, 2023
  • Verilog Ethernet components for FPGA implementation

    Verilog 1 MIT License Updated Sep 28, 2022
  • A USB3318 is connected to a Xilinx Artix-7 100t. Let's go!

    Tcl Updated Jul 31, 2022