8000 CUDA: FA support for Deepseek (Ampere or newer) by JohannesGaessler · Pull Request #13306 · ggml-org/llama.cpp · GitHub
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CUDA: FA support for Deepseek (Ampere or newer) #13306

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Merged
merged 4 commits into from
May 9, 2025
Merged

CUDA: FA support for Deepseek (Ampere or newer) #13306

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d19838e
CUDA: FA support for Deepseek (Ampere or newer)
JohannesGaessler Apr 30, 2025
187054a
wrap __cvta_generic_to_shared for HIP
JohannesGaessler May 6, 2025
dd05446
fix loop unrolling for KV data load
JohannesGaessler May 6, 2025
fe2b775
do loop unrolling via C++ template
JohannesGaessler May 9, 2025
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wrap __cvta_generic_to_shared for HIP
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@JohannesGaessler
JohannesGaessler committed May 6, 2025
commit 187054a70c97f1444170ebceb2d8f6804cfd0ead
11 changes: 11 additions & 0 deletions ggml/src/ggml-cuda/cp-async.cuh
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Expand Up @@ -2,6 +2,17 @@

#include "common.cuh"


static __device__ __forceinline__ unsigned int ggml_cuda_cvta_generic_to_shared(void * generic_ptr) {
#ifdef CP_ASYNC_AVAILABLE
return __cvta_generic_to_shared(generic_ptr);
#else
GGML_UNUSED(generic_ptr);
NO_DEVICE_CODE;
return 0;
#endif // CP_ASYNC_AVAILABLE
}
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Since there is no fallback, why not avoid compiling the kernels that need this intrinsic in the first place?

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In terms of development it's more convenient for me if potential breakage is encapsulated in an API such as this. That way, if I need to do a git bisect of my WIP commits later on there is less risk of having to deal with code that doesn't compile on specific hardware.


// Copies data from global to shared memory, cg == cache global.
// Both the src and dst pointers must be aligned to 16 bit.
// Shared memory uses 32 bit addressing, the pointer is passed as unsigned int.
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4 changes: 2 additions & 2 deletions ggml/src/ggml-cuda/fattn-mma-f16.cuh
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Expand Up @@ -112,7 +112,7 @@ static __device__ __forceinline__ void flash_attn_ext_f16_load_tile(
// The minimum granularity with cp.async is 16 bytes, with synchronous data loading it's 4 bytes.

if (use_cp_async) {
const unsigned int tile_KV_32 = __cvta_generic_to_shared(tile_KV);
const unsigned int tile_KV_32 = ggml_cuda_cvta_generic_to_shared(tile_KV);

constexpr int preload = 64;
constexpr int h2_per_chunk = 16/sizeof(half2);
Expand Down Expand Up @@ -186,7 +186,7 @@ static __device__ __forceinline__ void flash_attn_ext_f16_load_mask(
constexpr int cols_per_warp = 8*WARP_SIZE/nbatch_fa;
constexpr int stride_j = nwarps * cols_per_warp;

const unsigned int tile_mask_32 = __cvta_generic_to_shared(tile_mask);
const unsigned int tile_mask_32 = ggml_cuda_cvta_generic_to_shared(tile_mask);

#pragma unroll
for (int j0 = 0; j0 < ncols1; j0 += stride_j) {
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