8000 PoC cache configuration control by mhightower83 · Pull Request #7060 · esp8266/Arduino · GitHub
[go: up one dir, main page]

Skip to content

PoC cache configuration control #7060

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 89 commits into from
Dec 6, 2020
Merged
Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
89 commits
Select commit Hold shift + click to select a range
fc63320
PoC cache configuration control
mhightower83 Feb 4, 2020
57043bd
Style corrections
mhightower83 Feb 4, 2020
17ceceb
Merge branch 'master' into poc-cache-config
mhightower83 Feb 7, 2020
7424aed
Added detailed description for Cache_Read_Enable.
mhightower83 Feb 11, 2020
56306d3
Merge branch 'master' into poc-cache-config
mhightower83 Feb 13, 2020
0645923
Style and MMU_SEC_HEAP corrections.
mhightower83 Feb 13, 2020
a6bb5a1
Improved asm register usage.
mhightower83 Feb 14, 2020
5bb3e19
Merge branch 'master' into poc-cache-config
mhightower83 Feb 27, 2020
b443e43
Interesting glitch in boards.txt after github merge. A new board in
mhightower83 Feb 28, 2020
0c661db
Support for 2nd Heap, excess IRAM, through umm_malloc.
mhightower83 Mar 2, 2020
c6eabc5
Merge branch 'master' into poc-cache-config
mhightower83 Mar 2, 2020
70842de
Post push CI cleanup.
mhightower83 Mar 2, 2020
f35290b
Cleanup part II
mhightower83 Mar 3, 2020
71e36cb
Cleanup part III
mhightower83 Mar 3, 2020
edf008a
Updates to support platformio, maybe.
mhightower83 Mar 5, 2020
161e7bc
Added exception C wrapper replacement.
mhightower83 Mar 5, 2020
5ac46f7
Merge branch 'master' into poc-cache-config
mhightower83 Mar 6, 2020
91fc391
CI Cleanup
mhightower83 Mar 6, 2020
eb9882e
CI Cleanup II
mhightower83 Mar 6, 2020
1422b8d
Changes to exc-c-wrapper-handler.S to assemble under platformio.
mhightower83 Mar 6, 2020
b921e11
For platformio, Correction to toolchain-xtensa include path.
mhightower83 Mar 6, 2020
cfb3826
Temporarily added --print-memory-usage to ld parameters for cross-che…
mhightower83 Mar 6, 2020
a1cd3a2
Merge branch 'master' into poc-cache-config
mhightower83 Mar 17, 2020
352a2ed
Merge branch 'poc-cache-config' of github.com:mhightower83/Arduino in…
mhightower83 Mar 17, 2020
062f8dc
Merge branch 'master' into poc-cache-config
mhightower83 Mar 27, 2020
69fdd5b
Merge branch 'master' into poc-cache-config
mhightower83 Apr 9, 2020
d5dac93
Merge branch 'master' into poc-cache-config
mhightower83 Apr 16, 2020
9d3a7de
Merge branch 'poc-cache-config' of github.com:mhightower83/Arduino in…
mhightower83 Apr 28, 2020
ecd826c
undo change to platform.txt
mhightower83 Apr 28, 2020
a9b92e2
correct merge conflict. take 1
mhightower83 Apr 28, 2020
5a99afc
Merge branch 'master' into poc-cache-config
mhightower83 Apr 28, 2020
f51dd82
Merge branch 'master' into poc-cache-config
mhightower83 Apr 29, 2020
71ef229
Merge branch 'master' into poc-cache-config
mhightower83 May 9, 2020
1a9d909
Fixed #if... for building umm_get_oom_count. It was not building when…
mhightower83 May 10, 2020
7b4a8d4
Commented out XMC support. Compatibility issues with PoC when using 1…
mhightower83 May 17, 2020
d9ab27e
Merge branch 'master' into poc-cache-config
mhightower83 May 17, 2020
6d18190
Corrected size.py, DRAM bracketing changed to not include ICACHE with…
mhightower83 May 25, 2020
50fe8a3
Merge branch 'master' into poc-cache-config
mhightower83 May 25, 2020
f62ff0a
Merge branch 'master' into poc-cache-config
mhightower83 May 31, 2020
1847a72
Merge branch 'master' into poc-cache-config
mhightower83 Jun 14, 2020
d3ace64
Added additional _context for support of use of UMM_INLINE_METRICS.
mhightower83 Jun 19, 2020
a43a2a8
Merge branch 'master' into poc-cache-config
mhightower83 Jun 19, 2020
2f47516
Merge branch 'master' into poc-cache-config
mhightower83 Jul 5, 2020
fd8f942
Merge branch 'master' into poc-cache-config
mhightower83 Jul 7, 2020
74df810
Changes to clear errors and warnings from toolchain 10.1
mhightower83 Jul 13, 2020
b767a5d
Isolated incompatable definitions related to _xtos_set_exception_hand…
mhightower83 Jul 14, 2020
e7402d8
Update tools/platformio-build.py
mhightower83 Jul 17, 2020
51ea542
Merge branch 'master' into poc-cache-config
mhightower83 Jul 17, 2020
3ff489c
Merge branch 'master' into poc-cache-config
devyte Jul 18, 2020
232dce4
Requested changes
mhightower83 Jul 19, 2020
a3c9e02
Corrected comment. And added missing include.
mhightower83 Jul 23, 2020
fc5f611
Improve comment.
mhightower83 Jul 23, 2020
bbdf166
style and comment correction
mhightower83 Jul 23, 2020
b88d197
Added draft mmu.rst file and updated index.
mhightower83 Jul 23, 2020
b058f17
Updated mmu.rst
mhightower83 Jul 25, 2020
5e31ed5
Add a default MMU_IRAM_SIZE value for a new CI test to pass.
mhightower83 Jul 25, 2020
a4d28e2
CI appeasement
mhightower83 Jul 26, 2020
d45ceb0
CI appeasement with comment correction.
mhightower83 Jul 27, 2020
4831410
Ensure SYS always runs with DRAM Heap selected.
mhightower83 Jul 28, 2020
f64a7d0
Add/move heap stack overflow/underflow check to Esp.cpp where the eve…
mhightower83 Jul 28, 2020
2238535
Improved comment clarity of purpose for IramReserve.ino. Clean up MMU…
mhightower83 Jul 30, 2020
c070657
Added missing #include
mhightower83 Aug 4, 2020
be71429
Corrected usage of warning
mhightower83 Aug 4, 2020
50ea394
Merge branch 'master' into poc-cache-config
mhightower83 Aug 7, 2020
4d7e1e9
Merge branch 'poc-cache-config' of github.com:mhightower83/Arduino in…
mhightower83 Aug 7, 2020
61afce0
CI appeasement and use #message not #pragma message
mhightower83 Aug 7, 2020
d828d76
Merge branch 'master' into poc-cache-config
mhightower83 Sep 2, 2020
7d4a600
Updated git version of eboot.elf to match build version.
mhightower83 Sep 2, 2020
20d39ee
Merge branch 'master' into poc-cache-config
mhightower83 Sep 4, 2020
f33ed95
Merge branch 'master' into poc-cache-config
mhightower83 Sep 17, 2020
53894c7
Merge branch 'master' into poc-cache-config
mhightower83 Oct 2, 2020
5ee2136
Merge branch 'master' into poc-cache-config
devyte Oct 5, 2020
3f415f8
Remove conditional build option USE_ISR_SAFE_EXC_WRAPPER, always inst…
mhightower83 Oct 6, 2020
addb149
Merge branch 'master' into poc-cache-config
mhightower83 Oct 6, 2020
d7fb4ab
Updated mmu.rst
mhightower83 Oct 6, 2020
c8412a8
Merge branch 'master' into poc-cache-config
mhightower83 Oct 7, 2020
5786ec1
Merge branch 'master' into poc-cache-config
mhightower83 Oct 18, 2020
86c4e5a
Merge branch 'master' into poc-cache-config
mhightower83 Oct 22, 2020
0c9ae16
Merge branch 'master' into poc-cache-config
mhightower83 Oct 23, 2020
2f88e7b
Merge branch 'master' into poc-cache-config
mhightower83 Oct 28, 2020
6c324c1
Merge branch 'master' into poc-cache-config
mhightower83 Nov 11, 2020
929e79b
Merge branch 'master' into poc-cache-config
mhightower83 Nov 19, 2020
1875c73
Merge branch 'master' into poc-cache-config
mhightower83 Nov 20, 2020
d3f9a0a
Expanded and clarified comments.
mhightower83 Dec 1, 2020
e48d95e
Style fixes and more cleanup
mhightower83 Dec 2, 2020
3ab791b
Merge branch 'master' into poc-cache-config
mhightower83 Dec 2, 2020
a3bf35c
Style fix
mhightower83 Dec 2, 2020
1ff2aef
Remove unnessasary IRAM_ATTR from install_non32xfer_exception_handler
mhightower83 Dec 5, 2020
9f9e206
Merge branch 'master' into poc-cache-config
devyte Dec 6, 2020
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Next Next commit
Style corrections
Added MMU_ qualifier to new defines.
Moved changes into their own file.
Don't know how to fix platformio issue.
  • Loading branch information
mhightower83 committed Feb 7, 2020
commit 57043bd41aac0961627b9daf4a1831edb57683a7
198 changes: 99 additions & 99 deletions boards.txt

Large diffs are not rendered by default.

4 changes: 4 additions & 0 deletions cores/esp8266/Arduino.h
Original file line number Diff line number Diff line change
Expand Up @@ -246,6 +246,10 @@ const int TIM_DIV265 __attribute__((deprecated, weak)) = TIM_DIV256;
#include "Updater.h"
#include "debug.h"


#include "mmu_iram.h"


using std::min;
using std::max;
using std::isinf;
Expand Down
28 changes: 0 additions & 28 deletions cores/esp8266/core_esp8266_features.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,6 @@
*/

#include <stdint.h>
#include <c_types.h>

/* precache()
* pre-loads flash data into the flash cache
Expand All @@ -46,33 +45,6 @@ void precache(void *f, uint32_t bytes) {
(void)x;
}
< 9E88 span class='blob-code-inner blob-code-marker ' data-code-marker=" ">


int Cache_Read_Enable_status = -1;

#if (ICACHE_SIZE == 0x4000)
#define SOC_CACHE_SIZE 0 // 16KB
// #define SOC_CACHE_SIZE 1 // 32KB

#pragma message("ICACHE size 16K")


#ifndef ROM_Cache_Read_Enable
#define ROM_Cache_Read_Enable 0x40004678
#endif

typedef void (*fp_Cache_Read_Enable_t)(uint32_t map, uint32_t p, uint32_t v);
constexpr fp_Cache_Read_Enable_t real_Cache_Read_Enable = (fp_Cache_Read_Enable_t)ROM_Cache_Read_Enable;
/*
* Override SDK's ICACHE size
*/
void IRAM_ATTR Cache_Read_Enable(uint32_t map, uint32_t p, uint32_t v) {
(void)v;
real_Cache_Read_Enable(map, p, SOC_CACHE_SIZE);
Cache_Read_Enable_status = SOC_CACHE_SIZE;
}
#endif

#ifdef __cplusplus
}
#endif
3 changes: 0 additions & 3 deletions cores/esp8266/core_esp8266_features.h
Original file line number Diff line number Diff line change
Expand Up @@ -112,9 +112,6 @@ extern "C" {

void precache(void *f, uint32_t bytes);

void Cache_Read_Enable(uint32_t map, uint32_t p, uint32_t v);
extern int Cache_Read_Enable_status;

#ifdef __cplusplus
}
#endif
Expand Down
52 changes: 52 additions & 0 deletions cores/esp8266/mmu_iram.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,52 @@
/*
* Copyright 2020 M Hightower
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#include "Arduino.h"
#include "mmu_iram.h"

extern "C" {

int Cache_Read_Enable_status = -1;

mmu_cre_status_t mmu_status __attribute__((section(".noinit")));

#if (MMU_ICACHE_SIZE == 0x4000)
#define SOC_CACHE_SIZE 0 // 16KB
// #define SOC_CACHE_SIZE 1 // 32KB

#pragma message("ICACHE size 16K")


#ifndef ROM_Cache_Read_Enable
#define ROM_Cache_Read_Enable 0x40004678
#endif

typedef void (*fp_Cache_Read_Enable_t)(uint8_t map, uint8_t p, uint8_t v);
constexpr fp_Cache_Read_Enable_t real_Cache_Read_Enable = (fp_Cache_Read_Enable_t)ROM_Cache_Read_Enable;
/*
* Override SDK's ICACHE size
*/
void IRAM_ATTR Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v) {
mmu_status.map = map;
mmu_status.p = p;
mmu_status.v = v;
real_Cache_Read_Enable(map, p, SOC_CACHE_SIZE);
mmu_status.v_cfg = SOC_CACHE_SIZE;
Cache_Read_Enable_status = SOC_CACHE_SIZE;
}
#endif

};
40 changes: 40 additions & 0 deletions cores/esp8266/mmu_iram.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
/*
* Copyright 2020 M Hightower
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#ifndef MMU_IRAM_H
#define MMU_IRAM_H

#include <stdint.h>
#include <c_types.h>

#ifdef __cplusplus
extern "C" {
#endif

typedef struct MMU_CRE_STATUS {
uint32_t v_cfg;
uint32_t map;
uint32_t p;
uint32_t v;
} mmu_cre_status_t;

extern mmu_cre_status_t mmu_status;
Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Does this need to be exported? Can it be private to the cpp?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Yes, keep private. This looks like more of the development monitor/debug code. I am not sure how much to keep / what to keep. I think this should be moved under a #ifdef DEV_DEBUG_MMU_IRAM

Copy link
Collaborator

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Does this still need to be cleaned up?

extern int Cache_Read_Enable_status;

#ifdef __cplusplus
}
#endif
#endif
42 changes: 25 additions & 17 deletions libraries/esp8266/examples/MMU48K/MMU48K.ino
Original file line number Diff line number Diff line change
Expand Up @@ -8,14 +8,14 @@

*/

#if (IRAM_SIZE > 32*1024)
#if (MMU_IRAM_SIZE > 32*1024)
uint32_t gobble[4 * 1024] IRAM_ATTR;
constexpr size_t gobble_sz = sizeof(gobble);
#endif

#ifdef SEC_HEAP
constexpr uint32_t *gobble = (uint32_t *)SEC_HEAP;
constexpr size_t gobble_sz = SEC_HEAP_SIZE;
#ifdef MMU_SEC_HEAP
constexpr F987 uint32_t *gobble = (uint32_t *)MMU_SEC_HEAP;
constexpr size_t gobble_sz = MMU_SEC_HEAP_SIZE;
#endif

bool isValid(uint32_t *probe) {
Expand All @@ -25,7 +25,7 @@ bool isValid(uint32_t *probe) {
uint32_t saveData = *probe;
for (size_t i = 0; i < 32; i++) {
*probe = BIT(i);
asm volatile ("" ::: "memory");
asm volatile("" ::: "memory");
uint32_t val = *probe;
if (val != BIT(i)) {
ets_uart_printf(" Read 0x%08X != Wrote 0x%08X\n", val, (uint32_t)BIT(i));
Expand Down Expand Up @@ -60,33 +60,41 @@ void setup() {
WiFi.mode(WIFI_OFF);
Serial.begin(115200);
delay(20);
Serial.printf_P(PSTR("\n\nI am Alive!\n"));
Serial.printf_P(PSTR("\n\nSetup ...\n"));

Serial.printf_P(PSTR("\nMMU Configuration\n"));
Serial.printf_P(PSTR(" Cache_Read_Enable status %d\n"), Cache_Read_Enable_status);
#ifdef ICACHE_SIZE
Serial.printf_P(PSTR(" ICACHE Size: %u\n"), ICACHE_SIZE);
#ifdef MMU_ICACHE_SIZE
Serial.printf_P(PSTR(" ICACHE Size: %u\n"), MMU_ICACHE_SIZE);
#endif
#ifdef IRAM_SIZE
Serial.printf_P(PSTR(" IRAM Size: %u\n"), IRAM_SIZE);
#ifdef MMU_IRAM_SIZE
Serial.printf_P(PSTR(" IRAM Size: %u\n"), MMU_IRAM_SIZE);
#endif
#ifdef SEC_HEAP
Serial.printf_P(PSTR(" Secondary Heap at: %p\n"), SEC_HEAP);
Serial.printf_P(PSTR(" Secondary Heap Size: %u\n"), SEC_HEAP_SIZE);
#ifdef MMU_SEC_HEAP
Serial.printf_P(PSTR(" Secondary Heap at: %p\n"), MMU_SEC_HEAP);
Serial.printf_P(PSTR(" Secondary Heap Size: %u\n"), MMU_SEC_HEAP_SIZE);
#endif
constexpr uint32_t volatile *dport_ = (uint32_t volatile *)0x3FF00000;
uint32_t dport_6 = dport_[9];
if (0 == (dport_6 & 0x10)) {
Serial.printf_P(PSTR(" IRAM block mapped to: 0x40108000\n"));
}
if (0 == (dport_6 & 0x08)) {
Serial.printf_P(PSTR(" IRAM block mapped to: 0x4010C000\n"));
}

#if (IRAM_SIZE > 0x8000) || defined(SEC_HEAP)
#if (MMU_IRAM_SIZE > 0x8000) || defined(MMU_SEC_HEAP)
if (isValid(gobble)) {
// Put something in our new memory
for (size_t i = 0; i < (gobble_sz/4); i++) {
for (size_t i = 0; i < (gobble_sz / 4); i++) {
gobble[i] = (uint32_t)&gobble[i];
}
}

// Now is it there?
dump_mem(gobble, 32);
dump_mem(&gobble[gobble_sz/4/2], 32);
dump_mem(&gobble[gobble_sz/4 - 32], 32);
dump_mem(&gobble[gobble_sz / 4 / 2], 32);
dump_mem(&gobble[gobble_sz / 4 - 32], 32);
#endif

// Lets peak over the edge
Expand Down
8 changes: 4 additions & 4 deletions tools/boards.txt.py
Original file line number Diff line number Diff line change
Expand Up @@ -1190,11 +1190,11 @@

'mmu_menu': collections.OrderedDict([
( '.menu.mmu.3232', '32KB cache + 32KB IRAM (balanced)' ),
( '.menu.mmu.3232.build.mmuflags', '-DIRAM_SIZE=0x8000 -DICACHE_SIZE=0x8000'),
( '.menu.mmu.3232.build.mmuflags', '-DMMU_IRAM_SIZE=0x8000 -DMMU_ICACHE_SIZE=0x8000'),
( '.menu.mmu.4816', '16KB cache + 48KB IRAM (IRAM)' ),
( '.menu.mmu.4816.build.mmuflags', '-DIRAM_SIZE=0 F438 xC000 -DICACHE_SIZE=0x4000' ),
( '.menu.mmu.4816.build.mmuflags', '-DMMU_IRAM_SIZE=0xC000 -DMMU_ICACHE_SIZE=0x4000' ),
( '.menu.mmu.3216', '16KB cache + 32KB IRAM + 16KB sec heap (Heap)' ),
( '.menu.mmu.3216.build.mmuflags', '-DIRAM_SIZE=0x8000 -DICACHE_SIZE=0x4000 -DSEC_HEAP=0x40108000 -DSEC_HEAP_SIZE=0x4000' ),
( '.menu.mmu.3216.build.mmuflags', '-DMMU_IRAM_SIZE=0x8000 -DMMU_ICACHE_SIZE=0x4000 -DMMU_SEC_HEAP=0x40108000 -DMMU_SEC_HEAP_SIZE=0x4000' ),
]),

}
Expand Down Expand Up @@ -1367,7 +1367,7 @@ def flash_map (flashsize_kb, fs_kb = 0):
print("{")
print(" dport0_0_seg : org = 0x3FF00000, len = 0x10")
print(" dram0_0_seg : org = 0x3FFE8000, len = 0x14000")
print(" iram1_0_seg : org = 0x40100000, len = IRAM_SIZE")
print(" iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE")
print(" irom0_0_seg : org = 0x40201010, len = 0x%x" % max_upload_size)
print("}")
print("")
Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.16m14m.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.16m15m.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xf9ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m128.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xd9ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m144.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xd5ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m160.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xd1ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m192.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xc9ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m256.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xb9ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m512.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0x79ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.1m64.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xe9ff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.2m.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.2m128.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.2m1m.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.2m256.ld.h
97AE
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
2 changes: 1 addition & 1 deletion tools/sdk/ld/eagle.flash.2m512.ld.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = IRAM_SIZE
iram1_0_seg : org = 0x40100000, len = MMU_IRAM_SIZE
irom0_0_seg : org = 0x40201010, len = 0xfeff0
}

Expand Down
Loading
0