all: Remove remaining qemu-riscv references.

dpgeorge · dpgeorge · commit 3ea1ce63da9b · 2024-09-06T11:08:22.000+10:00
Signed-off-by: Damien George &lt;damien@micropython.org&gt;
diff --git a/README.md b/README.md
@@ -115,7 +115,6 @@ In addition, the following ports are provided in this repository:
  - [pic16bit](ports/pic16bit) -- Microchip PIC 16-bit.
  - [powerpc](ports/powerpc) -- IBM PowerPC (including Microwatt)
  - [qemu-arm](ports/qemu-arm) -- QEMU-based Arm emulated target (for testing)
- - [qemu-riscv](ports/qemu-riscv) -- QEMU-based RISC-V emulated target (for testing)
  - [renesas-ra](ports/renesas-ra) -- Renesas RA family.
  - [rp2](ports/rp2) -- Raspberry Pi RP2040 (including Pico and Pico W).
  - [samd](ports/samd) -- Microchip (formerly Atmel) SAMD21 and SAMD51.
diff --git a/tests/run-tests.py b/tests/run-tests.py
@@ -681,8 +681,6 @@ def run_tests(pyb, tests, args, result_dir, num_threads=1):
             skip_tests.add("inlineasm/asmfpldrstr.py")
             skip_tests.add("inlineasm/asmfpmuldiv.py")
             skip_tests.add("inlineasm/asmfpsqrt.py")
-        elif args.target == "qemu-riscv":
-            skip_tests.add("misc/print_exception.py")  # requires sys stdfiles
         elif args.target == "webassembly":
             skip_tests.add("basics/string_format_modulo.py")  # can't print nulls to stdout
             skip_tests.add("basics/string_strip.py")  # can't print nulls to stdout
@@ -1047,7 +1045,6 @@ def main():
 
     LOCAL_TARGETS = (
         "unix",
-        "qemu-riscv",
         "webassembly",
     )
     EXTERNAL_TARGETS = (
@@ -1140,12 +1137,6 @@ def main():
                     "inlineasm",
                     "ports/qemu-arm",
                 )
-            elif args.target == "qemu-riscv":
-                if not args.write_exp:
-                    raise ValueError("--target=qemu-riscv must be used with --write-exp")
-                # Generate expected output files for qemu run.
-                # This list should match the test_dirs tuple in tinytest-codegen.py.
-                test_dirs += ("float",)
             elif args.target == "webassembly":
                 test_dirs += ("float", "ports/webassembly")
         else:
