Minor bugfixes

abs-tudelft · Sep 2, 2019 · 12b0acc · 12b0acc
1 parent 70086a9
commit 12b0acc
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/vhdmmio/config/behavior/request.py b/vhdmmio/config/behavior/request.py
@@ -27,7 +27,7 @@
     ctrl_reset=False,
     ctrl_increment=False,
     ctrl_decrement=False,
-    ctrl_bit_set=True,
+    ctrl_bit_set=False,
     ctrl_bit_clear=False,
     ctrl_bit_toggle=False,
     reset=0)
@@ -57,7 +57,7 @@ class Strobe(BasePrimitive):
     ctrl_reset=False,
     ctrl_increment=False,
     ctrl_decrement=False,
-    ctrl_bit_set=True,
+    ctrl_bit_set=False,
     ctrl_bit_clear=False,
     ctrl_bit_toggle=False,
     reset=0)

diff --git a/vhdmmio/vhdl/__init__.py b/vhdmmio/vhdl/__init__.py
@@ -523,13 +523,13 @@ def generate(self, output_dir, annotate=False):
             pjoin(_MODULE_DIR, 'entity.template.vhd'),
             name + '.gen.vhd',
             comment='-- ', annotate=annotate)
-        print('Wrote %s.vhd' % name)
+        print('Wrote %s.gen.vhd' % name)
 
         self._tple.apply_file_to_file(
             pjoin(_MODULE_DIR, 'package.template.vhd'),
             name + '_pkg.gen.vhd',
             comment='-- ', annotate=annotate)
-        print('Wrote %s_pkg.vhd' % name)
+        print('Wrote %s_pkg.gen.vhd' % name)
 
     def gather_ports(self):
         """Yields all the inputs/outputs/generics excluding `clk` and `reset`