Modeling and Analysis of Capacitive Relaxation Quenching in a Single Photon Avalanche Diode (SPAD) Applied to a CMOS Image Sensor
<p>(<b>a</b>) Circuit diagram of a four transistors pixel circuit. Abbreviations TRN, RST, FD, SF, and SEL denote transfer transistor, reset transistor, floating diffusion, source follower transistor, and select transistor. (<b>b</b>–<b>d</b>) Simplified equivalent circuit models and band diagrams of single-photon avalanche diode (SPAD), (<b>b</b>) after the reset process, (<b>c</b>) during avalanche multiplication, and (<b>d</b>) after RQ. It is noted that the series capacitances in (<b>b</b>–<b>d</b>) are a summation of the diode capacitance and the stray components. (<b>e</b>) A typical timing chart of the pixel circuit. The notations, “H” and “L”, mean high voltage and low voltage is applied to gates of the transistors, respectively. The arrow denoted as <span class="html-italic">h</span>ν indicates an arrival of a photon during an exposure period resulting in voltage drop of the node SPAD.</p> "> Figure 2
<p>Calculated parameters in time domain. The time increment is 0.1 ps. (<b>a</b>) Time evolutions of the electron number in the <span class="html-italic">i</span>-region, (<b>b</b>) the number of accumulated electrons in the series capacitance, and (<b>c</b>) reverse bias of SPAD. The red, green, purple, and blue lines denote, respectively, the results with initial biases 29 V, 30 V, 31 V, and 32 V. A horizontal dashed line in (<b>c</b>) indicates <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <msub> <mi>V</mi> <mrow> <mi>B</mi> <mi>D</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math> and vertical dashed lines show the times when d<span class="html-italic">n</span>/d<span class="html-italic">t</span> = 0 or <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <mi>V</mi> <mrow> <mo>(</mo> <mi>t</mi> <mo>)</mo> </mrow> <mrow> <mo>|</mo> <mo>=</mo> <mo>|</mo> </mrow> <msub> <mi>V</mi> <mrow> <mi>B</mi> <mi>D</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math>.</p> "> Figure 3
<p>The voltage drop after the quenching (<math display="inline"><semantics> <mrow> <mo>=</mo> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> </mrow> </semantics></math>) with respect to the initial bias (<math display="inline"><semantics> <mrow> <mo>=</mo> <msub> <mi>V</mi> <mn>0</mn> </msub> </mrow> </semantics></math> ). The blue dots connected by line, the black dashed line, and the red circles connected by dashed line denote, respectively, the calculated results of <math display="inline"><semantics> <mrow> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> </mrow> </semantics></math>, <math display="inline"><semantics> <mrow> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> <mo>=</mo> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> </semantics></math>, and the experimental result. A red hatched area is a region between calculated curves; <math display="inline"><semantics> <mrow> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> </mrow> </semantics></math> and <math display="inline"><semantics> <mrow> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> <mo>=</mo> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> </semantics></math>, where experimental results fall within. It is noted that the measured results of <math display="inline"><semantics> <mrow> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> </mrow> </semantics></math> are converted from the actually measured voltage of a sensing node or a floating diffusion (FD) by taking account of the capacitance values of a SPAD and FD.</p> "> Figure 4
<p>A cross sectional view of a SPAD with a vertical avalanche photodiode structure (VAPD) and the designed potential profiles in the horizontal (A-A’) and the vertical (B-B’) direction. The transistor shown on the cross section represents the reset transistor (RST), in <a href="#sensors-20-03007-f001" class="html-fig">Figure 1</a>a.</p> "> Figure 5
<p>A block diagram of the developed CMOS image sensor (CIS).</p> "> Figure 6
<p>(<b>a</b>–<b>c</b>) Oscilloscope waveforms of output signals (Yellow: SF output, Blue: Light pulse) of pixels measured at <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math> = (<b>a</b>) N.A. (non-avalanche region), (<b>b</b>) 0.7 V, (<b>c</b>) 1.2 V. (<b>d</b>–<b>f</b>) Histograms of output signal of pixels measured at <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math> = (<b>d</b>) N.A. (non-avalanche region), (<b>e</b>) 0.7 V, (f) 1.2 V. A red line in the graph indicates SF saturation voltage (1.3 V). (<b>g</b>–<b>i</b>) Pictures of a zebra taken at <math display="inline"><semantics> <mrow> <mo>|</mo> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> <mo>|</mo> </mrow> </semantics></math> equals (<b>g</b>) N.A. (non-avalanche region), (<b>h</b>) 0.7 V, (<b>i</b>) 1.2 V. It is noted that the output voltage is slightly less than <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math>, e.g., 1.1 V with <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math> = 1.2 V. Considering the gain of source follower (0.8), the input referred voltage swing is 1.4 V which is larger than <math display="inline"><semantics> <mrow> <mrow> <mo>|</mo> <mrow> <msub> <mi>V</mi> <mrow> <mi>e</mi> <mi>x</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> </mrow> </semantics></math>.</p> "> Figure 7
<p>(<b>a</b>) The standard deviation of <math display="inline"><semantics> <mrow> <mo>|</mo> <mi mathvariant="sans-serif">Δ</mi> <msub> <mi>V</mi> <mi>Q</mi> </msub> <mo>|</mo> </mrow> </semantics></math>. (<b>b</b>) Photon detection efficient (PDE).</p> "> Figure 8
<p>(<b>a</b>) A top view of a SPAD. The edge of the SPAD is hatched. (<b>b</b>,<b>c</b>) Simplified band diagrams at the center of the SPAD (<b>b</b>) and at the edge of the SPAD (<b>c</b>).</p> "> Figure 9
<p>(<b>a</b>) A model circuit for a resistive quenching. (<b>b</b>) Calculated reverse biases for <span class="html-italic">R</span> = 100 kΩ (blue) <span class="html-italic">R</span> = 30 kΩ (green) <span class="html-italic">R</span> = ∞ (red). (<b>c</b>) Carrier numbers for <span class="html-italic">R</span> = 100 kΩ (blue) <span class="html-italic">R</span> = 30 kΩ (green) <span class="html-italic">R</span> = ∞ (red). Capacitance is 6fF for all conditions.</p> ">
Abstract
:1. Introduction
2. Modeling of Capacitive Relaxation Quenching
3. Results
3.1. Numerical Calculation
3.2. Experimental Results
4. Discussion
4.1. Breakdown Voltage as an Equilibrium Point of the Dynamical System
4.2. Difference of between Simulation and Experiment
4.3. The Mechanism of Resistive Quenching
5. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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Meaning | Symbol | Value |
---|---|---|
Width of depletion region | W | 0.80 µm |
Saturation velocity of electron [19] | vs,e | 1.02 × 107 cm /s |
Saturation velocity of hole [19] | vs,h | 8.31 × 106 cm/s |
Coefficients of impact ionization ratio [18] | 3.80 × 106 cm−1 | |
2.25 × 107 cm−1 | ||
a | 1.75 × 106 V/cm | |
b | 3.26 × 106 V/cm |
CMOS Technology | 65 nm 1P4M |
---|---|
Pixel Size | 6 µm |
Array size | 400 × 400 |
Physical Signal | Photo-Charge |
Quenching Type | Capacitive quenching |
Fill Factor | 70% |
Operation Voltage | −3.3 V~−29 V |
DCR(@RT) | 100 cps |
Frame Rate | 60 fps |
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Inoue, A.; Okino, T.; Koyama, S.; Hirose, Y. Modeling and Analysis of Capacitive Relaxation Quenching in a Single Photon Avalanche Diode (SPAD) Applied to a CMOS Image Sensor. Sensors 2020, 20, 3007. https://doi.org/10.3390/s20103007
Inoue A, Okino T, Koyama S, Hirose Y. Modeling and Analysis of Capacitive Relaxation Quenching in a Single Photon Avalanche Diode (SPAD) Applied to a CMOS Image Sensor. Sensors. 2020; 20(10):3007. https://doi.org/10.3390/s20103007
Chicago/Turabian StyleInoue, Akito, Toru Okino, Shinzo Koyama, and Yutaka Hirose. 2020. "Modeling and Analysis of Capacitive Relaxation Quenching in a Single Photon Avalanche Diode (SPAD) Applied to a CMOS Image Sensor" Sensors 20, no. 10: 3007. https://doi.org/10.3390/s20103007