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Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform

Published: 23 August 2022 Publication History

Abstract

Event cameras are bio-inspired vision sensors that asynchronously represent pixel-level brightness changes as event streams. Event-based monocular multi-view stereo (EMVS) is a technique that exploits the event streams to estimate semi-dense 3D structure with known trajectory. It is a critical task for event-based monocular SLAM. However, the required intensive computation workloads make it challenging for real-time deployment on embedded platforms. In this paper, Eventor is proposed as a fast and efficient EMVS accelerator by realizing the most critical and time-consuming stages including event back-projection and volumetric ray-counting on FPGA. Highly paralleled and fully pipelined processing elements are specially designed via FPGA and integrated with the embedded ARM as a heterogeneous system to improve the throughput and reduce the memory footprint. Meanwhile, the EMVS algorithm is reformulated to a more hardware-friendly manner by rescheduling, approximate computing and hybrid data quantization. Evaluation results on DAVIS dataset show that Eventor achieves up to 24X improvement in energy efficiency compared with Intel i5 CPU platform.

References

[1]
Christian Brandli, Raphael Berner, Minhao Yang, Shih-Chii Liu, and Tobi Delbruck. A 240X180 130dB 3μs latency global shutter spatiotemporal vision sensor. IEEE JSSC, 49(10):2333--2341, 2014.
[2]
Bongki Son, Yunjae Suh, Sungho Kim, et al. A 640X 480 dynamic vision sensor with a 9μm pixel and 300meps address-event representation. In IEEE ISSCC, pages 66--67. IEEE, 2017.
[3]
Cesar Cadena, Luca Carlone, et al. Past, present, and future of simultaneous localization and mapping: Toward the robust-perception age. IEEE Transactions on Robotics, 32(6):1309--1332, 2016.
[4]
Yi Zhou, Guillermo Gallego, and Shaojie Shen. Event-based stereo visual odometry. IEEE Transactions on Robotics, 37(5):1433--1450, 2021.
[5]
Yi Zhou, Guillermo Gallego, Henri Rebecq, Laurent Kneip, Hongdong Li, and Davide Scaramuzza. Semi-dense 3D reconstruction with a stereo event camera. In Proceedings of ECCV, pages 235--251, 2018.
[6]
Guillermo Gallego, Tobi Delbrück, et al. Event-based vision: A survey. IEEE TPAMI, 44(1):154--180, 2020.
[7]
Henri Rebecq, Guillermo Gallego, et al. EMVS: Event-based multi-view stereo---3D reconstruction with an event camera in real-time. IJCV, 126(12):1394--1414, 2018.
[8]
Hanme Kim et al. Real-time 3D reconstruction and 6-DOF tracking with an event camera. In Proceedings of ECCV, pages 349--364. Springer, 2016.
[9]
Guillermo Gallego, Henri Rebecq, and Davide Scaramuzza. A unifying contrast maximization framework for event cameras, with applications to motion, depth, and optical flow estimation. In Proceedings of CVPR, pages 3867--3876, 2018.
[10]
Robert T Collins. A space-sweep approach to true multi-image matching. In Proceedings of CVPR, pages 358--363. IEEE, 1996.
[11]
Henri Rebecq, Timo Horstschäfer, et al. EVO: A geometric approach to event-based 6-DOF parallel tracking and mapping in real time. IEEE RAL, 2(2):593--600, 2016.
[12]
Elias Mueggler, Henri Rebecq, Guillermo Gallego, Tobi Delbruck, and Davide Scaramuzza. The event-camera dataset and simulator: Event-based data for pose estimation, visual odometry, and SLAM. IJRR, 36(2):142--149, 2017.
[13]
Runze Liu, Jianlei Yang, Yiran Chen, and Weisheng Zhao. eSLAM: An energy-efficient accelerator for real-time ORB-SLAM on FPGA platform. In Proceedings of DAC, pages 1--6, 2019.
[14]
Wenzhi Fu, Jianlei Yang, Pengcheng Dai, Yiran Chen, and Weisheng Zhao. A scalable pipelined dataflow accelerator for object region proposals on FPGA platform. In Proceedings of FPT, pages 346--349. IEEE, 2018.
[15]
Xilinx. Zynq-7000 SoC. https://www.xilinx.com/products/silicondevices/soc/zynq-7000.html, 2018.
[16]
Intel Chip's Specifications. Intel Core i5-7300HQ Processor. https://ark.intel.com/content/www/us/en/ark/products/97456/intel-core-i57300hq-processor-6m-cache-up-to-3-50-ghz.html, 2017.

Cited By

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  • (2023)Vector-Based Dedicated Processor Architecture for Efficient Tracking in VSLAM SystemsIEEE Embedded Systems Letters10.1109/LES.2023.329890015:4(182-185)Online publication date: 25-Sep-2023
  • (2023)Effective Co-Segmentation and Data Augmentation for Unsupervised Multi-View Stereo2023 2nd International Conference on Futuristic Technologies (INCOFT)10.1109/INCOFT60753.2023.10425573(1-6)Online publication date: 24-Nov-2023
  • (2023)Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247784(1-6)Online publication date: 9-Jul-2023

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cover image ACM Conferences
DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference
July 2022
1462 pages
ISBN:9781450391429
DOI:10.1145/3489517
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

Publication History

Published: 23 August 2022

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Author Tags

  1. FPGA
  2. acceleration
  3. event-based vision
  4. multi-view stereo

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  • Research-article

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  • NSFC

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DAC '22
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DAC '22: 59th ACM/IEEE Design Automation Conference
July 10 - 14, 2022
California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2023)Vector-Based Dedicated Processor Architecture for Efficient Tracking in VSLAM SystemsIEEE Embedded Systems Letters10.1109/LES.2023.329890015:4(182-185)Online publication date: 25-Sep-2023
  • (2023)Effective Co-Segmentation and Data Augmentation for Unsupervised Multi-View Stereo2023 2nd International Conference on Futuristic Technologies (INCOFT)10.1109/INCOFT60753.2023.10425573(1-6)Online publication date: 24-Nov-2023
  • (2023)Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247784(1-6)Online publication date: 9-Jul-2023

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