research-article

A spiking neuromorphic design with resistive crossbar

Authors:

Hao JiangAuthors Info & Claims

DAC '15: Proceedings of the 52nd Annual Design Automation Conference

Article No.: 14, Pages 1 - 6

https://doi.org/10.1145/2744769.2744783

Published: 07 June 2015 Publication History

Abstract

Neuromorphic systems recently gained increasing attention for their high computation efficiency. Many designs have been proposed and realized with traditional CMOS technology or emerging devices. In this work, we proposed a spiking neuromorphic design built on resistive crossbar structures and implemented with IBM 130nm technology. Our design adopts a rate coding scheme where pre- and post-neuron signals are represented by digitalized pulses. The weighting function of pre-neuron signals is executed on the resistive crossbar in analog format. The computing result is transferred into digitalized output spikes via an integrate-and-fire circuit (IFC) as the post-neuron. We calibrated the computation accuracy of the entire system through circuit simulations. The results demonstrated a good match to our analytic modeling. Furthermore, we implemented both feedforward and Hopfield networks by utilizing the proposed neuromorphic design. The system performance and robustness were studied through massive Monte-Carlo simulations based on the application of digital image recognition. Comparing to the previous crossbar-based computing engine that represents data with voltage amplitude, our design can achieve >50% energy savings, while the average probability of failed recognition increase only 1.46% and 5.99% in the feedforward and Hopfield implementations, respectively.

References

[1]

W. A. Wulf and S. A. McKee, "Hitting the memory wall: implications of the obvious," ACM SIGARCH computer architecture news, vol. 23, no. 1, pp. 20--24, 1995.

Digital Library

[2]

C. Gamrat, "Challenges and perspectives of computer architecture at the nano scale," in ISVLSI, pp. 8--10, 2010.

Digital Library

[3]

P. Merolla et al., "A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm," in CICC, pp. 1--4, IEEE, 2011.

[4]

P. A. Merolla et al., "A million spiking-neuron integrated circuit with a scalable communication network and interface," Science, vol. 345, no. 6197, pp. 668--673, 2014.

[5]

C. Mead and M. Ismail, Analog VLSI implementation of neural systems. Springer, 1989.

[6]

J. Schemmel et al., "A wafer-scale neuromorphic hardware system for large-scale neural modeling," in ISCAS, pp. 1947--1950, May 2010.

[7]

S. Mitra et al., "Real-time classification of complex patterns using spike-based learning in neuromorphic VLSI," TBioCAS, vol. 3, no. 1, pp. 32--42, 2009.

[8]

S. H. Jo et al., "Nanoscale memristor device as synapse in neuromorphic systems," Nano letters, vol. 10, no. 4, pp. 1297--1301, 2010.

[9]

G. S. Snider, "Spike-timing-dependent learning in memristive nanodevices," in Nanoscale Architectures, pp. 85--92, 2008.

Digital Library

[10]

A. Thomas, "Memristor-based neural networks," APL, vol. 46, no. 9, p. 093001, 2013.

[11]

S. Yu et al., "Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory," Applied Physics Letters, vol. 98, no. 10, p. 103514, 2011.

[12]

T.-W. Lee and J. Nickel, "Memristor resistance modulation for analog applications," Electron Device Letters, vol. 33, pp. 1456--1458, Oct 2012.

[13]

F. Clermidy et al., "Advanced technologies for brain-inspired computing," in ASP-DAC, pp. 563--569, Jan 2014.

[14]

M. Sharad et al., "Ultra low power associative computing with spin neurons and resistive crossbar memory," in DAC, pp. 107:1--107:6, ACM, 2013.

Digital Library

[15]

M. Hu et al., "Memristor crossbar-based neuromorphic computing system: A case study," TNNLS, vol. 25, pp. 1864--1878, Oct 2014.

[16]

M. Chu et al., "Neuromorphic hardware system for visual pattern recognition with memristor array and cmos neuron," Industrial Electronics, vol. PP, no. 99, pp. 1--1, 2014.

[17]

S.-H. Jo et al., "High-density crossbar arrays based on a Si memristive system," Nano Letters, vol. 9, no. 2, pp. 870--874, 2009.

[18]

W. Gerstner and W. M. Kistler, Spiking Neuron Models. Cambridge University Press, 2002.

Digital Library

[19]

C. Liu and H. Li, "A weighted sensing scheme for ReRAM-based cross-point memory array," in ISVLSI, pp. 65--70, 2014.

Digital Library

[20]

A. Flocke and T. Noll, "Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory," in Solid State Circuits Conference, pp. 328--331, Sept 2007.

[21]

J.-J. Huang et al., "One selector-one resistor (1S1R) crossbar array for high-density flexible memory applications," in Electron Devices Meeting, pp. 31.7.1--31.7.4, Dec 2011.

[22]

S.-S. Sheu et al., "A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme," in VLSI Circuits, pp. 82--83, June 2009.

[23]

A. Joubert et al., "Hardware spiking neurons design: Analog or digital?," in IJCNN, pp. 1--5, June 2012.

Cited By

Xu XWang AShui Y(2024)Readout Circuit Design for RRAM Array-Based Computing in Memory ArchitectureElectronics10.3390/electronics1313247813:13(2478)Online publication date: 25-Jun-2024
https://doi.org/10.3390/electronics13132478
Liu FWang ZZhao WYang NChen YHuang SLi HYang TPei SLiang XJiang L(2024)Exploiting Temporal-Unrolled Parallelism for Energy-Efficient SNN AccelerationIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2024.341571235:10(1749-1764)Online publication date: Oct-2024
https://doi.org/10.1109/TPDS.2024.3415712
Yang WZhou SXu HZhou QLi JLi QWang YChen C(2024)An Integration and Time-Sampling based Readout Circuit with Current Compensation for Parallel MAC operations in RRAM Arrays2024 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS58744.2024.10558621(1-5)Online publication date: 19-May-2024
https://doi.org/10.1109/ISCAS58744.2024.10558621
Show More Cited By

Index Terms

A spiking neuromorphic design with resistive crossbar
1. Computer systems organization
  1. Architectures
    1. Other architectures

Recommendations

A Reconfigurable Digital Neuromorphic Processor with Memristive Synaptic Crossbar for Cognitive Computing
Special Issues on Neuromorphic Computing and Emerging Many-Core Systems for Exascale Computing

This article presents a brain-inspired reconfigurable digital neuromorphic processor (DNP) architecture for large-scale spiking neural networks. The proposed architecture integrates an arbitrary number of N digital leaky integrate-and-fire (LIF) silicon ...
A spiking neuron model: applications and learning

This paper presents a biologically inspired, hardware-realisable spiking neuron model, which we call the Temporal Noisy-Leaky Integrator (TNLI). The dynamic applications of the model as well as its applications in Computational Neuroscience are ...
Algorithm and Application Impacts of Programmable Plasticity in Spiking Neuromorphic Hardware
ICONS '23: Proceedings of the 2023 International Conference on Neuromorphic Systems

Synaptic plasticity has long been thought to be key to learning in both biological neural networks and artificial neural networks. There are a wide array of plasticity rules in biological neural systems, but neuromorphic computing has mainly focused ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '15: Proceedings of the 52nd Annual Design Automation Conference

June 2015

1204 pages

ISBN:9781450335201

DOI:10.1145/2744769

Copyright © 2015 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

SIGDA: ACM Special Interest Group on Design Automation

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 07 June 2015

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Research-article

Conference

DAC '15

Sponsor:

SIGDA

DAC '15: The 52nd Annual Design Automation Conference 2015

June 7 - 11, 2015

California, San Francisco

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

94
Total Citations
View Citations
739
Total Downloads

Downloads (Last 12 months)74
Downloads (Last 6 weeks)4

Reflects downloads up to 10 Oct 2024

Other Metrics

View Author Metrics

Citations

Cited By

Xu XWang AShui Y(2024)Readout Circuit Design for RRAM Array-Based Computing in Memory ArchitectureElectronics10.3390/electronics1313247813:13(2478)Online publication date: 25-Jun-2024
https://doi.org/10.3390/electronics13132478
Liu FWang ZZhao WYang NChen YHuang SLi HYang TPei SLiang XJiang L(2024)Exploiting Temporal-Unrolled Parallelism for Energy-Efficient SNN AccelerationIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2024.341571235:10(1749-1764)Online publication date: Oct-2024
https://doi.org/10.1109/TPDS.2024.3415712
Yang WZhou SXu HZhou QLi JLi QWang YChen C(2024)An Integration and Time-Sampling based Readout Circuit with Current Compensation for Parallel MAC operations in RRAM Arrays2024 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS58744.2024.10558621(1-5)Online publication date: 19-May-2024
https://doi.org/10.1109/ISCAS58744.2024.10558621
Liu SGuo BFang CWang ZLuo SZhou ZYu Z(2024)Enabling Resource-Efficient AIoT System With Cross-Level Optimization: A SurveyIEEE Communications Surveys & Tutorials10.1109/COMST.2023.331995226:1(389-427)Online publication date: Sep-2025
https://doi.org/10.1109/COMST.2023.3319952
Li BZhong DChen XLiu C(2023)Enabling Neuromorphic Computing for Artificial Intelligence with Hardware-Software Co-DesignNeuromorphic Computing10.5772/intechopen.111963Online publication date: 15-Nov-2023
https://doi.org/10.5772/intechopen.111963
Alam SFoshie ARose GThapliyal HDeMara RPartin-Vaisband IKatkoori S(2023)A Runtime-Reconfigurable Hardware Encoder for Spiking Neural NetworksProceedings of the Great Lakes Symposium on VLSI 202310.1145/3583781.3590284(203-206)Online publication date: 5-Jun-2023
https://dl.acm.org/doi/10.1145/3583781.3590284
Jin OXing QLi YDeng SHe SPan GAamodt TJerger NSwift M(2023)Mapping Very Large Scale Spiking Neuron Network to Neuromorphic HardwareProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3582016.3582038(419-432)Online publication date: 25-Mar-2023
https://dl.acm.org/doi/10.1145/3582016.3582038
Zheng HBai KYi Y(2023)Enabling a New Methodology of Neural Coding: Multiplexing Temporal Encoding in Neuromorphic ComputingIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.323451431:3(331-342)Online publication date: Mar-2023
https://doi.org/10.1109/TVLSI.2023.3234514
Sakemi YMorino KMorie TAihara K(2023)A Supervised Learning Algorithm for Multilayer Spiking Neural Networks Based on Temporal Coding Toward Energy-Efficient VLSI Processor DesignIEEE Transactions on Neural Networks and Learning Systems10.1109/TNNLS.2021.309506834:1(394-408)Online publication date: Jan-2023
https://doi.org/10.1109/TNNLS.2021.3095068
Patni TPethe A(2023)True Random Number Generator Implemented in ReRAM Crossbar Based on Static Stochasticity of ReRAMs2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)10.1109/APCCAS60141.2023.00024(55-59)Online publication date: 19-Nov-2023
https://doi.org/10.1109/APCCAS60141.2023.00024
Show More Cited By

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents