Abstract
To efficiently simulate very large networks of interconnected neurons, particular consideration has to be given to the computer architecture being used. This article presents techniques for implementing simulators for large neural networks on a number of different computer architectures. The neuronal simulation task and the computer architectures of interest are first characterized, and the potential bottlenecks are highlighted. Then we describe the experience gained from adapting an existing simulator, SWIM, to two very different architectures–vector computers and multiprocessor workstations. This work lead to the implementation of a new simulation library, SPLIT, designed to allow efficient simulation of large networks on several architectures. Different computer architectures put different demands on the organization of both data structures and computations. Strict separation of such architecture considerations from the neuronal models and other simulation aspects makes it possible to construct both portable and extendible code.
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Hammarlund, P., Ekeberg, Ö. Large Neural Network Simulations on Multiple Hardware Platforms. J Comput Neurosci 5, 443–459 (1998). https://doi.org/10.1023/A:1008893429695
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DOI: https://doi.org/10.1023/A:1008893429695