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A K-Band Low-Noise and High-Gain Down-Conversion Active Mixer Using 0.18-μm CMOS Technology

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Abstract

This paper fabricates a K-Band 24 GHz high-gain, low-power down-conversion mixer using a standard TSMC 0.18-μm CMOS technology. The architecture that is used is based on that of a Gilbert cell mixer. Transformer coupling technology is used at the node between the transconductance stage and the local oscillator switches stage. The conversion gain, the noise figure and the size of the chip area performance are significantly better, so this mixer with specific RF parameters gives excellent performance. The simulation (post-sim) results for the proposed mixer show a 15–19 dB power conversion gain, a − 8.3 dBm input third-order intercept point (IIP3) at 24 GHz, a 10–12.3 dB signal side band (SSB) noise figure and an RF bandwidth of 20–26 GHz. The core power consumption for the mixer is 3.096 mW and the output buffer power consumption is 3.122 mW. The total dc power consumption for this mixer, including the output buffers, is 6.22 mW. The total chip size for the K-Band mixer is 0.95 × 1.14 mm2.

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Acknowledgements

The authors thank National Science council (NSC) for its financial support (NSC 101-2221-E-507-006), National Applied Research Laboratories National Chip Implementation Center (CIC) for its technical support, and National Nano Device Laboratory for its supporting measurement. Taiwan, ROC.

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  1. Department of Electronic Engineering, National Quemoy University, University Road 1, Jinning Township, Kinmen, 892, Taiwan

    Jun-Da Chen & Wen-jun Wang

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  1. Jun-Da Chen
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  2. Wen-jun Wang
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Correspondence to Jun-Da Chen.

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Chen, JD., Wang, Wj. A K-Band Low-Noise and High-Gain Down-Conversion Active Mixer Using 0.18-μm CMOS Technology. Wireless Pers Commun 104, 407–421 (2019). https://doi.org/10.1007/s11277-018-6027-4

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  • DOI: https://doi.org/10.1007/s11277-018-6027-4

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