Abstract
As the digital signal frequency in printed circuit boards (PCBs) increases, waveform distortion, or the signal integrity (SI) problem, is getting more and more serious. The reason the SI problem is becoming serious is that wires or traces need to be regarded as transmission lines which are sensitive to electric noise. In order to overcome this problem, we have proposed a novel methodology called a segmental transmission line (STL), and have shown its effectiveness using computer simulations and fundamental prototypes. However, in the STL design, the combinatorial explosion problem occurs. To solve this problem, a genetic algorithm (GA) was used to design the STL. In this article, we apply the STL to a bus system that includes inductances, which come from the very-large-scale integration (VLSI) packaging. We evaluated the STL in simulation experiments as well as actual experiments using prototypes, and obtained a maximum improvement ratio of 1.53 in the actual experiment.
Similar content being viewed by others
Explore related subjects
Discover the latest articles, news and stories from top researchers in related subjects.References
Taguchi M (1994) High-speed, small-amplitude I/O interface circuits for memory bus application. IEICE Trans Electron E77-C(12): 1944–1950
Yasunaga M, Yoshihara I (2005) The segmental transmission line and its design methodology: line trace ensuring high signal integrity in VLSI mounting boards (in Japanese). IEICE J D-I, J-88-D-I (5), pp 915–929
Shimauchi Y, Nakayama H, Yamaguchi Y, et al (2009) Evaluation of waveform-improvement performance on the segmental transmission line (in Japanese). IEICE Technical Report 109(317), Design Gaea 2009, pp 63–68
Sato H, Ono I, Kobayashi S (1997) A new generation alternation model of genetic algorithms and its assessment (in Japanese). J Jpn Soc Artif Intell 12(5):734–744
Author information
Authors and Affiliations
Corresponding author
Additional information
This work was presented in part at the 16th International Symposium on Artificial Life and Robotics, Oita, Japan, January 27–29, 2011
About this article
Cite this article
Shimada, H., Akita, S., Ishiguro, M. et al. Digital-signal-waveform improvement on VLSI packaging including inductances. Artif Life Robotics 16, 194 (2011). https://doi.org/10.1007/s10015-011-0915-y
Received:
Accepted:
Published:
DOI: https://doi.org/10.1007/s10015-011-0915-y