Abstract
We formalise the semantics of V −, a simple version of Verilog hardware description language using an extension of Duration Calculus. The language is simple enough for experimenting formalisation, but contains sufficient features for being practically relevant. V − programs can exhibit a rich variety of computations, and it is therefore necessary to extend Duration Calculus with several features, including Weakly Monotonic Time, infinite intervals and fixed point operators. The semantics is compositional and can be used as the formal basis of a formal theory of Verilog.
On leave from Catholic University of Pelotas, Cx.Postal 402 (96010-000), Pelotas-RS, Brazil.
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Schneider, G., Xu, Q. (1998). Towards a formal semantics of verilog using duration calculus. In: Ravn, A.P., Rischel, H. (eds) Formal Techniques in Real-Time and Fault-Tolerant Systems. FTRTFT 1998. Lecture Notes in Computer Science, vol 1486. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055355
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DOI: https://doi.org/10.1007/BFb0055355
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